CD4440CS

PCD4440T PHILIPS | Alldatasheet

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Technical content

Datasheet sections

• 1996 Dec 20
• 1 FEATURES
• 2 APPLICATIONS
• 3 GENERAL DESCRIPTION
• 6 PINNING INFORMATION
• 6.1 Pinning
• 6.2 Pin description
• 7.1 Scrambling
• 7.2 Power supply (V
• 7.3 Oscillator (OSCI)
• 7.4 Splitting frequency and mode selection
• 7.5 Serial clock input (SCL), Serial data input (SDA)
• 7.6 Address input (A0)
• 7.8 Signal input (IN), Signal output (OUT)
• 8.1 Bit transfer
• 8.2 Start and stop conditions
• 8.3 System configuration
• 8.4 Acknowledge
• 8.5 Timing specifications
• 9 APPLICATIONS
• 10 HANDLING
• 11 LIMITING VALUES
• 12 CHARACTERISTICS
• 14.1 Introduction
• 14.2 Reflow soldering
• 14.3 Wave soldering
• 14.4 Repairing soldered joints
• 15 DEFINITIONS+
• 16 LIFE SUPPORT APPLICATIONS
• 17 PURCHASE OF PHILIPS I

Product specification Supersedes data of October 1992 File under Integrated Circuits, IC03

1996 Dec 20

1996 Dec 20 3

Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

1 FEATURES

• Scrambler or descrambler function
• Scrambling in frequency domain
• Selectable split frequency (up to 10 selections per second)
• Telephony-band filtering included
• No increase in bandwidth
• No external components required
• Small signal delay
• Insensitive to distortion and group delay of transmission channel
• Control via serial I2C-bus
• Low transfer loss of speech
• Mute option
• Transparent mode
• High signal input impedance
• Low signal output impedance
• Low power consumption.

2 APPLICATIONS

• Cordless telephones
• Security telephones
• Portable phones
• Private Mobile Radio (PMR).

3 GENERAL DESCRIPTION

The PCD4440T is a silicon gate CMOS integrated circuit intended to be used in cordless telephony, radio, and line telecommunications products utilizing a microcontroller for the control functions. The purpose of the device is to prevent unauthorized ‘listening-in’ on conversations. A major application is protection of the vulnerable radio link between a CT0 type cordless handset and its base unit. Analog scrambling/descrambling is based on the split frequency method realized in a sophisticated switched-capacitor technology. The PCD4440T is compatible with most microcontrollers and communicates via a two line bidirectional I 2C-bus.

4 ORDERING INFORMATION

PCD4440T SO8 plastic small outline package; 8 leads; body width 7.5 mm SOT176-1

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

5 BLOCK DIAGRAM

Fig.1 Block diagram. handbook, full pagewidth MGG729 LPFIN OUT BIAS GEN LPF LPF PCD4440T LPF 5 LPF CONTROL LOGICI2C-bus INTERFACE transparent clocks mute LPF SCL OSCI V DD VSSSDA A0 128 76 3

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

6 PINNING INFORMATION

6.1 Pinning

6.2 Pin description

7 FUNCTIONAL DESCRIPTION

To provide privacy for the end user of a cordless telephone set, the radio-link audio signal must be scrambled. In the microphone of the handset and the incoming telephone line audio path of the base unit a scrambler circuit has to be implemented. Consequently the audio signal to the telephone line and to the earpiece must be descrambled. Both functions can be fulfilled by the PCD4440T by simply inserting it in the audio path. SYMBOL PIN TYPE DESCRIPTION SCL 1 I serial clock line (I 2C-bus) SDA 2 I serial data line (I 2C-bus) VSS 3 P negative Supply IN 4 I signal input OUT 5 O signal output V DD 6 P positive supply OSCI 7 I oscillator input A0 8 I slave address input (I 2C-bus) handbook, halfpage MGG728 PCD4440T OSCISDA VDD OUTIN VSS SCL Fig.2 Pin configuration.

7.1 Scrambling

The PCD4440Taccomplishes this task by first filtering the incoming signal, limiting the bandwidth to 3500 Hz. Then the signal is split into a high (> f s) and a low (< fs) frequency band. Both frequency bands are inverted and added again to provide a single output signal. Values for 9 split frequencies f S can be controlled by a scramble code table in the microcontroller. Control of these split frequencies is accomplished via the serial two-wire I 2C-bus. In addition to the split frequencies (fs), a transparent mode and mute instruction can be selected (see Table 1). Figure 3 shows the signal path for both bands. The lower band path (on the left side of the diagram) operates on frequencies f≤ f s (Split Frequency), the upper band path (on the right side) on frequencies f≥ fs. The input signal contains frequencies from f1 up to f2. In scrambling mode, the output signal is band limited from f l (300 Hz) to fh (3500 Hz). In the left path, the input signal is first limited to fs. The following modulator inverts the lower band. fl is folded up to fs, fs down to fl. In general, an input frequency fin is folded to fout=fs +fl− fin. Finally the folded signal is band limited to fs again. In the right path, the input signal is first limited to fh. The following modulator inverts the upper band. fs is folded up to fh, fh down to fs. In general, an input frequency fin is folded to fout=fs +fh − fin. Finally, the folded signal is band limited to fh again. In the last step, the bands are added and buffered. Because of the symmetry of the scrambling process, descrambling is achieved by passing the signal through another PCD4440T. In the transparent mode, the input signal is band limited to 3500 Hz. Frequencies from 0 to 300 Hz are not filtered out.

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T Fig.3 Scrambler signal path. handbook, full pagewidth MGG730 LPF LPF LPF LPF ab cd e f A A A A A A A A f1 fs fh f2 ffl 0f fsf1 fl 0f fsf1 fl 0f fsf1 fl 0f fh f2fsf1 fl 0f fh f2fsf1 fl 0f fhf1 fs f2fl 0f fh f2f1 fm1 = fl + fs fm2 = fh + fs fsfl ab c ab cd e abc ab c aabbccddee bc de bcd e

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

7.2 Power supply (V DD , VSS )

The positive supply of the circuit (VDD ) must meet the voltage requirement as indicated in the characteristics. To avoid undefined states of the device at power-on, an internal reset circuit clears the logic. The power-on reset has the highest priority; it blocks and resets the complete circuit.

7.3 Oscillator (OSCI)

The time base for the PCD4440T is a 3.58 MHz input signal which can be derived from the oscillator output (OSCO) of Philips microcontroller families PCD33xxA or PCF84CxxxA. Figure 4 shows the OSCI connection.

7.4 Splitting frequency and mode selection

Table 1 shows the input codes required to select the various splitting frequencies, and the mute, transparent and scramble/descramble modes. The codes form part of the serial I 2C-bus message input on the SDA line from the microcontroller. Table 1 Input data codes for splitting frequency and mode selection; note 1 Notes 1. Input codes other than shown in the table are not allowed. 2. Oscillator frequency = 3.58 MHz. D3 D2 D1 D0 HEX APPLICATION f s(2) (Hz) 00010 1 Mute mode − 00100 2 Select fs 2641 00110 3 Select fs 1853 01000 4 Select fs 1507 01010 5 Select fs 1279 01100 6 Select fs 11 17 01110 7 Select fs 1018 10000 8 Select fs 899 10010 9 Select fs 837

10100 A Select fs 767

10110 B T ransparent mode −

11110 F Start scramble/descramble mode −

handbook, full pagewidth MGG731 27 pF PCD4440T PCD33xxA PCF84CxxxA MICROCONTROLLER OSCI

3.58 MHz

Fig.4 OSCI (oscillator input) connection.

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

7.5 Serial clock input (SCL), Serial data input

(SDA) SCL and SDA are serial clock and data lines which conform to the I2C-bus specification. Both inputs must be pulled up externally to VDD through resistors of approximately 10 kΩ .

7.6 Address input (A0)

A0 is the slave address input and is used to set one bit of the slave address, so as to identify one of two PCD4440T devices connected to the same I 2C-bus. Whether another PCD4440T is connected to the bus or not, A0 must be connected to V DD or VSS . The remaining bits of the slave address are fixed internally.

7.7 I 2C-bus data configuration

The PCD4440T is always a slave receiver in the I2C-bus configuration (the R/W bit = 0). The slave address consists of 7 bits, where the least significant is set by the input on A0. The more significant bits are fixed internally, as shown in Fig.5. For definition of D0-D4, see Table 1.

7.8 Signal input (IN), Signal output (OUT)

Signal input for the scrambler/descrambler is coupled into a ‘Sallen and Key’ anti-aliasing filter configuration. A DC bias voltage of 1⁄2VDD is built-in. The analog signal output is buffered to achieve a relatively low output impedance of roughly 1 kΩ which is sufficient to drive the earpiece amplifier or similar applications. handbook, full pagewidth MGG732 S 110111 A 0 0A0000 D 3 D 2 D 1 D 0 A P slave address data R/WMSB acknowledge acknowledge internal STROBE Fig.5 I2C-bus data format.

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T 8I 2C BUS INTERFACE The I2C-bus is for two-way communication between different ICs or modules. It uses only two lines, a serial data line (SDA) and a serial clock line (SCL), both of which are bi-directional. Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.1 Bit transfer(see Fig.6) One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as control signals. 8.2 Start and stop conditions(see Fig.7) Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the stop condition (P). Fig.6 Bit transfer. MBC621 data line stable; data valid change of data allowed SDA SCL Fig.7 Start and stop conditions. MBC622 SDA SCL P STOP condition SDA SCL S START condition

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T 8.3 System configuration (see Fig.8) A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls message transfer is the ‘master’ and the devices that are controlled by the master are the ‘slaves’. 8.4 Acknowledge (see Fig.9) The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an extra acknowledge after the reception of each byte. Also a master must generate an acknowledge after reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge-related clock pulse. Set-up and hold times must be taken into account to ensure that the SDA line is stable LOW during the whole high period of the acknowledge-related clock pulse. A master receiver must signal an end of data to the transmitter bynot generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master to generate the stop condition. Fig.8 System configuration. MBA605 MASTER TRANSMITTER / RECEIVER SLAVE RECEIVER SLAVE TRANSMITTER / RECEIVER MASTER TRANSMITTER MASTER TRANSMITTER / RECEIVER SDA SCL Fig.9 Acknowledgment on the I2C-bus. MBC602 S START CONDITION 9821 clock pulse for acknowledgement not acknowledge acknowledge DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER SCL FROM MASTER

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

8.5 Timing specifications

The PCD4440T accepts data input from a microcontroller and operates as a ‘slave receiver’ via the I2C-bus. It supports the ‘standard’ mode of the I2C-bus, but not the ‘fast’ mode detailed in“The I2C-bus and how to use it”document order no. 9398 393 40011. The timing requirement are as follows: Masters generate a bus clock with a maximum frequency of 100 kHz. Detailed timing is shown in Fig. 10, where the two signal levels are LOW = VIL and HIGH = VIH, see Chapter 12. The time symbols are explained in Table 2. Figure 11 shows a complete data transfer. Fig.10 Standard mode timing. handbook, full pagewidth MBC764 tBUF tf tHIGH tSU;DAT tSU;STO tHD;DAT tSU;STA tr tLOW tHD;STA SDA SCL SDA Fig.11 Complete data transfer in standard mode. handbook, full pagewidth MBC765 981 - 7981 - 7981 - 7 STOPACKADDRESS R/WSTART CONDITION ACKDATASTART CONDITION ACKADDRESS R/W SCL SDA Clock LOW minimum = 4.7µs; clock HIGH minimum = 4µs. The dashed line is the acknowledgment of the receiver. Mark-to-space ratio = 1 : 1 (LOW-to-HIGH). Maximum number of bytes is unrestricted. Premature termination of transfer is allowed by generation of STOP condition. Acknowledge clock bit must be provided by master.

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T Table 2 Explanation of time symbols used in Fig.10 SYMBOL PARAMETER DESCRIPTION MIN. MAX. UNITS fSCL SCL clock frequency 0 100 kHz tSW tolerable pulse spike width − 100 ns tBUF bus free time The time that the bus is free (SDA is HIGH) before a new transmission is initiated by SDA going LOW. 4.7 −µ s t SU;STA set-up time repeated START Only valid for repeated start code. 4.7 −µ s tHD;STA hold time START condition The time between SDA going LOW and the first valid negative-going transition of SCL. 4.0 −µ s tLOW SCL LOW time The LOW period of the SCL clock. 4.7 −µ s tHIGH SCL HIGH time The HIGH period of the SCL clock. 4.0 −µ s tr rise time SDA and SCL − 1.0 µs tf fall time SDA and SCL − 0.3 µs tSU;DAT data set-up time 250 − ns tHD;DAT data hold time 0 − ns tSU;STO set-up time STOP condition 4.0 −µ s

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

9 APPLICATIONS

Fig.12 CT0 handset with direct (Manchester code) data system. handbook, full pagewidth MGG733 RF SECTION MICROCONTROLLER PCD33xxA A/D CONVERTER antenna DESCRAMBLER PCD4440T EXPANDOR 1/2 NE577 SCRAMBLER PCD4440T COMPRESSOR 1/2 NE577 DETECTOR LCD DRIVERLCD DISPLAY data in data outmod TX RX I2C-bus RSSI power down RX power down TX VREF KEYPAD 123 456 789 * 0#

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

10 HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, it is good practice to take normal precautions appropriate to handling MOS devices (see“Handbook IC03, Section General, Handling MOS devices”). Fig.13 CT0 base unit with direct (Manchester code) data system. handbook, full pagewidth MGG734 RF SECTION MICROCONTROLLER PCD33xxA A/D CONVERTER antenna DESCRAMBLER PCD4440T LINE INTERFACE TEA106x EXPANDOR 1/2 NE577 SCRAMBLER PCD4440T COMPRESSOR 1/2 NE577 DETECTOR CHARGING CIRCUIT DTMF data in data outmod TX RX I2C-bus RSSI power down RX power down TX telephone line VREF

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

11 LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

12 CHARACTERISTICS

VDD = 5.0 V; VSS =0V ; Tamb =2 5°C; all voltages with respect to VSS ; fxtal= 3.579 MHz unless otherwise specified. SYMBOL PARAMETER MIN. MAX. UNIT VDD supply voltage −0.3 +7.0 V VI all input voltages −0.8 V DD + 0.8 V II DC input current −10 +10 mA IO DC output current −20 +20 mA Ptot total power dissipation − 300 mW PO power dissipation per output − 50 mW Tstg storage temperature −65 +150 °C Tamb operating ambient temperature −25 +70 °C SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD operating supply voltage 2.8 − 6.0 V IDD supply current mute mode V DD =3V − 2.2 − mA operating mode V DD =3V − 13 − mA Inputs/Outputs: AO, SDA, SCL VIL LOW level input voltage 0 − 0.3VDD V VIH HIGH level input voltage 0.7V DD − VDD V C i input capacitance −− 7p F IOL SDA output current LOW V OL = 0.4 V 3.0 −− mA Signal input: IN VDC DC voltage level − 0.5VDD − V Vi(P-P) allowed amplitude − 1.25 V DD − 1V |Zi| input impedance frequency = 1 kHz − 120 − kΩ Signal output: OUT VDC DC voltage level − 0.5VDD − V |Zo| output impedance frequency = 1 kHz −− 1k Ω UFS unwanted frequency suppression Vi(P-P)= 1.25 V; fS = 767 or 2461 Hz; fin= 1 kHz; VDD =3Vo r5V 35 40 − dB Vo/Vi transfer loss transparent mode − 3.5 − dB operating mode − 0 − dB Oscillator frequency input: OSCI VDC DC voltage level − 0.5VDD − V VIL LOW level input voltage 0 − 0.3VDD V VIH HIGH level input voltage 0.7V DD − VDD V

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

13 PACKAGE OUTLINE

max. A 1 A 2 A 3 bp cD (1) E (1) Z (1)eH E LL p Qy wv θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ mm inches 2.65 0.3 0.1 2.45 2.25 0.49 0.36 0.32 0.23 7.65 7.45 7.6 7.4 1.27 10.65 10.00 1.1 1.0 2.0 1.8 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.45 SOT176-1 91-08-13 95-02-25 X θ AA 1 A 2 w M bp D H E Lp Q detail X E Z e c L v M A (A )3 A y 0.25 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.30 0.29 0.30 0.29 0.050 1.45 0.057 0.25 0.010.42 0.39 0.043 0.039 0.079 0.0710.01 0.0040.043 0.0180.01 0 5 10 mm scale pin 1 index SO8: plastic small outline package; 8 leads; body width 7.5 mm SOT176-1

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

14 SOLDERING

14.1 Introduction

There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011).

14.2 Reflow soldering

Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250°C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C.

14.3 Wave soldering

Wave soldering techniques can be used for all SO packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used.
• The longitudinal axis of the package footprint must be parallel to the solder flow.
• The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260°C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150°C within 6 seconds. Typical dwell time is 4 seconds at 250°C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.

14.4 Repairing soldered joints

Fix the component by first soldering two diagonally- opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300°C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320°C.

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T

15 DEFINITIONS

16 LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

17 PURCHASE OF PHILIPS I

Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification. Purchase of Philips I 2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.

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Philips Semiconductors Product specification Analog voice scrambler/descrambler PCD4440T NOTES

Internet: http://www.semiconductors.philips.com Philips Semiconductors – a worldwide company © Philips Electronics N.V. 1996 SCA52 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 247 9145, Fax. +7 095 247 9144 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 São Paulo, SÃO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1, P.O. Box 22978, TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria:Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil:see South America Bulgaria:Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre,

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