C0240QGLA-T AZDISPLAYS | Alldatasheet
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Document No.: Approval Product Specification Module name: C0240QGLA-T Issue date: 2008/12/03 Version: 1.6 Note: 1. The information contained may be changed without prior notice before approval. It is therefore advisable to contact Chi MEI EL Corp. before designing your product. Customer Approved by Customer Approved by CMEL PD Division ENG Division QA Dept FOR MORE INFORMATION: AZ DISPLAYS, INC.
75 COLUMBIA, ALISO VIEJO, CA 92656
Http://www.AZDISPLAYS.com
Document No.: Reversion History Version Date Page Description Ver.1.0 Ver.1.1 Ver.1.2 Ver.1.3 Ver.1.4 Ver.1.5 Ver.1.6 2008/05/12 2008/05/16 2008/05/16 2008/05/28 2008/10/22 2008/11/07 2008/12/03 All Specification was first issued Modify Initial CodeVgh/Vgl Modify Initial CodeVgl Modify Electro-Optical Characteristic (CIE_Gx) Mod Absolute maximum ratings (Modify to the Panel Operating Condition) Instruction data => Parameter data Add Gamma Setting Group Code Mod Pin-46 to be Output Pin from IC Add Notice of Pin-45/46/47/48 that: SDI=SDINeSDO=SDOUT CSB=CS=NCSeRW_WRB=SCL Add “Test and measurement conditions” Add Notice of “Handling & Storage” Add Label (Optional) ID Position on Drawing Mod package by belt Mod the Range of Temperature Mod the Lifetime (From 20K to 30K)
Document No.: 1. Purpose: This documentation defines general product specification for OLED module supplied by CMEL. The information described in this techni cal specification is tentative. Please Contact CMEL’s representative while your product is modified. 2. General Description: Driving Mode: Active Matrix. Color Mode: Full Color (262K color) Driver IC: S6E63D6, COG Assembly Interface: 1. MPU i80-system 18-/16-/9-/8-bit bus interface 2. MPU i68-system 18-/16-/9-/8-bit bus interface 3. Serial data transfer interface (SPI) 4. RGB 18-/16-/6-bit bus interface (DOT CLK, VSYNC, HSYNC, DE, DB17-0) Application: Cell phone etc.. RoHS Compatible 3. Mechanical Data: No. Items Specification Unit 1 Diagonal Size 2.4” Inch
2 Resolution 240 xRGBx320
3 Pixel Pitch 0.051Ò0.153 mm 4 Active Area 36.72Ò48.96 mm 5 Outline Area(Glass) 42Ò58.6 mm 6 Thickness 1.65 (Typ) mm
7 Weight 12 (Typ) g
Document No.: 4. Absolute Maximum ratings:
4.1 Absolute ratings of environmentj
Value Item Symbol Min. Max. Unit Note Storage Temperature T ST -40 +80 ºC (1) Operating Ambient Temperature T OP -20 +60 ºC (2) Note (1) The storage duration for both critical temperature (-40 & 80 Ċ) meet reliability test criteria. (2) The operating duration for both critical temperature (-20 & 60Ċ) meet reliability test criteria.
4.2 Electrical absolute ratingsj
Power supply voltage 1 AR_Vdd V +4.6V +/- 0.05 Power supply voltage 2 AR_Vss V -4.4V +/- 0.1 Power supply voltage 3 VCI V +2.5 ~ +3.3 Power supply voltage 4 VDD3 (IOVcc) V +1.65 ~ +3.3
Document No.: 5. Electrical Characteristic:
5.1 DC Characteristic
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5.2 AC Characteristic
5.2.1 CPU interface M68
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5.2.2 CPU interface M80
Document No.: Image Data format for 18bit CPU interface (262k color) Image Data format for 16bit CPU interface (65k color) Image Data format for 9bit CPU interface (262k color) Image Data format for 8bit CPU interface (65K color) Case 1: Case 2: Image Data format for 8bit CPU interface (262K color)
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5.2.3 SPI
Document No.: (Note) RS = 0 : Index data RS = 1 : Parameter data RS RWID
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5.2.4 RGB Interface
Document No.: Image Data format for 18bit RGB interface (262k color) Image Data format for 16bit RGB interface (65k color) Image Data format for 6bit RGB interface (262k color) $-, %"5"
Document No.: 6. Electro-Optical Characteristic: Items Symbol Min Typ. Max Unit Remark Operating Luminance L 170 200 230 Cd/m 2 (1)(5) Power Consumption Pon - 260 300 mW 30% pixels on (1) Max. Current Icc - - 120 mA (1) Response Time Tres - - 50 us (2) CIEx (White) Wx 0.26 0.31 0.36 - (5) CIEy( White) Wy 0.28 0.33 0.38 - (5) CIEx (Red) Rx 0.62 0.66 0.70 (5) CIEy( Red) Ry 0.30 0.34 0.38 (5) CIEx (Green) Gx 0.25 0.29 0.33 (5) CIEy( Green) Gy 0.62 0.66 0.70 (5) CIEx (Blue) Bx 0.11 0.15 0.19 (5) CIEy( Blue) By 0.12 0.16 0.20 (5) Viewing Angle V A 160 170 - Degree (3) Contrast CR 5000:1 10000:1 (4) Operation Lifetime LTop 30000 Hrs (1)(6) Note: Measuring surrounding: dark room Surrounding temperature: 25oC *07$$ 7_7 1. Test condition: b. IC Initial Register Setting: R 0 3 : 0 x 0 0 3 0 / / 1 6 b i t m o d e R 1 0 : 0 x 0 0 0 0 / / I C s t a n d b y o f f R 1 8 : 0 x 0 0 2 8 / / F r a m e R a t e = 8 0 H z RF8: 0x000F // VGH=+5V R F 9 : 0 x 0 0 1 9 / / V G L = - 7 V R 0 5 : 0 x 0 0 0 1 / / D i s p l a y O n G a m m a R e g i s t e r S e t t i n g :Gamma Setting GroupjC R70h 0x2B00 R71h 0x2C00 R72h 0x3280 R73h 0x2523 R74h 0x2319 R75h 0x2C24 R76h 0x251A R77h 0x2D2A R78h 0x281B
Document No.: 2.response Time test condition 100% 90% 10% Tr Tf Time 3.Viewing angle test condition: Viewing Angle= CR>10 4.Contrast L u m i n a n c e w i t h a l l p i x e l s w h i t e CR = L u m i n a n c e w i t h a l l p i x e l s b l a c k 5.Optical tester: CA210 6. Brightness of 30% power consumption. Operating Life Time is defined when the luminance has decayed to less than 50% of the initial measured luminance before life test. Ǐ=270Ę Vss(GND)
Document No.: 7. System Diagram:
Document No.: 8. Pin Assignment: PIN Symbol I/O Description Remarks AR_VDD I Positive voltage for OLED AR_VSS I Nagative voltage for OLED VCI I Power supply for analog circuit(2.5v~3.3v) VCI1 O A reference voltage for 1st booster r(connect a 1u/10v capacitance to gnd) GND I Ground C12M I C12P I External capacitance connect pin between C12M and C12P (1u/10V) C11M I C11P I External capacitance connect pin between C11M and C11P (1u/10V) VLOUT1 O 1st booster output pin. (1u/10V) C31P I C31M I External capacitance connect pin between C31M and C31P (1u/10V) C32P I C32M I External capacitance connect pin between C32M and C32P (1u/10V) VLOUT3 O 3rd booster output pin. (1u/16V) VLOUT2 O 2nd booster output pin. (1u/16V) C21P I C21M I External capacitance connect pin between C21M and C21P . (1u/10V) VGS I A reference level for the grayscale voltage generation circuit. (connect to gnd) IOVCC I I/O power supply SPB I Select the CPU interface mode. (0=parallel interface 1=serial interface) ID_MIB I Select the CPU type (0=intel 80x-system 1=motorola 68x-system) DB17 I/O DB16 I/O DB15 I/O DB14 I/O DB13 I/O DB12 I/O DB11 I/O DB10 I/O DB9 I/O DB8 I/O DB7 I/O BI-directional data bus. When CPU I/F, 18-bit interface : DB 17-0 16-bit interface : DB 17-10 , DB 8-1 9 - b i t i n t e r f a c e : D B 8 - 0 8 - b i t i n t e r f a c e : D B 8 - 1 When RGB I/F 18-bit interface : DB 17-0 18-bit interface : DB 17-0 16-bit interface : DB 17-10, DB 8-1 6 - b i t i n t e r f a c e : D B 8 - 3 Fix unused pin to the VSS level
Document No.: DB6 I/O DB5 I/O DB4 I/O DB3 I/O DB2 I/O DB1 I/O DB0 I/O VSYNC I Frame-synchronizing signal. (VSPL=0 Low active, VSPL=1 High active) FIX this pin at VSS level if the pin is not used HSYNC I Line-synchronizing signal. (HSPL=0 Low active, HSPL=1 High active) FIX this pin at VSS level if the pin is not used DOTCLK I Input pin for clock signal of external interface : dot clock. DPL=0 Display data is fetched at DOTCLK’s rising edge DPL=1 Display data is fetched at DOTCLK’s falling edge Fix this pin at VSS level if the pin is not used. Data enablesignal pin for RGB interface. EPL ENABLE GRAM write GRAM address 0 0 Valid Updated 0 1 Invalid Held 1 0 Invalid Held ENABLE I 1 1 Valid Updated SDI (SDIN) I For a serial peripheral interface (SPI), input data is fetched at the rising edge of the SCL signal, Fix SDI pin at VSS level if the pin is not used. SDO (SDOUT) O For a serial peripheral interface (SPI), serves as the serial data output pin (SDO), Successive bits are output at the falling edge of the SCL signal. CSB (CS/NCS) I Chip select signal input pin. 0= driver IC is selected and can be accessed. 1= driver IC is not selected and cannot be accessed. Pin function CPU type Pin description RW 68-system Read/Write operation selection pin 0=write 1=read WRB 80_system Write strobe signal.(Input pin) Data is fetched at the rising edge. RW_WRB (SCL) I SCL SPI The synchronous clock signal RS I Register select pin. 0=Index/status, 1=instruction parameter, GRAM data Must be fixed at VDD3 level when not used. Pin Function CPU type Pin description E 68-system Read/Writeoperation enable pin RDB 80_system Read strobe signal. Read out data at the low level E_RDB I When SPI mode is selected, fix this pin at VDD3 levle
Document No.: RESETB I Reset pin initializes the IC when low. Should be reset after power-on. MVDD O Internal power for RAM. Connect a capacitance to gnd. Connect a capacitance (1u/10v) to gnd. VREG1OUT O A reference level for the grayscale voltage. Connect a capacitance (1u/10v) to gnd. VCI I Power supply for analog circuit (2.5v~3.3v) VGH O The positive voltage used in the gate driver. Connect a capacitance (1u/10v) to gnd. VGL O The negative voltage used in the gate driver. Connect a capacitance (1u/10v) to gnd. GND Ground
Document No.: 9. Reliability Test: No. Items Specification 1 High Temp. Storage 85°C, 240hrs 2 Low Temp. Storage -40°C, 240hrs 3 High Temp. Operation 60°C, 240hrs 4 Low Temp. Operation -40°C, 240hrs
5 High Temp / Humidity Storage 85°C, 85%RH, 240hrs
6 High Temp / Humidity Operation 60°C, 90%RH, 240hrs
7 Thermal shock
-40°C ~85°C (-40°C /30min; transit/3min; 85°C /30min; transit /3min) 1cycle: 66min, 100 cycles
8 Vibration
Frequency: 5~50HZ, 0.5G Scan rate : 1 oct/min Time : 2 hrs/axis Test axis : X, Y, Z
9 Drop
Height: 76cm Sequence : 1 anglee3 edges and 6 faces Cycles: 1
10 ESD Air discharge model, ±8kV, 10 times
Test and measurement conditions ¾ All measurements shall not be started until the specimens attain to temperature stability. ¾ The degradation of Polarizer is ignored for item 1, 5 & 6. ¾ The test pattern at operating condition is 30%P.C. alternating pictures. Evaluation Criteria ¾ No damage to glass or encapsulation ¾ No drastic change to display ¾ Defects / Mura follow product specification ¾ Luminance: Within +/-50% of initial value ¾ Current consumption: within +/-50% of initial value
Document No.: 10. Handling: 10.1 Do not scratch the surface of the pol arizer film as it is easily damaged.
10.2 When cleaning the display surface, use soft cloth with solvent (as recommended below)
10.3 Do not wipe the display surface with dry or hard materials that damage the polarizer
surface.
10.4 Since this OLED panel is made of gla ss, dropping the module or banging it against
hard objects may cause cracks or fragmentation. 10.5 Do not disassemble the OLED module as it may cause permanent damage. 10.6 Hold OLED very carefully when placing OLED module into the system housing. Do not excessive stress or pressure to OLED module. 11. Storage 11.1 Storing in a polyethylene bag with the opening sealed.
11.2 Placing in a dark place where neither expos ure to direct sunlight nor any fluorescent
light is permitted and keep at room temperature & room humidity. 11.3 Storing with no contact with polarizer surface. It is recommended to store them in the inner container which we delivered.
Document No.: 12. External Dimension:
Document No.: 13. Package: