BTS824R

BTS824R INFINEON | Alldatasheet

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Technical content

Infineon Technologies AG 1 2003-Oct-01 Smart High-Side Power Switch Four Channels: 4 x 90mΩ Status Feedback Product Summary Package Operating Voltage V bb 5.5...40V Active channels one four parallel On-state Resistance R ON 90mΩ 22.5m Ω Nominal load current I L(NOM) 4.7A 19.0A Current limitation I L(SCr) 12A 12A General Description

• N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology.
• Providing embedded protective functions

Applications

• µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads
• All types of resistive, inductive and capacitve loads
• Most suitable for loads with high inrush currents, so as lamps
• Replaces electromechanical relays, fuses and discrete circuits Basic Functions
• Very low standby current
• CMOS compatible input
• Improved electromagnetic compatibility (EMC)
• Fast demagnetization of inductive loads
• Stable behaviour at undervoltage
• Wide operating voltage range
• Logic ground independent from load ground Protection Functions Block Diagram
• Short circuit protection
• Overload protection
• Current limitation
• Thermal shutdown
• Overvoltage protection (including load dump) with external resistor
• Reverse battery protection with external resistor
• Loss of ground and loss of V bb protection
• Electrostatic discharge protection (ESD) Diagnostic Function
• Diagnostic feedback with open drain output
• Open load detection in OFF-state
• Feedback of thermal shutdown in ON-state Vbb Logic Channel 3 Channel 4 GND Load 1 Load 2 Logic Channel 1 Channel 2 Load 4 Load 3 IN1 ST1/2 IN2 IN3 ST3/4 IN4 Power SO 20

Infineon Technologies AG 2 2003-Oct-01 Functional diagram . channel 1 OUT1 overvoltage protection logic internal voltage supply ESD temperature sensor clamp for inductive load gate control charge pump current limit reverse battery protection Open load detection control and protection circuit of channel 2 control and protection circuit of channel 3 control and protection circuit of channel 4 IN1 VBB GND1/2 IN2 IN3 IN4 ST3/4 OUT2 OUT3 OUT4 LOAD GND3/4 ST1/2

Infineon Technologies AG 3 2003-Oct-01 Pin Definitions and Functions Pin Symbol Function 1,10, 11,20 Vbb Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance

3 IN1

5 IN2

7 IN3

9 IN4

Input 1,2, 3,4 activates channel 1,2,3,4 in case of logic high signal 18,19 OUT1 16,17 OUT2 14,15 OUT3 12,13 OUT4 Output 1,2,3,4 protected high-side power output of channel 1,23,4. Design the wiring for the max. short circuit current

4 ST1/2 Diagnostic feedback 1/2,3/4 of channel 1,2,3,4

8 ST3/4 open drain, low on failure

2 GND1/2 Ground of chip 1 (channel 1,2)

6 GND3/4 Ground of chip 2 (channel 3,4)

(top view) Vbb 1 • 20 V bb GND1/2 2 19 OUT1 IN1 3 18 OUT1 ST1/2 4 17 OUT2 IN2 5 16 OUT2 GND3/4 6 15 OUT3 IN3 7 14 OUT3 ST3/4 8 13 OUT4 IN4 9 12 OUT4 Vbb 10 11 V bb

Infineon Technologies AG 4 2003-Oct-01 Maximum Ratings at Tj = 25°C unless otherwise specified Parameter Symbol Values Unit Supply voltage (overvoltage protection see page 6) Vbb 43 V Supply voltage for full short circuit protection Tj,start = -40 ...+150°C Vbb 36 V Load current (Short-circuit current, see page 6) IL self-limited A Load dump protection1) VLoadDump = VA + Vs, VA = 13.5 V R I2) = 2 Ω , td = 400 ms; IN = low or high, each channel loaded with R L = 13.5 Ω , VLoad dump 3) 60 V Operating temperature range Storage temperature range Tj Tstg -40 ...+150 -55 ...+150 Power dissipation (DC)4) Ta = 25°C: (all channels active) Ta = 85°C: Ptot 3.6 1.9 W Maximal switchable inductance, single pulse Vbb = 12V, Tj,start = 150°C4), see diagrams on page 10 IL = 4.7 A, EAS = 120 mJ, 0 Ω one channel: IL = 9.5 A, EAS = 230 mJ, 0 Ω two parallel channels: IL = 19.0 A, EAS = 450 mJ, 0 Ω four parallel channels: ZL 7.9 3.7 1.8 mH Electrostatic discharge capability (ESD) IN: (Human Body Model) ST: out to all other pins shorted: R=1.5kΩ ; C=100pF VESD 1.0 4.0 8.0 kV Input voltage (DC) see internal circuit diagram page 9 VIN -10 ... +16 V Current through input pin (DC) Pulsed current through input pin5) Current through status pin (DC) IIN IINp IST ±0.3 ±5.0 ±5.0 mA 1) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω resistor for the GND connection is recommended. 2) R I = internal resistance of the load dump test pulse generator 3) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 4) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 5) only for testing

Infineon Technologies AG 5 2003-Oct-01 Thermal Characteristics Parameter and Conditions Symbol Values Unit min typ max Thermal resistance junction - soldering point6)7) each channel: R thjs -- -- 5 K/W junction – ambient6) @ 6 cm cooling area one channel active: all channels active: R thja

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol Values Unit at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified min typ max Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT); IL = 2 A each channel, Tj = 25°C: Tj = 150°C: two parallel channels, Tj = 25°C: four parallel channels, Tj = 25°C: see diagram, page 11 R ON 140 17.5 180 22.5 m Ω Nominal load current one channel active: two parallel channels active: four parallel channels active: Device on PCB6), Ta = 85°C, Tj ≤ 150°C IL(NOM) 3.7 7.4 14.8 4.7 9.5 19.0 A Output current while GND disconnected or pulled up8); Vbb = 32 V, VIN = 0, see diagram page 9 IL(GNDhigh) -- -- 2 mA Turn-on time9) IN to 90% VOUT : Turn-off time IN to 10% VOUT : R L = 12 Ω ton toff 100 100 250 270 µs Slew rate on 9) 10 to 30% VOUT , R L = 12 Ω : d V/dton 0.2 -- 1.0 V/ µs Slew rate off 9) 70 to 40% VOUT , R L = 12 Ω : -dV/dtoff 0.2 -- 1.1 V/ µs 6) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 7) Soldering point: upper side of solder edge of device pin 15. See page 14 8) not subject to production test, specified by design 9) See timing diagram on page 12.

Infineon Technologies AG 6 2003-Oct-01 Parameter and Conditions, each of the four channels Symbol Values Unit at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified min typ max Operating Parameters Operating voltage Vbb(on) 5.5 -- 40 V Undervoltage switch off10) Tj =-40°C...25°C: Vbb(u so) -- -- 4.5 V Overvoltage protection12) I bb = 40 mA Vbb(AZ) 41 47 52 V Standby current13) Tj =-40°C...25°C: VIN = 0; see diagram page 11 T j =150°C: Ibb(off) -- µA Off-State output current (included in Ibb(off)) VIN = 0; each channel IL(off) -- 1 5 µA Operating current 14), VIN = 5V, IGND = IGND1 + IGND2 , one channel on: all channels on: IGND 0.6 2.4 1.2 4.8 mA Protection Functions15) Current limit, Vout = 0V, (see timing diagrams, page 12) Tj =-40°C: Tj =25°C: Tj =+150°C: IL(lim) -- A Repetitive short circuit current limit, Tj = Tjt each channel two,three or four parallel channels (see timing diagrams, page 12) IL(SCr) -- A Initial short circuit shutdown time Tj,start =25°C: Vout = 0V (see timing diagrams on page 12) toff(SC) -- 2 -- ms Output clamp (inductive load switch off)16) at VON(CL) = Vbb - VOUT , IL= 40 mA VON(CL) 41 47 52 V Thermal overload trip temperature Tjt 150 -- -- °C Thermal hysteresis ∆Tjt -- 10 -- K 10) is the voltage, where the device doesn´t change it´s switching condition for 15ms after the supply voltage falling below Vbb(on) 11) not subject to production test, specified by design 12) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω resistor for the GND connection is recommended). See also VON(CL) in table of protection functions and circuit diagram on page 9. 13) Measured with load; for the whole device; all channels off 14) Add IST , if IST > 0 15) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 16) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest V ON(CL)

Infineon Technologies AG 7 2003-Oct-01 Parameter and Conditions, each of the four channels Symbol Values Unit at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified min typ max Reverse Battery Reverse battery voltage 17) - Vbb -- -- 32 V Drain-source diode voltage (Vout > Vbb) -VON -- 600 -- mV Diagnostic Characteristics Open load detection voltage V OUT(OL)1 1.7 2.8 4.0 V Input and Status Feedback18) Input resistance (see circuit page 9) R I 2.5 4.0 6.0 kΩ Input turn-on threshold voltage VIN(T+) -- -- 2.5 V Input turn-off threshold voltage VIN(T-) 1.0 -- -- V Input threshold hysteresis ∆ VIN(T) -- 0.2 -- V Status change after positive input slope19) with open load td(STon) -- 10 20 µs Status change after positive input slope19) with overload td(STon) 30 -- -- µs Status change after negative input slope with open load td(SToff) -- -- 500 µs Status change after negative input slope19) with overtemperature td(SToff) -- -- 20 µs Off state input current VIN = 0.4 V: IIN(off) 5 -- 20 µA On state input current VIN = 5 V: IIN(on) 10 35 60 µA Status output (open drain) Zener limit voltage IST = +1.6 mA: ST low voltage IST = +1.6 mA: VST(high) VST(low) 5.4 0.6 V 17) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 4 and circuit page 9). 18) If ground resistors RGND are used, add the voltage drop across these resistors. 19) not subject to production test, specified by design

Infineon Technologies AG 8 2003-Oct-01 Truth Table Channel 1 and 2 Chip 1 IN1 IN2 OUT1 OUT2 ST1/2 Channel 3 and 4 (equivalent to channel 1 and 2) Chip 2 IN3 IN4 OUT3 OUT4 ST3/4 Normal operation L L H H L H L H L L H H L H L H H H H H Open load Channel 1 (3) L H X X Z H X X L20) H Channel 2 (4) X X L H X X Z H L20) H Overtemperature both channel L X H L H X L L L L L L H L L Channel 1 (3) L H X X L L X X H L Channel 2 (4) X X L H X X L L H L L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit H = "High" Level Status signal valid after the time delay shown in the timing diagrams Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4 have to be configured as a 'Wired OR' function with a single pull-up resistor. Terms PROFETIN2 ST1/2 OUT2 GND1/2 Vbb VOUT2IGND1/2 VON2 Leadframe IN1 VOUT1 VON1 IL1 OUT1 VIN1 VIN2 VST1/2 Ibb IIN1 IIN2 IST1/2 IL2 RGND1/2 Vbb Chip 1 PROFETIN4 ST3/4 OUT4 GND3/4 Vbb VOUT4IGND3/4 VON4 Leadframe IN3 VOUT3 VON3 I L3 OUT3 VIN3 VIN4 VST3/4 IIN3 IIN4 IST3/4 I L4 RGND3/4 Chip 2 Leadframe (Vbb) is connected to pin 1,10,11,20 External RGND optional; two resistors RGND1 , RGND2 = 150 Ω or a single resistor RGND = 75 Ω for reverse battery protection up to the max. operating voltage. 20) L, if potential at the Output exceeds the OpenLoad detection voltage

Infineon Technologies AG 9 2003-Oct-01 Input circuit (ESD protection), IN1 to IN4 IN GND IR ESD-ZD III The use of ESD zener diodes as voltage clamp at DC conditions is not recommended. Status output, ST1/2 or ST3/4 ST GND ESD- ZD +5V RST(ON) ESD-Zener diode: 6.1 V typ., max 0.3 mA; RST(ON) < 375 Ω at 1.6 mA. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended. Inductive and overvoltage output clamp, OUT1...4 +Vbb OUT VZ V ON Power GND VON clamped to VON(CL) = 47 V typ. Overvolt. and reverse batt. protection + Vbb IN ST STR GND GNDR Signal GND Logic VZ2 IR VZ1 Load GND LoadR OUT STR + 5V VZ1 = 6.1 V typ., VZ2 = 47 V typ., R GND = 150 Ω , R ST = 15 kΩ , R I= 4.0 kΩ typ. In case of reverse battery the load current has to be limited by the load. Temperature protection is not active Open-load detection, OUT1...4 OFF-state diagnostic condition: Open Load, if VOUT > 3 V typ.; IN low Open load detection Logic unit VOUT Signal GND OFF REXT Vbb GND disconnect PROFET V IN ST OUT GND bb Vbb VIN VST VGND Any kind of load. In case of IN = high is VOUT ≈ VIN - VIN(T+). Due to VGND > 0, no VST = low signal available.

Infineon Technologies AG 10 2003-Oct-01 GND disconnect with GND pull up PROFET V IN ST OUT GND bb Vbb VGND VIN VST Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND > 0, no VST = low signal available. Vbb disconnect with energized inductive load PROFET V IN ST OUT GND bb Vbb high For inductive load currents up to the limits defined by ZL (max. ratings and diagram on page 10) each switch is protected against loss of Vbb. Consider at your PCB layout that in the case of Vbb dis- connection with energized inductive load all the load current flows through the GND connection. Inductive load switch-off energy dissipation PROFET V IN ST OUT GND bb E E E EAS bb L R ELoad RL L {LZ Energy stored in load inductance: EL = 1/2·L·I2 L While demagnetizing load inductance, the energy dissipated in PROFET is EAS = Ebb + EL - ER = VON(CL)·iL(t) dt, with an approximate solution for RL > 0 Ω : EAS = IL· L 2·R L (Vbb + |VOUT(CL)|) ln (1+ IL·R L |VOUT(CL)| ) Maximum allowable load inductance for a single switch off (one channel)4) L = f (IL ); Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω ZL [mH] 100 1000 12345678 91 0 1 1 I L [A]

Infineon Technologies AG 11 2003-Oct-01 Typ. on-state resistance RON = f (Vbb,Tj ); IL = 2 A, IN = high R ON [mOhm] 160 120 5 7 9 11 30 40 Tj = 150°C 25°C -40°C V bb [V] Typ. standby current Ibb(off) = f (Tj ); Vbb = 9...34 V, IN1,2,3,4 = low Ibb(off) [µA] -50 0 50 100 150 200 T j [°C]

Infineon Technologies AG 14 2003-Oct-01 Package and Ordering Code Standard: P-DSO-20-12 ( Power SO 20 ) Sales Code BTS 824R Ordering Code Q67060-S7027 All dimensions in millimetres Definition of soldering point with temperature Ts: upper side of solder edge of device pin 15. Pin 15 Printed circuit board (FR4, 1.5mm thick, one layer 70µm, 6cm 2 active heatsink area) as a reference for max. power dissipation Ptot, nominal load current IL(NOM) and thermal resistance Rthja Frontside: Backside: Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81669 München © Infineon Technologies AG 2001 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life- support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life- support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.