BTS7970B INFINEON | Alldatasheet
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Data Sheet, Rev. 2.0, May 2006 Never stop thinking. BTS 7970B High Current PN Half Bridge NovalithIC 68 A, 7 m Ω + 9 m Ω typ. Automotive Power TM
High Current PN Half Bridge BTS 7970B Data Sheet 1 Rev. 2.0, 2006-05-09
Data Sheet 2 Rev. 2.0, 2006-05-09 Type Package BTS 7970B P-TO-263-7 High Current PN Half Bridge NovalithIC BTS 7970B Product Summary The BTS 7970B is a fully integrated high current half bridge for motor drive applications. It is part of the NovalithICTM family containing one p-channel highside MOSFET and one n-channel lowside MOSFET with an integrated driver IC in one package. Due to the p-channel highside switch the need for a charge pump is eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the integrated driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection against overtemperature, overvoltage, undervoltage, overcurrent and short circuit. The BTS 7970B provides a cost optimized solution for protected high current PWM motor drives with very low board space consumption. Basic Features
- Path resistance of typ. 16 m Ω @2 5 °C Low quiescent current of typ. 7 µA @ 25 °C PWM capability of up to 25 kHz combined with active freewheeling Switched mode current limitation for reduced power dissipation in overcurrent Current limitation level of 68 A typ. / 50 A min. Status flag diagnosis with current sense capability Overtemperature shut down with latch behaviour Overvoltage lock out Undervoltage shut down Driver circuit with logic level inputs Adjustable slew rates for optimized EMI BTS 7970B P-TO-263-7 TM
High Current PN Half Bridge BTS 7970B Overview Data Sheet 3 Rev. 2.0, 2006-05-09 1O v e r v i e w The BTS 7970B is part of the NovalithIC family containing three separate chips in one package: One p-channel highside MOSFET and one n-channel lowside MOSFET together with a driver IC, forming a fully integrated high current half-bridge. All three chips are mounted on one common leadframe, using the chip on chip and chip by chip technology. The power switches utilize vertical MOS technologies to ensure optimum on state resistance. Due to the p-channel highside switch the need for a charge pump is eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the integrated driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection against overtemperature, overvoltage, undervoltage, overcurrent and short circuit. The BTS 7970B can be combined with other BTS 7970B to form H-bridge and 3-phase drive configurations.
1.1 Block Diagram
Dead Time Gen. Slew Rate Adj. UV Shut Down OV Lock Out OT Shut Down Current Lim. Diagnosis Current Sense BTS 7970B
High Current PN Half Bridge BTS 7970B Overview Data Sheet 4 Rev. 2.0, 2006-05-09
1.2 Terms
Following figure shows the terms used in this data sheet. Figure 2 Terms IIN VIN OUT IINH VINH VSR ISR VIS IIS VVS ,VS IOUT , I L VOUT VDS(HS) GND IGND, ID(LS) IVS , -I D(HS ) IN INH SR IS VS VSD (LS) BTS 7970B
High Current PN Half Bridge BTS 7970B Pin Configuration Data Sheet 5 Rev. 2.0, 2006-05-09
2 Pin Configuration
2.1 Pin Assignment
Figure 3 Pin Assignment BTS 7970B and (top view)
2.2 Pin Definitions and Functions
Bold type: Pin needs power wiring Pin Symbol I/O Function
1 GND - Ground
2 IN I Input
Defines whether high- or lowside switch is activated
3 INH I Inhibit
When set to low device goes in sleep mode 4,8 OUT O Power output of the bridge
5 SR I Slew Rate
The slew rate of the power switches can be adjusted by connecting a resistor between SR and GND
6 IS O Current Sense and Diagnosis
7 VS - Supply
High Current PN Half Bridge BTS 7970B Maximum Ratings Data Sheet 6 Rev. 2.0, 2006-05-09
3 Maximum Ratings
Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the device. Exposure to maximum rating conditions for extended periods of time may affect device reliability -40 °C < Tj < 150 °C (unless otherwise specified) Pos Parameter Symbol Limits Unit Test Condition min max Electrical Maximum Ratings
3.0.1 Supply voltage
VVS -0.3 45 V
3.0.2 Logic Input Voltage VIN
-0.3 5.3 V
3.0.3 HS/LS continuous drain
ID(HS) ID(LS) -44 44 1) 1) Maximum reachable current may be smaller depending on current limitation level A TC < 85°C switch active
3.0.4 HS pulsed drain current ID(HS) -90 90 1) A TC < 85°C
tpulse = 10ms single pulse3.0.5 LS pulsed drain current ID(LS) -90 90 1) A
3.0.6 PWM current IOUT
1) -55 55 A f = 1kHz, DC = 50% -60 60 A f = 20kHz, DC = 50% 3.0.7 Voltage at SR pin VSR -0.3 1.0 V
3.0.8 Voltage between VS and
VVS -VIS -0.3 45 V
3.0.9 Voltage at IS pin VIS -20 45 V
3.0.10 Junction temperature
Tj -40 150 °C
3.0.11 Storage temperature Tstg -55 150 °C
3.0.12 ESD susceptibility
IN, INH, SR, IS OUT, GND, VS VESD kV HBM 2) ESD susceptibility HBM according to EIA/JESD 22-A 114B
High Current PN Half Bridge BTS 7970B Maximum Ratings Data Sheet 7 Rev. 2.0, 2006-05-09 Maximum Single Pulse Current Figure 4 BTS 7970B Maximum Single Pulse Current This diagram shows the maximum single pulse current that can be driven for a given pulse time tpulse. The maximum reachable current may be smaller depending on the current limitation level. Pulse time may be limited due to thermal protection of the device. 100 t pulse[s] I max[A]
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 8 Rev. 2.0, 2006-05-09
4 Block Description and Characteristics
4.1 Supply Characteristics
Figure 5 Quiescent Current (typ.) vs. Junction Temperature – 40 °C < Tj < 150 °C, 8 V < VS < 18 V, IL = 0A (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Test Conditions min. typ. max. General
4.1.1 Operating Voltage
VS 5.5 – 28 V VS increasing
4.1.2 Supply Current IVS(on) –23 m A VINH = 5 V
VIN = 0 V or 5 V RSR=0 Ω DC-mode normal operation (no fault condition)
4.1.3 Quiescent Current
IVS(off) –7 1 5 µ A VINH = 0 V VIN = 0 V or 5 V Tj <85 °C –– 6 5 µ A VINH = 0 V VIN = 0 V or 5 V -40 0 40 80 1 20 1 60 T IVS(off) [A] [°C]
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 9 Rev. 2.0, 2006-05-09
4.2 Power Stages
The power stages of the BTS 7970B consist of a p-channel vertical DMOS transistor for the high side switch and a n-channel vertical DMOS transistor for the low side switch. All protection and diagnostic functions are located in a separate top chip. Both switches can be operated up to 25 kHz, allowing active freewheeling and thus minimizing power dissipation in the forward operation of the integrated diodes. The on state resistance RON is dependent on the supply voltage VS as well as on the junction temperature Tj . The typical on state resistance characteristics are shown in Figure 6. Figure 6 Typical On State Resistance vs. Supply Voltage 4 8 1 2 1 6 20 24 28 VS RON (H S) mΩ V Tj = 150°C Tj = 25°C Tj = -40°C High Side Switch 4 8 1 2 1 6 20 24 28 VS RON (LS) mΩ V Tj = 150°C Tj = 25°C Tj = -40°C Low Side Switch
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 10 Rev. 2.0, 2006-05-09
4.2.1 Power Stages - Static Characteristics
– 40 °C < Tj < 150 °C, 8 V < VS < 18 V (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Test Conditions min. typ. max. High Side Switch - Static Characteristics
4.2.1 On state high side
RON(HS) 12.5 mΩ IOUT = 20 A VS= 13.5 V Tj = 25 °C Tj = 150 °C
4.2.2 Leakage current high
IL(LKHS) ––1 µ A VINH = 0 V VOUT = 0 V Tj < 85 °C – – 50 µA VINH = 0 V VOUT = 0 V Tj = 150 °C
4.2.3 Reverse diode
side 1) 1) Due to active freewheeling, diode is conducting only for a few µs, depending on R SR VDS(HS) 0.9 0.8 0.6 1.5 1.1 0.8 V IOUT =- 9A Tj = -40 °C Tj = 25 °C Tj = 150 °C Low Side Switch - Static Characteristics
4.2.4 On state low side
RON(LS) mΩ IOUT =- 2 0A VS= 13.5V Tj = 25 °C Tj = 150 °C
4.2.5 Leakage current low
IL(LKLS) ––1 µ A VINH = 0 V VOUT = VS Tj < 85 °C – – 15 µA VINH = 0 V VOUT = VS Tj = 150 °C
4.2.6 Reverse diode
side 1) VSD(LS) 0.9 0.8 0.6 1.5 1.1 0.8 V IOUT = 9 A Tj = -40 °C Tj = 25 °C Tj = 150 °C
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 11 Rev. 2.0, 2006-05-09
4.2.2 Switching Times
Figure 7 Definition of switching times high side (R load to GND) Figure 8 Definition of switching times low side (R load to VS) Due to the timing differences for the rising and the falling edge there will be a slight difference between the length of the input pulse and the length of the output pulse. It can be calculated using the following formulas: ∆tHS = (tdr(HS) + 0.5 tr(HS)) - (tdf(HS) + 0.5 tf(HS)) ∆tLS = (tdf(LS) + 0.5 tf(LS)) - (tdr(LS) + 0.5 tr(LS)). IN VOUT t t 90% 10% ∆VOU T 90% 10% tdr(HS ) tr(HS ) tdf(HS) tf(HS ) ∆VOU T IN VOU T t t 90% 10% 90% 10% ∆VOUT t df(LS) tf(LS ) ∆VOU T t dr(LS) tr(LS )
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 12 Rev. 2.0, 2006-05-09
4.2.3 Power Stages - Dynamic Characteristics
-40 °C < Tj < 150 °C, VS = 13.5 V, Rload = 2Ω (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Test Conditions min. typ. max. HIgh Side Switch Dynamic Characteristics
4.2.7 Rise-time of HS
tr(HS) 0.5 1.5 µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.8 Slew rate HS on ∆VOUT/
tr( HS) – 1.6 V/µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.9 Switch on delay time
tdr(HS) 1.7 5.6 3.1 4.4 4.3 22.4 µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.10 Fall-time of HS tf(HS)
0.5 1.5 µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.11 Slew rate HS off -∆VOUT/
tf(HS) – 1.6 V/µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.12 Switch off delay time
tdf(HS) 1.2 2.4 3.4 3.2 µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 13 Rev. 2.0, 2006-05-09 Low Side Switch Dynamic Characteristics
4.2.13 Rise-time of LS tr(LS)
0.5 1.5 µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.14 Slew rate LS switch off ∆VOUT/
tr(LS) – 1.6 V/µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.15 Switch off delay time
tdr(LS) 0.6 2.6 1.3 2.2 1.9 µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.16 Fall-time of LS tf(LS)
0.5 1.5 µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.17 Slew rate LS switch on -∆VOUT/
tf(LS) – 1.6 V/µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ
4.2.18 Switch on delay time
tdf(LS) 2.3 6.4 3.6 5.6 5.0 25.4 µs RSR = 0 Ω RSR = 5.1 kΩ RSR = 51 kΩ -40 °C < Tj < 150 °C, VS = 13.5 V, Rload = 2Ω (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Test Conditions min. typ. max.
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 14 Rev. 2.0, 2006-05-09
4.3 Protection Functions
The device provides integrated protection functions. These are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not to be used for continuous or repetitive operation, with the exception of the current limitation (Chapter 4.3.4). In a fault condition the BTS 7970B will apply the highest slew rate possible independent of the connected slew rate resistor. Overvoltage, overtemperature and overcurrent are indicated by a fault current I IS(LIM) at the IS pin as described in the paragraph “Status Flag Diagnosis With Current Sense Capability” on Page 18 and Figure 12. In the following the protection functions are listed in order of their priority. Overvoltage lock out overrides all other error modes.
4.3.1 Overvoltage Lock Out
To assure a high immunity against overvoltages (e.g. load dump conditions) the device shuts the lowside MOSFET off and turns the highside MOSFET on, if the supply voltage is exceeding the over voltage protection level VOV(OFF). The IC operates in normal mode again with a hysteresis VOV(HY) if the supply voltage decreases below the switch-on voltage VOV(ON). In H-bridge configuration, this behavior of the BTS 7970B will lead to freewheeling in highside during over voltage.
4.3.2 Undervoltage Shut Down
To avoid uncontrolled motion of the driven motor at low voltages the device shuts off (output is tri-state), if the supply voltage drops below the switch-off voltage VUV(OFF). The IC becomes active again with a hysteresis VUV(HY) if the supply voltage rises above the switch-on voltage VUV(ON).
4.3.3 Overtemperature Protection
The BTS 7970B is protected against overtemperature by an integrated temperature sensor. Overtemperature leads to a shut down of both output stages. This state is latched until the device is reset by a low signal with a minimum length of treset at the INH pin, provided that its temperature has decreased at least the thermal hysteresis ∆T in the meantime. Repetitive use of the overtemperature protection might reduce lifetime.
4.3.4 Current Limitation
The current in the bridge is measured in both switches. As soon as the current in forward direction in one switch (high side or low side) is reaching the limit ICLx, this switch is deactivated and the other switch is activated for tCLS . During that time all changes at the
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 16 Rev. 2.0, 2006-05-09 Figure 11 Typical Current Limitation Detection Levels vs. Supply Voltage In combination with a typical inductive load, such as a motor, this results in a switched mode current limitation. That way of limiting the current has the advantage that the power dissipation in the BTS 7970B is much smaller than by driving the MOSFETs in linear mode. Therefore it is possible to use the current limitation for a short time without exceeding the maximum allowed junction temperature (e.g. for limiting the inrush current during motor start up). However, the regular use of the current limitation is allowed only as long as the specified maximum junction temperature is not exceeded. Exceeding this temperature can reduce the lifetime of the device.
4.3.5 Short Circuit Protection
The device is short circuit protected against output short circuit to ground output short circuit to supply voltage short circuit of load The short circuit protection is realized by the previously described current limitation in combination with the over-temperature shut down of the device. Please note: Due to the higher priority of the overvoltage protection the short circuit protection is inactive in overvoltage conditions. 6 8 10 12 14 16 18 2 0 VS ICLH A V Tj = 150°C Tj = -40°C High Side Switch Tj = 25°C 6 8 10 12 14 16 18 2 0 VS ICLL A V Tj = 150°C Tj = 25°C Tj = -40°C Low Side Switch
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 17 Rev. 2.0, 2006-05-09
4.3.6 Electrical Characteristics - Protection Functions
– 40 °C < Tj < 150 °C; 8 V < VS < 18 V (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Test Conditions min. typ. max. Under Voltage Shut Down
4.3.1 Switch-ON voltage
VUV(ON) –– 5 . 5 V VS increasing 4.3.2 Switch-OFF voltage VUV(OFF) 4.0 – 5.4 V VS decreasing 4.3.3 ON/OFF hysteresis VUV(HY) –0 . 2– V – Over Voltage Lock Out
4.3.4 Switch-ON voltage
VOV(ON) 27.8 – – V VS decreasing
4.3.5 Switch-OFF voltage VOV(OFF) 28 – 30 V VS increasing
4.3.6 ON/OFF hysteresis VOV(HY) –0 . 2– V – Current Limitation
4.3.7 Current limitation
A VS=13.5 V Tj = -40 °C Tj = 25 °C Tj = 150 °C
4.3.8 Current limitation
A VS=13.5V Tj = -40 °C Tj = 25 °C Tj = 150 °C Current Limitation Timing
4.3.9 Shut off time for HS
tCLS 70 115 210 µs VS=13.5V Thermal Shut Down
4.3.10 Thermal shut down
TjSD 155 175 200 °C–
4.3.11 Thermal switch on
TjSO 150 – 190 °C–
4.3.12 Thermal hysteresis ∆T –7– K–
4.3.13 Reset pulse at INH pin
(INH low) treset 4–– µ s –
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 18 Rev. 2.0, 2006-05-09
4.4 Control and Diagnostics
4.4.1 Input Circuit
The control inputs IN and INH consist of TTL/CMOS compatible schmitt triggers with hysteresis which control the integrated gate drivers for the MOSFETs. Setting the INH pin to high enables the device. In this condition one of the two power switches is switched on depending on the status of the IN pin. To deactivate both switches, the INH pin has to be set to low. No external driver is needed. The BTS 7970B can be interfaced directly to a microcontroller.
4.4.2 Dead Time Generation
In bridge applications it has to be assured that the highside and lowside MOSFET are not conducting at the same time, connecting directly the battery voltage to GND. This is assured by a circuit in the driver IC, generating a so called dead time between switching off one MOSFET and switching on the other. The dead time generated in the driver IC is automatically adjusted to the selected slew rate.
4.4.3 Adjustable Slew Rate
In order to optimize electromagnetic emission, the switching speed of the MOSFETs is adjustable by an external resistor. The slew rate pin SR allows the user to optimize the balance between emission and power dissipation within his own application by connecting an external resistor RSR to GND.
4.4.4 Status Flag Diagnosis With Current Sense Capability
The status pin IS is used as a combined current sense and error flag output. In normal operation (current sense mode), a current source is connected to the status pin, which delivers a current proportional to the forward load current flowing through the active high side switch. If the high side switch is inactive or the current is flowing in the reverse direction no current will be driven except for a marginal leakage current IIS(LK). The external resistor RIS determines the voltage per output current. E.g. with the nominal value of 19500 for the current sense ratio kILIS = IL / IIS, a resistor value of RIS = 1kΩ leads to VIS = (IL / 19.5 A)V. Due to the good long term stability and the low temperature coefficient it is possible to improve the absolute current sense accuracy in the application by calibration. For best results it is recommended to do a two-point calibration. In case of a fault condition the status output is connected to a current source which is independent of the load current and provides IIS(lim). The maximum voltage at the IS pin is determined by the choice of the external resistor and the supply voltage. In case of current limitation the IIS(lim) is activated for 2 * tCLS.
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 20 Rev. 2.0, 2006-05-09
4.4.5 Truth Table
Device State Inputs Outputs Mode INH IN HSS LSS IS Normal operation 0 X OFF OFF 0 Stand-by mode 1 0 OFF ON 0 LSS active 1 1 ON OFF CS HSS active Over-voltage (OV) X X ON OFF 1 Shut-down of LSS, HSS activated, error detected Under-voltage (UV) X X OFF OFF 0 UV lockout Overtemperature (OT) 0 X OFF OFF 0 Stand-by mode, reset of latch
1 X OFF OFF 1 Shut-down with latch,
Current limitation 1 1 OFF ON 1 Switched mode, error detected 1) Will return to normal operation after tCLS; Error signal is reset after 2*tCLS (see Chapter 4.3.4) 1 0 ON OFF 1 Switched mode , error detected1) Inputs: Switches Status Flag IS: 0 = Logic LOW OFF = switched off CS = Current sense mode 1 = Logic HIGH ON = switched on 1 = Logic HIGH (error) X = 0 or 1
High Current PN Half Bridge BTS 7970B Block Description and Characteristics Data Sheet 21 Rev. 2.0, 2006-05-09
4.4.6 Electrical Characteristics - Control and Diagnostics
– 40 °C < Tj < 150 °C, 8 V < VS < 18 V (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Test Conditions min. typ. max. Control Inputs (IN and INH)
4.4.1 High level voltage
INH, IN VINH(H) VIN(H) –1 . 7 5 1.6 2.15
4.4.2 Low level voltage
INH, IN VINH(L) VIN(L) 1.1 1.4 – V –
4.4.3 Input voltage
mV –
4.4.4 Input current
IINH(H) IIN(H) – 30 150 µA VIN = VINH= 5.3 V
4.4.5 Input current IINH(L)
IIN(L) – 25 125 µA VIN = VINH=0.4 V Current Sense
4.4.6 Current sense ratio in
kILIS = IL / IIS kILIS 19.5 19.5 19.5
3 RIS = 1 kΩ
IL = 40 A IL = 20 A IL = 10 A
4.4.7 Maximum analog
sense current, sense current in fault condition IIS(lim) 45 6 . 5 m A VS = 13.5 V RIS = 1kΩ
4.4.8 Isense leakage current IISL ––1 µ A VIN= 0 V or
VINH= 0 V
4.4.9 Isense leakage current,
IISH –12 0 0 µ A VIN = VINH= 5 V IL= 0 A
4.4.10 Current sense ratio
long term drift1) 1) Not subject to production test, specified by design. dkILIS -1.5 1.5 % Q100 qualification
4.4.11 Current sense ratio
coefficient1) dkILIS/ dT 4.4.13 -0.05 -0.025 0 IL= 40 A
High Current PN Half Bridge BTS 7970B Thermal Characteristics Data Sheet 22 Rev. 2.0, 2006-05-09
5 Thermal Characteristics
Note: Thermal characteristics are not subject to production test - specified by design. Pos Parameter Symbol Limits Unit Test Condition min max
5.0.1 Thermal Resistance
Junction-Case, Low Side Switch Rthjc(LS) = ∆Tj(LS)/ Pv(LS) Rthjc(LS) –1 . 8 K / W
5.0.2 Thermal Resistance
Junction-Case, High Side Switch Rthjc(HS) = ∆Tj(HS)/ Pv(HS) Rthjc(HS) –0 . 9 K / W
5.0.3 Thermal Resistance
Junction-Case, both Switches Rthjc= max[∆Tj(HS), ∆Tj(LS)] / (Pv(HS) + Pv(LS)) Rthjc –1 . 0 K / W
5.0.4 Thermal Resistance
Rthja –3 5 K / W 6 c m 2 cooling area
High Current PN Half Bridge BTS 7970B Application Data Sheet 23 Rev. 2.0, 2006-05-09
6 Application
6.1 Application Example
Figure 14 Application Example: H-Bridge with two BTS 7970B
6.2 Layout Considerations
Due to the fast switching times for high currents, special care has to be taken to the PCB layout. Stray inductances have to be minimized in the power bridge design as it is necessary in all switched high power bridges. The BTS 7970B has no separate pin for power ground and logic ground. Therefore it is recommended to assure that the offset between the ground connection of the slew rate resistor, the current sense resistor and ground pin of the device (GND / pin 1) is minimized. If the BTS 7970B is used in a H- bridge or B6 bridge design, the voltage offset between the GND pins of the different devices should be small as well. A ceramic capacitor from VS to GND close to each device is recommended to provide current for the switching phase via a low inductance path and therefore reducing noise and ground bounce. A reasonable value for this capacitor would be about 470 nF. The digital inputs need to be protected from excess currents (e.g. caused by induced voltage spikes) by series resistors in the range of 10 kΩ. VS OUT INH IN IS SR GND BTS 7970B VS OUT INH IN IS SR GND BTS 7970B M µC TLE 4278G VS I/O Reset Vdd Vss WO RO Q D GND I SPD 50P03L Microcontroller Reverse Polarity Protection Voltage Regulator High Current H-Bridge I/O I/O I/O I/O I/O
High Current PN Half Bridge BTS 7970B Package Outlines P-TO-263-7 Data Sheet 24 Rev. 2.0, 2006-05-09
7 Package Outlines P-TO-263-7
10.8 9.4 16.15 4.6 0.47 0.8 8.42 6.6 7.5 9.9 A 6.5±0.2 9.2 ±0.3 10.2 ±0.15 (14.9) 0...0.15 7 x 0.6+0.1 -0.03 6 x 1.27
0.25 M AB
0.05 B 1.3+0.1 -0.02 4.4 0.1 2.4 2.7 ±0.5 4.7 ±0.5 ±0.150.5 8° MAX. All metal sufaces tin plated, except area of cut . Back side, heatsink contour 1) Shear and punch direction no burrs this surface 0.1 B P-TO-263-7 (Plastic Transistor Single Outline Package) Footprint You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mmSMD = Surface Mounted Device
High Current PN Half Bridge BTS 7970B
Revision History
8 Revision History
Version Date Changes / Comments Rev. 0.1 2005-07-20 Target Data Sheet Rev. 1.0 2006-05-04 Preliminary Data Sheet Rev. 2.0 2006-05-09 Data Sheet
81726 München, Germany
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