BTS725L1 SIEMENS | Alldatasheet

Document overview

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  • PDF pages: 14

Technical content

Features

  • Overload protection
  • Current limitation
  • Short-circuit protection
  • Thermal shutdown
  • Overvoltage protection (including load dump)
  • Reverse battery protection1)
  • Undervoltage and overvoltage shutdown with auto-restart and hysteresis
  • Open drain diagnostic output
  • Open load detection in ON-state
  • CMOS compatible input
  • Loss of ground and loss of Vbb protection
  • Electrostatic discharge (ESD ) protection Application
  • µC compatible power switch with diagnostic feedback for 12 V DC grounded loads
  • Most suitable for resistive and lamp loads
  • Replaces electromechanical relays and discrete circuits General Description N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology. Fully protected by embedded protection functions. Pin Definitions and Functions Pin Symbol Function 1,10, 11,12, 15,16, 19,20 V bb Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance

3 IN1 Input 1,2, activates channel 1,2 in case of

7 IN2 logic high signal

17,18 OUT1 Output 1,2, protected high-side power output 13,14 OUT2 of channel 1,2. Design the wiring for the max. short circuit current

4 ST1 Diagnostic feedback 1,2 of channel 1,2,

8 ST2 open drain, low on failure

2 GND1 Ground 1 of chip 1 (channel 1)

6 GND2 Ground 2 of chip 2 (channel 2)

5,9 N.C. Not Connected 1) With external current limit (e.g. resistor RGND =150 Ω ) in GND connection, resistor in series with ST connection, reverse load current limited by connected load. Product Summary Overvoltage Protection Vbb(AZ) 43 V Operating voltage Vbb(on) 5.0 ... 24 V active channels: one two parallel On-state resistance R ON 60 30 m Ω Nominal load currentIL(NOM) 4.0 6.0 A Current limitation IL(SCr) 17 17 A Pin configuration (top view) Vbb 1 • 20 V bb GND1 2 19 V bb IN1 3 18 OUT1 ST1 4 17 OUT1 N.C. 5 16 V bb GND2 6 15 V bb IN2 7 14 OUT2 ST2 8 13 OUT2 N.C. 9 12 V bb Vbb 10 11 V bb

Two Channels; Open Load detection in on state; IN1 ST1 ESD Logic Voltage sensor Voltage source Open load detection Charge pump Level shifter Temperature sensorRectifier Gate protection Current limit VLogic Overvoltage protection GND1 RO1 Signal GND GND11 Chip 1 Chip 1 IN2 ST2 PROFET  GND2 RO2 Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20 Signal GND GND2 Chip 2 Chip 2 + Vbb OUT1 Leadframe 17,18 Load GND Load + Vbb OUT2 Leadframe 13,14 Load GND Load Logic and protection circuit of chip 2 (equivalent to chip 1) Maximum Ratings at Tj = 25°C unless otherwise specified Parameter Symbol Values Unit Supply voltage (overvoltage protection see page 4)Vbb 43 V Supply voltage for full short circuit protection Tj,start = -40 ...+150°C Vbb 24 V

Maximum Ratings at Tj = 25°C unless otherwise specified Parameter Symbol Values Unit Semiconductor Group 3 Load current (Short-circuit current, see page 5)IL self-limited A Load dump protection2) VLoadDump = U A + Vs, U A = 13.5 V R I3) = 2 Ω , td = 200 ms; IN = low or high, each channel loaded with R L = 3.4 Ω , VLoad dump 4) 60 V Operating temperature range Storage temperature range Tj Tstg -40 ...+150 -55 ...+150 Power dissipation (DC)5 Ta = 25°C: (all channels active) Ta = 85°C: Ptot 3.7 1.9 W Electrostatic discharge capability (ESD ) (Human Body Model) VESD 1.0 kV Input voltage (DC) VIN -10 ... +16 V Current through input pin (DC) Current through status pin (DC) see internal circuit diagram page 8 IIN IST ±2.0 ±5.0 mA Thermal resistance junction - soldering point5),6) each channel: R thjs 12 K/W junction - ambient5) one channel active: all channels active: R thja 41 2) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a 150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for input protection is integrated. 3) R I = internal resistance of the load dump test pulse generator 4) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 5) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 6) Soldering point: upper side of solder edge of device pin 15. See page 14

Electrical Characteristics

Parameter and Conditions, each of the two channelsSymbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT) IL = 2 A each channel, Tj = 25°C: Tj = 150°C: two parallel channels, Tj = 25°C: R ON -- 50 100 120 m Ω

Parameter and Conditions, each of the two channelsSymbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Semiconductor Group 4 Nominal load current one channel active: two parallel channels active: Device on PCB5), Ta = 85°C, Tj ≤ 150°C IL(NOM) 3.6 5.5 4.0 6.0 -- A Output current while GND disconnected or pulled up; Vbb = 30 V, VIN = 0, see diagram page 9 IL(GNDhigh) -- -- 10 mA Turn-on time to 90% VOUT : Turn-off time to 10% VOUT : ton toff 200 230 400 450 µs Slew rate on 10 to 30% VOUT , R L = 12 Ω , Tj =-40...+150°C: dV/dton 0.1 -- 1 V/ µs Slew rate off 70 to 40% VOUT , R L = 12 Ω , Tj =-40...+150°C: -dV/dtoff 0.1 -- 1 V/ µs Operating Parameters Operating voltage7) Tj =-40...+150°C:Vbb(on) 5.0 -- 24 V Undervoltage restart Tj =-40...+150°C:Vbb(u rst) -- -- 5.0 V Undervoltage restart of charge pump see diagram page 13 Tj =-40...+150°C: Vbb(ucp) -- 5.6 7.0 V Undervoltage hysteresis ΔVbb(under) = Vbb(u rst) - Vbb(under) ΔVbb(under) -- 0.2 -- V Overvoltage shutdown Tj =-40...+150°C:Vbb(over) 24 -- 34 V Overvoltage restart Tj =-40...+150°C:Vbb(o rst) 23 -- -- V Overvoltage hysteresis Tj =-40...+150°C:ΔVbb(over) -- 0.5 -- V Overvoltage protection8) Tj =-40...+150°C: I bb = 40 mA Vbb(AZ) 42 47 -- V Standby current, all channels offTj =25°C: VIN = 0 Tj =150°C: Ibb(off) -- µA Leakage output current (included in Ibb(off)) VIN = 0 IL(off) -- -- 12 µA Operating current 9), VIN = 5V, Tj =-40...+150°C IGND = IGND1 + IGND2 , one channel on: two channels on: IGND -- 1.8 3.6 3.5 mA 7) At supply voltage increase up to Vbb = 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V 8) see also VON(CL) in circuit diagram on page 8. 9) Add IST , if IST > 0

Parameter and Conditions, each of the two channelsSymbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Semiconductor Group 5 Protection Functions Initial peak short circuit current limit, (see timing diagrams, page 11) each channel, Tj =-40°C: Tj =25°C: Tj =+150°C: IL(SCp) 27 A two parallel channels twice the current of one channel Repetitive short circuit current limit, Tj = Tjt each channel two parallel channels (see timing diagrams, page 11) IL(SCr) -- A Initial short circuit shutdown timeTj,start =-40°C: Tj,start = 25°C: (see page 10 and timing diagrams on page 11) toff(SC) -- ms Thermal overload trip temperature Tjt 150 -- -- °C Thermal hysteresis ΔTjt -- 10 -- K Reverse Battery Reverse battery voltage 10) -Vbb -- -- 32 V Drain-source diode voltage (Vout> Vbb) -VON -- 610 -- mV Diagnostic Characteristics Open load detection current, (on-condition) each channel, Tj = -40°C: Tj = 25°C: Tj = +150°C: I L (OL)4 10 800 600 600 mA two parallel channels twice the current of one channel Open load detection voltage11) Tj =-40..+150°C:VOUT(OL) 234 V Internal output pull down (OUT to GND), VOUT = 5 V Tj =-40..+150°C:R O 41 03 0 k Ω 10) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 8). 11) External pull up resistor required for open load detection in off state.

Parameter and Conditions, each of the two channelsSymbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Semiconductor Group 6 Input and Status Feedback12) Input resistance (see circuit page 8) Tj =-40..+150°C: R I 2.5 3.5 6 k Ω Input turn-on threshold voltage Tj =-40..+150°C: VIN(T+) 1.7 -- 3.5 V Input turn-off threshold voltage Tj =-40..+150°C: VIN(T-) 1.5 -- -- V Input threshold hysteresis Δ VIN(T) -- 0.5 -- V Off state input current VIN = 0.4 V: Tj =-40..+150°C: IIN(off) 1- - 5 0 µA On state input current VIN = 5 V: Tj =-40..+150°C: IIN(on) 20 50 90 µA Delay time for status with open load after switch off (see timing diagrams, page 12), Tj =-40..+150°C: td(ST OL4) 100 520 1000 µs Status invalid after positive input slope (open load) Tj =-40..+150°C: td(ST) -- 250 600 µs Status output (open drain) Zener limit voltageTj =-40...+150°C, IST = +1.6 mA: ST low voltage Tj =-40...+25°C, IST = +1.6 mA: Tj = +150°C, IST = +1.6 mA: VST(high) VST(low) 5.4 6.1 0.4 0.6 V 12) If ground resistors RGND are used, add the voltage drop across these resistors.

Cannel 1 Input 1 Output 1 Status 1 Cannel 2 Input 2 Output 2 Status 2 level level BTS 725L1 Normal operation L H L H H H Open load L H Z H H (L13)) L Short circuit to V bb L H H H L14) H (L15)) Overtem- perature L H L L H L Under- voltage L H L L H H Overvoltage L H L L H H L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit H = "High" Level Status signal valid after the time delay shown in the timing diagrams Parallel switching of channel 1 and 2 is easily possible by connecting the inputs and outputs in parallel. The status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor. Terms PROFET IN1 ST1 OUT1 GND1 Vbb VST1V IN1 IIN1 Vbb IL1 VOUT1IGND1 VON1 Leadframe 17,18 Ibb IST1 R GND1 Chip 1 PROFET IN2 ST2 OUT2 GND2 Vbb V ST2V IN2 IIN2 IL2 VOUT2IGND2 VON2 Leadframe 13,14IST2 R GND2 Chip 2 Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20 External RGND optional; two resistors RGND1 , RGND2 = 150 Ω or a single resistor RGND = 75 Ω for reverse battery protection up to the max. operating voltage. 13) With external resistor between output and Vbb 14) An external short of output to Vbb in the off state causes an internal current from output to ground. If RGND is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious. 15) Low resistance to Vbb may be detected by no-load-detection

Input circuit (ESD protection), IN1 or IN2 IN GND IR ESD-ZD III ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). Status output, ST1 or ST2 ST GND ESD- ZD +5V R ST(ON) ESD-Zener diode: 6.1 V typ., max 5.0 mA; RST(ON) < 380 Ω at 1.6 mA, ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). overvoltage output clamp, OUT1 or OUT2 +V bb OUT PROFET VZ V ON Power GND VON clamped to VON(CL) = 47 V typ. Overvoltage protection of logic part GND1 or GND2 + Vbb IN ST STR GND GNDR Signal GND Logic PROFET V Z2 IR V Z1 R GND = 150 Ω , RST = 15 kΩ nominal. Reverse battery protection GND Logic STR IN ST + 5V OUT LR Power GND GNDR Signal GND Power Inverse IR Vbb- Diode R GND = 150 Ω, R I = 3.5 kΩ typ, Temperature protection is not active during inverse current operation.

Open-load detection, OUT1 or OUT2 ON-state diagnostic condition: VON < RON ·IL(OL); IN high Open load detection Logic unit + Vbb OUT ON VON OFF-state diagnostic condition: VOUT > 3 V typ.; IN low Open load detection Logic unit V OUT Signal GND R EXT R O OFF GND disconnect PROFET V IN ST OUT GND bb Vbb VIN VST VGND In case of IN = high is VOUT ≈ VIN - VIN(T+). Due to VGND > 0, no VST = low signal available. GND disconnect with GND pull up PROFET V IN ST OUT GND bb Vbb VGND V IN VST If VGND > VIN - VIN(T+) device stays off Due to VGND > 0, no VST = low signal available.

Typ. on-state resistance R ON = f (Vbb,Tj ); IL = 2 A, IN = high R ON [mOhm] 100 125 150 01 0 2 0 3 0 Tj = 150°C 85°C 25°C -40° C Vbb [V] Typ. open load detection current IL(OL) = f (Vbb,Tj ); IN = high IL(OL) [mA] 100 150 200 250 300 350 400 450 500 0 5 10 15 20 25 no load detection not specified for Vbb < 6 V Vbb [V] Typ. standby current Ibb(off) = f (Tj ); Vbb = 9...24 V, IN1,2 = low Ibb(off) [µA] -50 0 50 100 150 200 Tj [°C] Typ. initial short circuit shutdown time toff(SC) = f (Tj,start ); Vbb =12 V toff(SC) [msec] -50 0 50 100 150 200 Tj,start [°C]

Standard P-DSO-20-9 Ordering Code BTS725L1 Q67060-S7006-A2 All dimensions in millimetres 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side Definition of soldering point with temperature Ts: upper side of solder edge of device pin 15. Pin 15 Printed circuit board (FR4, 1.5mm thick, one layer 70µm, 6cm2 active heatsink area) as a reference for max. power dissipation Ptot, nominal load current IL(NOM) and thermal resistance Rthja