BTS711L1 SIEMENS | Alldatasheet

Document overview

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Technical content

Features

  • Overload protection
  • Current limitation
  • Short-circuit protection
  • Thermal shutdown
  • Overvoltage protection (including load dump)
  • Fast demagnetization of inductive loads
  • Reverse battery protection1)
  • Undervoltage and overvoltage shutdown with auto-restart and hysteresis
  • Open drain diagnostic output
  • Open load detection in ON-state
  • CMOS compatible input
  • Loss of ground and loss of Vbb protection
  • Electrostatic discharge (ESD ) protection Application
  • µC compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads
  • All types of resistive, inductive and capacitive loads
  • Replaces electromechanical relays and discrete circuits General Description N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology. Fully protected by embedded protection functions. Pin Definitions and Functions Pin Symbol Function 1,10, 11,12, 15,16, 19,20 V bb Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 4 and also for low thermal resistance 3 IN1 Input 1 .. 4, activates channel 1 .. 4 in case of

5 IN2 logic high signal

7 IN3

9 IN4

18 OUT1 Output 1 .. 4, protected high-side power output 17 OUT2 of channel 1 .. 4. Design the wiring for the 14 OUT3 max. short circuit current

13 OUT4

4 ST1/2 Diagnostic feedback 1/2 of channel 1 and

channel 2, open drain, low on failure

8 ST3/4 Diagnostic feedback 3/4 of channel 3 and

channel 4, open drain, low on failure

2 GND1/2 Ground 1/2 of chip 1 (channel 1 and channel 2)

6 GND3/4 Ground 3/4 of chip 2 (channel 3 and channel 4)

1) With external current limit (e.g. resistor RGND =150 Ω ) in GND connection, resistor in series with ST connection, reverse load current limited by connected load. Product Summary Overvoltage Protection Vbb(AZ) 43 V Operating voltage Vbb(on) 5.0 ... 34 V active channels: one two parallel four parallel On-state resistanceR ON 200 100 50 m Ω Nominal load currentIL(NOM ) 1.9 2.8 4.4 A Current limitationIL(SCr) 44 4 A Pin configuration (top view) Vbb 1 • 20 V bb GND1/2 2 19 V bb IN1 3 18 OUT1 ST1/2 4 17 OUT2 IN2 5 16 V bb GND3/4 6 15 V bb IN3 7 14 OUT3 ST3/4 8 13 OUT4 IN4 9 12 V bb Vbb 10 11 V bb

Four Channels; Open Load detection in on state; + Vbb IN1 ST1/2 ESD OUT1 Logic Voltage sensor Voltage source Open load detection 1 Short to Vbb Level shifter Temperature sensor 1 Rectifier 1 Limit for unclamped ind. loads 1 Gate 1 protection Current limit 1 V Logic Overvoltage protection OUT2 Open load detection 2 Short to Vbb Level shifter Temperature sensor 2 Rectifier 2 Limit for unclamped ind. loads 2 Gate 2 protection Current limit 2 IN25 GND1/2 RRO1 O2 Charge pump 1 Charge pump 2 Channel 2 Channel 1 Signal GND GND1/22 Chip 1Chip 1 + Vbb IN3 ST3/4 PROFET  OUT3 OUT4 IN49 GND3/4 RRO3 O4 Channel 4 Channel 3 Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20 Leadframe Load GND Load Leadframe Load GND Load Signal GND GND3/46 Chip 2Chip 2 Logic and protection circuit of chip 2 (equivalent to chip 1) Maximum Ratings at Tj = 25°C unless otherwise specified Parameter Symbol Values Unit Supply voltage (overvoltage protection see page 4)Vbb 43 V Supply voltage for full short circuit protection Tj,start = -40 ...+150°C Vbb 34 V

Maximum Ratings at Tj = 25°C unless otherwise specified Parameter Symbol Values Unit Semiconductor Group 3 Load current (Short-circuit current, see page 5)IL self-limited A Load dump protection2) VLoadDump = U A + Vs, U A = 13.5 V R I3) = 2 Ω , td = 200 ms; IN = low or high, each channel loaded with R L = 7.1 Ω , VLoad dump4) 60 V Operating temperature range Storage temperature range Tj Tstg -40 ...+150 -55 ...+150 Power dissipation (DC)5 Ta = 25°C: (all channels active) Ta = 85°C: Ptot 3.6 1.9 W Inductive load switch-off energy dissipation, single pulse Vbb = 12V, Tj,start = 150°C5), IL = 1.9 A, ZL = 66 mH, 0 Ω one channel: IL = 2.8 A, ZL = 66 mH, 0 Ω two parallel channels: IL = 4.4 A, ZL = 66 mH, 0 Ω four parallel channels: see diagrams on page 9 and page 10 EAS 150 320 800 mJ Electrostatic discharge capability (ESD ) (Human Body Model) VESD 1.0 kV Input voltage (DC) VIN -10 ... +16 V Current through input pin (DC) Current through status pin (DC) see internal circuit diagram page 8 IIN IST ±2.0 ±5.0 mA Thermal resistance junction - soldering point5),6) each channel: R thjs 16 K/W junction - ambient5) one channel active: all channels active: R thja 44 2) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a 150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for input protection is integrated. 3) R I = internal resistance of the load dump test pulse generator 4) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 5) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 15 6) Soldering point: upper side of solder edge of device pin 15. See page 15

Electrical Characteristics

Parameter and Conditions, each of the four channelsSymbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT) IL = 1.8 A each channel, Tj = 25°C: Tj = 150°C: two parallel channels, Tj = 25°C: four parallel channels, Tj = 25°C: R ON -- 165 320 200 400 100 m Ω Nominal load current one channel active: two parallel channels active: four parallel channels active: Device on PCB5), Ta = 85°C, Tj ≤ 150°C IL(NOM) 1.7 2.6 4.1 1.9 2.8 4.4 -- A Output current while GND disconnected or pulled up; Vbb = 30 V, VIN = 0, see diagram page 9 IL(GNDhigh) -- -- 10 mA Turn-on time to 90% VOUT : Turn-off time to 10% VOUT : ton toff 200 200 400 400 µs Slew rate on 10 to 30% VOUT , R L = 12 Ω , Tj =-40...+150°C: dV/dton 0.1 -- 1 V/ µs Slew rate off 70 to 40% VOUT , R L = 12 Ω , Tj =-40...+150°C: -dV/dtoff 0.1 -- 1 V/ µs Operating Parameters Operating voltage7) Tj =-40...+150°C:Vbb(on) 5.0 -- 34 V Undervoltage restart Tj =-40...+25°C: Tj =+150°C: Vbb(u rst) -- -- 5.0 7.0 V Undervoltage restart of charge pump see diagram page 14 Tj =-40...+150°C: Vbb(ucp) -- 5.6 7.0 V Undervoltage hysteresis ΔVbb(under) = Vbb(u rst) - Vbb(under) ΔVbb(under) -- 0.2 -- V Overvoltage shutdown Tj =-40...+150°C:Vbb(over) 34 -- 43 V Overvoltage restart Tj =-40...+150°C:Vbb(o rst) 33 -- -- V Overvoltage hysteresis Tj =-40...+150°C:ΔVbb(over) -- 0.5 -- V Overvoltage protection8) Tj =-40...+150°C: I bb = 40 mA Vbb(AZ) 42 47 -- V 7) At supply voltage increase up to Vbb = 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V 8) see also VON(CL) in circuit diagram on page 8.

Parameter and Conditions, each of the four channelsSymbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Semiconductor Group 5 Standby current, all channels offTj =25°C: VIN = 0 Tj =150°C: Ibb(off) -- µA Leakage output current (included in Ibb(off)) VIN = 0 IL(off) -- -- 12 µA Operating current 9), VIN = 5V, Tj =-40...+150°C IGND = IGND1/2 + IGND3/4 , one channel on: four channels on: IGND -- mA Protection Functions Initial peak short circuit current limit, (see timing diagrams, page 12) each channel, Tj =-40°C: Tj =25°C: Tj =+150°C: IL(SCp) 5.5 4.5 2.5 9.5 7.5 4.5 A two parallel channels twice the current of one channel four parallel channelsfour times the current of one channel Repetitive short circuit current limit, Tj = Tjt each channel two parallel channels four parallel channels (see timing diagrams, page 12) IL(SCr) -- A Initial short circuit shutdown timeTj,start =-40°C: Tj,start = 25°C: (see page 11 and timing diagrams on page 12) toff(SC) -- 5.5 ms Output clamp (inductive load switch off)10) at VON(CL) = Vbb - VOUT VON(CL) -- 47 -- V Thermal overload trip temperature Tjt 150 -- -- °C Thermal hysteresis ΔTjt -- 10 -- K Reverse Battery Reverse battery voltage 11) -Vbb -- -- 32 V Drain-source diode voltage (Vout> Vbb) -VON -- 610 -- mV 9) Add IST , if IST > 0 10) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest VON(CL) 11) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 8).

Parameter and Conditions, each of the four channelsSymbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Semiconductor Group 6 Diagnostic Characteristics Open load detection current, (on-condition) each channel, Tj = -40°C: Tj = 25°C: Tj = 150°C: I L (OL)1 10 200 150 150 mA two parallel channels twice the current of one channel four parallel channelsfour times the current of one channel Open load detection voltage12) Tj =-40..+150°C:VOUT(OL) 234 V Internal output pull down (OUT to GND), VOUT = 5 V Tj =-40..+150°C:R O 41 03 0 k Ω Input and Status Feedback13) Input resistance (see circuit page 8) Tj =-40..+150°C: R I 2.5 3.5 6 k Ω Input turn-on threshold voltage Tj =-40..+150°C: VIN(T+) 1.7 -- 3.5 V Input turn-off threshold voltage Tj =-40..+150°C: VIN(T-) 1.5 -- -- V Input threshold hysteresis Δ VIN(T) -- 0.5 -- V Off state input current VIN = 0.4 V: Tj =-40..+150°C: IIN(off) 1- - 5 0 µA On state input current VIN = 5 V: Tj =-40..+150°C: IIN(on) 20 50 90 µA Delay time for status with open load after switch off (other channel in off state) (see timing diagrams, page 13), Tj =-40..+150°C: td(ST OL4) 100 320 800 µs Delay time for status with open load after switch off (other channel in on state) (see timing diagrams, page 13), Tj =-40..+150°C: td(ST OL5) -- 5 20 µs Status invalid after positive input slope (open load) Tj =-40..+150°C: td(ST) -- 200 600 µs Status output (open drain) Zener limit voltageTj =-40...+150°C, IST = +1.6 mA: ST low voltage Tj =-40...+25°C, IST = +1.6 mA: Tj = +150°C, IST = +1.6 mA: VST(high) VST(low) 5.4 6.1 0.4 0.6 V 12) External pull up resistor required for open load detection in off state. 13) If ground resistors RGND are used, add the voltage drop across these resistors.

Channel 1 and 2 Chip 1 IN1 IN2 OUT1 OUT2 ST1/2 ST1/2 Channel 3 and 4 (equivalent to channel 1 and 2) Chip 2 IN3 IN4 OUT3 OUT4 ST3/4 ST3/4 BTS 711L1 BTS 712N1 Normal operation L L H H L H L H L L H H L H L H H H H H H H H H Open load Channel 1 (3) L L H L H X Z Z H L H X H(L14)) H L L H H Channel 2 (4) L H X L L H L H X Z Z H H(L14)) H L L H H Short circuit to Vbb Channel 1 (3) L L H L H X H H H L H X L 15) H H(L16)) L15) H H Channel 2 (4) L H X L L H L H X H H H L 15) H H(L16)) L15) H H Overtemperature both channel L X H L H X L L L L L L H L L H L L Channel 1 (3) L H X X L L X X H L H L Channel 2 (4) X X L H X X L L H L H L Undervoltage/ Overvoltage X X L L H H L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit H = "High" Level Status signal valid after the time delay shown in the timing diagrams Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4 have to be configured as a 'Wired OR' function with a single pull-up resistor. Terms PROFETIN2 ST1/2 OUT2 GND1/2 Vbb VOUT2IGND1/2 VON2 Leadframe IN1 VOUT1 VON1 IL1 OUT1 VIN1 VIN2 VST1/2 Ibb IIN1 IIN2 IST1/2 IL2 R GND1/2 Vbb Chip 1 PROFETIN4 ST3/4 OUT4 GND3/4 Vbb VOUT4IGND3/4 VON4 Leadframe IN3 VOUT3 VON3 IL3 OUT3 VIN3 VIN4 VST3/4 IIN3 IIN4 IST3/4 IL4 R GND3/4 Chip 2 Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20 External RGND optional; two resistors RGND1/2 ,RGND3/4 = 150 Ω or a single resistor RGND = 75 Ω for reverse battery protection up to the max. operating voltage. 14) With additional external pull up resistor 15) An external short of output to Vbb in the off state causes an internal current from output to ground. If RGND is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious. 16) Low resistance to Vbb may be detected by no-load-detection

Input circuit (ESD protection), IN1...4 IN GND IR ESD-ZD III ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). Status output, ST1/2 or ST3/4 ST GND ESD- ZD +5V R ST(ON) ESD-Zener diode: 6.1 V typ., max 5.0 mA; RST(ON) < 380 Ω at 1.6 mA, ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). Inductive and overvoltage output clamp, OUT1...4 +V bb OUT PROFET VZ V ON Power GND VON clamped to VON(CL) = 47 V typ. Overvoltage protection of logic part GND1/2 or GND3/4 + Vbb IN ST STR GND GNDR Signal GND Logic V Z2 IN R I V Z1 R GND = 150 Ω Reverse battery protection GND Logic STR IN ST + 5V OUT LR Power GND GNDR Signal GND Power Inverse IR Vbb- Diode R GND = 150 Ω, R I = 3.5 kΩ typ, Temperature protection is not active during inverse current operation.

Open-load detection, OUT1...4 ON-state diagnostic condition: VON < RON ·IL(OL); IN high Open load detection Logic unit + Vbb OUT ON VON OFF-state diagnostic condition: VOUT > 3 V typ.; IN low Open load detection Logic unit V OUT Signal GND R EXT R O OFF GND disconnect (channel 1/2 or 3/4) PROFET V IN2 ST OUT2 GND bb Vbb Ibb IN1 OUT1 VIN1VIN2VST VGND Any kind of load. In case of IN = high is VOUT ≈ VIN - VIN(T+). Due to VGND > 0, no VST = low signal available. GND disconnect with GND pull up (channel 1/2 or 3/4) PROFET V IN2 ST OUT2 GND bb Vbb IN1 OUT1VIN1 VIN2 VST VGND Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND > 0, no VST = low signal available. Vbb disconnect with energized inductive load PROFET V IN2 ST OUT2 GND bb Vbb IN1 OUT1high For an inductive load current up to the limit defined by EAS (max. ratings see page 3 and diagram on page 10) each switch is protected against loss of Vbb. Consider at your PCB layout that in the case of Vbb dis- connection with energized inductive load the whole load current flows through the GND connection.

Inductive load switch-off energy dissipation PROFET V IN ST OUT GND bb E E E E AS bb L R ELoad R L L {LZ Energy stored in load inductance: EL = 1/2·L·I2 L While demagnetizing load inductance, the energy dissipated in PROFET is EAS = Ebb + EL - ER = ∫ VON(CL)·iL(t) dt, with an approximate solution for RL > 0 Ω : EAS = IL· L 2·R L (Vbb + |VOUT(CL)|) ln (1+ IL·R L |VOUT(CL)| ) Maximum allowable load inductance for a single switch off (one channel)5) L = f (IL ); Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω L [mH] 100 1000 11 . 522 . 53 IL [A]

Typ. on-state resistance R ON = f (Vbb,Tj ); IL = 1.8 A, IN = high R ON [mOhm] 100 150 200 250 300 350 400 450 500 01 0 2 0 3 0 4 0 Tj = 150°C 85°C 25°C -40°C Vbb [V] Typ. open load detection current IL(OL) = f (Vbb,Tj ); IN = high IL(OL) [mA] 100 120 140 0 5 10 15 20 25 30 no load detection not specified for Vbb < 6 V Tj = 150°C 85°C 25°C -40°C Vbb [V] Typ. standby current Ibb(off) [µA] -50 0 50 100 150 200 Tj [°C] Typ. initial short circuit shutdown time toff(SC) = f (Tj,start ); Vbb =12 V toff(SC) [msec] -50 0 50 100 150 200 Tj,start [°C]

Standard P-DSO-20-9 Ordering Code BTS711L1 Q67060-S7000-A2 All dimensions in millimetres 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side Definition of soldering point with temperature Ts: upper side of solder edge of device pin 15. Pin 15 Printed circuit board (FR4, 1.5mm thick, one layer 70µm, 6cm2 active heatsink area) as a reference for max. power dissipation Ptot, nominal load current IL(NOM) and thermal resistance Rthja