BTS640S2

BTS640S2 INFINEON | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 15

Technical content

Features

• Short circuit protection
• Current limitation
• Proportional load current sense
• CMOS compatible input
• Open drain diagnostic output
• Fast demagnetization of inductive loads
• Undervoltage and overvoltage shutdown with auto-restart and hysteresis
• Overload protection
• Thermal shutdown
• Overvoltage protection including load dump (with external GND-resistor)
• Reverse battery protection (with external GND-resistor)
• Loss of ground and loss of Vbb protection
• Electrostatic discharge (ESD ) protection Application
• µC compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads
• All types of resistive, inductive and capacitve loads
• Replaces electromechanical relays, fuses and discrete circuits General Description N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, proportional sense of load current, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions. Block Diagram IN ST ESD Logic Voltage sensor Voltage source Charge pump Level shifter Temperature sensor Rectifier Limit for unclamped ind. loads Gate protection Current limit Signal GND GND V Logic Overvoltage protection + Vbb PROFET OUT 6, 7 Load GND Load GND RO Current Sense Output Voltage detection RIS IS5 I IS I L Product Summary Operating voltage V bb(on) 5.0 ... 34 V On-state resistance RON 30 m Ω Load current (ISO) IL(ISO) 12.6 A Current limitation IL(SCr) 24 A Package TO220-7-11 TO263-7-2 TO220-7-12 1 1 1 Standard (staggered) SMD Straight

Semiconductor Group Page 2 2003-Oct-01 Pin Symbol Function

1 ST Diagnostic feedback: open drain, invers to input level

2 GND Logic ground

3 IN Input, activates the power switch in case of logical high signal

4 V bb Positive power supply voltage, the tab is shorted to this pin

5 IS Sense current output, proportional to the load current, zero in

the case of current limitation of load current 6 & 7 OUT (Load, L) Output, protected high-side power output to the load. Both output pins have to be connected in parallel for operation according this spec (e.g. k ILIS). Design the wiring for the max. short circuit current Maximum Ratings at Tj = 25 °C unless otherwise specified Parameter Symbol Values Unit Supply voltage (overvoltage protection see page 4) Vbb 43 V Supply voltage for full short circuit protection Tj Start=-40 ...+150°C Vbb 34 V Load dump protection1) VLoadDump = VA + Vs, VA = 13.5V R I2)= 2 Ω , R L= 1 Ω , td= 200 ms, IN= low or high VLoad dump3) 60 V Load current (Short circuit current, see page 5) IL self-limited A Operating temperature range Storage temperature range Tj Tstg -40 ...+150 -55 ...+150 Power dissipation (DC), TC ≤ 25 °C Ptot 85 W Inductive load switch-off energy dissipation, single pulse Vbb = 12V, Tj,start = 150°C, TC = 150°C const. IL = 12.6 A, ZL = 4,2 mH, 0 Ω : IL = 4 A, ZL = 330 mH, 0 Ω : E AS EAS 0,41 3,5 J Electrostatic discharge capability (ESD) IN: (Human Body Model) ST, IS: out to all other pins shorted: R=1.5kΩ ; C=100pF VESD 1.0 4.0 8.0 kV Input voltage (DC) VIN -10 ... +16 V Current through input pin (DC) Current through status pin (DC) Current through current sense pin (DC) see internal circuit diagrams page 8 IIN IST IIS ±2.0 ±5.0 ±14 mA 1) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω resistor in the GND connection is recommended). 2) R I = internal resistance of the load dump test pulse generator 3) VLoad dump is setup without the DUT connected to the generator according to ISO 7637-1 and DIN 40839

Semiconductor Group Page 3 2003-Oct-01 Thermal Characteristics Parameter and Conditions Symbol Values Unit min typ max Thermal resistance chip - case : R thJC -- -- 1.47 K/W junction - ambient (free air): R thJA -- -- 75 SMD version, device on PCB 4): -- 33 -- 4) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air.

Electrical Characteristics

Parameter and Conditions Symbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Load Switching Capabilities and Characteristics On-state resistance (pin 4 to 6&7) IL = 5 A Tj=25 °C: Tj=150 °C: R ON m Ω Output voltage drop limitation at small load currents (pin 4 to 6&7), see page 14 VON(NL) 50 -- mV Nominal load current, ISO Norm (pin 4 to 6&7) VON = 0.5 V, TC = 85 °C IL(ISO) 11.4 12.6 -- A Nominal load current, device on PCB4) TA = 85 °C, Tj ≤ 150 °C VON ≤ 0.5 V, IL(NOM) 4.0 4.5 -- A Output current (pin 6&7) while GND disconnected or GND pulled up, Vbb=30 V, VIN= 0, see diagram page 9; not subject to production test, specified by design IL(GNDhigh) -- -- 8 mA Turn-on time IN to 90% VOUT : Turn-off time IN to 10% VOUT : ton toff 150 200 µs Slew rate on 10 to 30% VOUT , R L = 12 Ω , Tj =-40...+150°C dV /dton 0.1 -- 1 V/ µs Slew rate off 70 to 40% VOUT , R L = 12 Ω , Tj =-40...+150°C -dV/dtoff 0.1 -- 1 V/ µs

Parameter and Conditions Symbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Semiconductor Group Page 4 2003-Oct-01 Operating Parameters Operating voltage 5) Tj =-40...+150°C: Vbb(on) 5.0 -- 34 V Undervoltage restart Tj =-40...+25°C: Tj =+150°C: Vbb(u rst) -- 4.5 5.5 6.0 V Undervoltage restart of charge pump see diagram page 13 Tj =-40...+25°C: Tj =25...150°C: Vbb(ucp) 4.7 6.5 7.0 V Undervoltage hysteresis ∆Vbb(under) = Vbb(u rst) - Vbb(under) ∆Vbb(under) -- 0.5 -- V Overvoltage shutdown Tj =-40...+150°C: Vbb(over) 34 -- 43 V Overvoltage restart Tj =-40...+150°C: Vbb(o rst) 33 -- -- V Overvoltage hysteresis Tj =-40...+150°C: ∆Vbb(over) -- 1 -- V Overvoltage protection6) Tj =-40°C: Ibb=40 mA Tj =+25...+150°C Vbb(AZ) 41 V Standby current (pin 4) VIN=0 T j=-40...+25°C: T j= 150°C: Ibb(off) µA Off state output current (included in Ibb(off)) VIN=0, Tj =-40...+150°C: IL(off) -- -- 10 µA Operating current (Pin 2)7), VIN=5 V IGND -- 1.2 3 mA 5) At supply voltage increase up to Vbb= 4.7 V typ without charge pump, VOUT ≈Vbb - 2 V 6) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω resistor in the GND connection is recommended). See also VON(CL) in table of protection functions and circuit diagram page 9. 7) Add IST , if IST > 0, add IIN, if VIN>5.5 V

Parameter and Conditions Symbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Semiconductor Group Page 5 2003-Oct-01 Protection Functions8) Initial peak short circuit current limit (pin 4 to 6&7) IL(SCp) Tj =-40°C: Tj =25°C: Tj =+150°C: A Repetitive short circuit shutdown current limit IL(SCr) Tj = Tjt (see timing diagrams, page 12) -- 24 -- A Output clamp (inductive load switch off) at VOUT = Vbb - VON(CL); IL= 40 mA, Tj =-40°C: Tj =+25..+150°C: VON(CL) V Thermal overload trip temperature Tjt 150 -- -- °C Thermal hysteresis ∆Tjt -- 10 -- K Reverse battery (pin 4 to 2) 9) - Vbb -- -- 32 V Reverse battery voltage drop (Vout > Vbb) IL = -5 A Tj=150 °C: -VON(rev) 600 -- mV Diagnostic Characteristics Current sense ratio10), static on-condition, kILIS = IL / IIS Tj = -40°C, IL = 5 A: k ILIS 4550 5000 6000 Tj= -40°C, IL= 0.5 A: 3300 5000 8000 4550 4000 5000 5000 5550 6500 Current sense output voltage limitation VIS(lim) 5.4 6.1 6.9 V Current sense leakage/offset current Tj = -40 ...+150°C VIN=0, VIS = 0, IL = 0: IIS(LL) -- 1 µA VIN=5 V, VIS = 0, IL = 0: IIS(LH) 0 -- 15 VIN=5 V, VIS = 0, VOUT = 0 (short circuit): IIS(SH)12 ) 0 -- 10 8) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 9) Requires 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 2 and circuit page 9). 10) This range for the current sense ratio refers to all devices. The accuracy of the kILIS can be raised at least by a factor of two by matching the value of kILIS for every single device. In the case of current limitation the sense current IIS is zero and the diagnostic feedback potential VST is High. See figure 2b, page 11. 11) Valid if Vbb(u rst) was exceeded before. 12) not subject to production test, specified by design

Parameter and Conditions Symbol Values Unit at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max Semiconductor Group Page 6 2003-Oct-01 Current sense settling time to IIS static±10% after positive input slope13) , IL = 0 5 A, Tj= -40...+150°C tson(IS) -- 300 µs Current sense settling time to 10% of IIS static after negative input slope13) , IL = 5 0 A , Tj= -40...+150°C tsoff(IS) 30 100 µs Current sense rise time (60% to 90%) after change of load current13) , IL = 2.5 5 A tslc(IS) 10 -- µs Open load detection voltage14) (off-condition) Tj=-40..150°C: VOUT(OL) 2 3 4V Internal output pull down (pin 6 to 2), VOUT =5 V, Tj=-40..150°C R O 15 40 k Ω Input and Status Feedback15) Input resistance see circuit page 8 R I 3,0 4,5 7,0 kΩ Input turn-on threshold voltage Input turn-off threshold voltage Input threshold hysteresis ∆ VIN(T) -- 0.5 -- V Off state input current (pin 3), VIN = 0.4 V Tj =-40..+150°C IIN(off) -- 50 µA On state input current (pin 3), VIN = 5 V Tj =-40..+150°C IIN(on) 50 90 µA Delay time for status with open load after Input neg. slope (see diagram page 13) td(ST OL3) 400 -- µs Status delay after positive input slope13) tdon(ST) 13 -- µs Status delay after negative input slope13) tdoff(ST) 1 -- µs Status output (open drain) Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA: ST low voltage Tj =-40...+25°C, IST = +1.6 mA: T j = +150°C, IST = +1.6 mA: VST(high) VST(low) 5.4 6.1 6.9 0.4 0.7 V Status leakage current, VST = 5 V, Tj=25 ... +150°C: IST(high) -- -- 2 µA 13) not subject to production test, specified by design 14) External pull up resistor required for open load detection in off state. 15) If a ground resistor RGND is used, add the voltage drop across this resistor.

Semiconductor Group Page 7 2003-Oct-01 Truth Table Input Output Status Current Sense level level level I IS Normal operation L H L H H L nominal Current- limitation L H L H H H Short circuit to GND L H L L 16) H H Over- temperature L H L L H H Short circuit to V bb L H H H L17) L <nominal 18) Open load L H L19) H H (L20)) L Undervoltage L H L L H L Overvoltage L H L L H L Negative output voltage clamp L L H 0 L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 12...13) 16) The voltage drop over the power transistor is Vbb-VOUT >typ.3V. Under this condition the sense current IIS is zero 17) An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious. 18) Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS. 19) Power Transistor off, high impedance 20) with external resistor between pin 4 and pin 6&7

Semiconductor Group Page 8 2003-Oct-01 Terms PROFET V IS ST OUT GND bb VSTVIN IST IIN Vbb Ibb IGND IN VIS IIS VOUT VON IL OUT 1 7 R GND Input circuit (ESD protection) IN GND IR ESD-ZD III The use of ESD zener diodes as voltage clamp at DC conditions is not recommended. Status output ST GND ESD- ZD +5V RST(ON) ESD-Zener diode: 6.1 V typ., max 5 mA; R ST(ON) < 440 Ω at 1.6 mA, The use of ESD zener diodes as voltage clamp at DC conditions is not recommended. Current sense output IS GND ISR ISI ESD-ZD ISV ESD-Zener diode: 6.1 V typ., max 14 mA; R IS = 1 kΩ nominal Inductive and overvoltage output clamp + Vbb OUT GND PROFET VZ VON VON clamped to 47 V typ.

Semiconductor Group Page 9 2003-Oct-01 Overvoltage protection of logic part + Vbb IS STR GND GNDR Signal GND Logic VZ2 IN RI VZ1 ST ISR + 5V VR VZ1 = 6.1 V typ., VZ2 = 47 V typ., R I= 4 kΩ typ, R GND = 150 Ω, R ST = 15 kΩ , R IS= 1 kΩ , R V= 15 kΩ , Reverse battery protection GND Logic IS STR IN ST ISR + 5V VR OUT LR Power GND GNDR Signal GND Power Inverse IR Vbb- Diode Z1V The load R L is inverse on, temperature protection is not active R GND = 150 Ω, R I= 4 kΩ typ, R ST ≥ 500 Ω , R IS≥ 200 Ω , R V≥ 500 Ω , Open-load detection OFF-state diagnostic condition: VOUT > 3 V typ.; IN low LogicST Out VOUT Signal GND REXT RO OFF Vbb GND disconnect PROFET V ST IS OUT GND bb Vbb Ibb IN OUT VIN VST VIS VGND Any kind of load. In case of Input=high is VOUT ≈ VIN - VIN(T+) . Due to VGND >0, no VST = low signal available. GND disconnect with GND pull up PROFET V ST IS OUT GND bb Vbb IN OUT VIN VSTVIS VGND Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND >0, no VST = low signal available. Vbb disconnect with energized inductive load PROFET V ST IS OUT GND bb Vbb IN OUT high Normal load current can be handled by the PROFET itself.

Semiconductor Group Page 10 2003-Oct-01 Vbb disconnect with charged external inductive load PROFET V ST IS OUT GND bb IN OUT Vbb high D R LL If other external inductive loads L are connected to the PROFET, additional elements like D are necessary. Inductive Load switch-off energy dissipation PROFET IN ST OUT GND Vbb E E E EAS bb L R ELoad IS 7OUT Vbb Energy stored in load inductance: EL = 1/2·L·I2 L While demagnetizing load inductance, the energy dissipated in PROFET is EAS = Ebb + EL - ER = VON(CL)·iL(t) dt, with an approximate solution for RL > 0 Ω : EAS = IL· L 2·R L

• (Vbb + |VOUT(CL) |)· ln (1+ IL·R L |VOUT(CL) | )

Semiconductor Group Page 14 2003-Oct-01 Figure 8a: Current sense versus load current: 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.1 1.2 1.3 0123456 I L [A] [mA] I IS Figure 8b: Current sense ratio21: 5000 10000 15000 0123456789 1 0 1 1 1 2 1 3 IL[A] kILIS Figure 9a: Output voltage drop versus load current: 0.0 0.1 0.2 012345678 I L [A] [V] VON ON(NL)V ONR

21 This range for the current sense ratio refers to all

devices. The accuracy of the kILIS can be raised at least by a factor of two by matching the value of k ILIS for every single device.

Semiconductor Group Page 15 2003-Oct-01 Package and Ordering Code All dimensions in mm Standard (=staggered): P-TO220-7-11 Sales code BTS640S2 Ordering code Q67060-S6307-A5 SMD: P-TO263-7-2 (tape&reel) Sales code BTS640S2 G Ordering code Q67060-S6307-A6 Ordering code Q67060-S6307-A6 Straight: P-TO220-7-12 Sales Code BTS640S2 S Ordering code Q67060-S6307-A7 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81669 München © Infineon Technologies AG 2001 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Typical ±0.11.27 4.4 9.25±0.20.05 All metal surfaces tin plated, except area of cut. C 2.4 0.5±0.1 ±0.38.6 10.2±0.3 ±0.43.9 ±0.48.4 3.7±0.3 A A0.25 M 9.8±0.15 2.8 15.65±0.3 13.4 0...0.15 1.27 0.6±0.1 C ±0.2 17 ±0.3 8.51) 10±0.2 3.7-0.15 A 8˚ max. BA0.25 M 0.1 Typical 9.8±0.15 ±0.210 8.51) 81) (15) ±0.29.25 ±0.31 0...0.15 7x0.6±0.1 ±0.11.27 4.4 B 0.5±0.1 ±0.32.7 4.7±0.5 0.05 0.1 All metal surfaces tin plated, except area of cut. ±0.31.3 2.4 6x1.27 A BA0.25 M Typical 9.8±0.15 2.8 15.65±0.3 13.4 0...0.15 1.27 0.6±0.1 ±0.11.27 4.4 B 9.25±0.20.05 All metal surfaces tin plated, except area of cut. C ±0.2 17±0.3 8.51) 10±0.2 3.7-0.15 C 2.4 0.5±0.1 13 ±0.5 ±0.511