BTS3011TE INFINEON | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 43
Technical content
Features
- Single channel device
- Digital Feedback
- Current limitation trigger concept
- 3.3 and 5 V compatible logic inputs
- Electrostatic discharge protection (ESD)
- Green Product (RoHS compliant)
- AEC Qualified
Applications
- Suitable for resistive, induc tive and capacitive loads
- Replaces electromechanical rela ys, fuses and discrete circuits
- Most suitable for inductive loads as well as loads with inrush currents
Description
The BTS3011TE is a 11 m Ω single channel Smart Low-Side Powe r Switch with in a PG-TO252-5 package providing embedded protective functi ons. The power transistor is buil t by an N-channel vertical power MOSFET. The device is monolithically inte grated. The BTS3011TE is automotive qualified and is optimized for 12 V automotive and industrial applications. Type Package Marking BTS3011TE PG-TO252-5 S3011TE Table 1 Product Summary Operating voltage range V OUT 3 .. 28 V Maximum battery voltage VBAT(LD) 40 V Operating supply voltage range VDD 3.0 .. 5.5 V Maximum input voltage VIN 5.5 V Maximum On-State resistance at Tj = 150 °C, VDD = 5 V, VIN = 5 V RDS(ON)_150 22 mΩ Nominal load current IL(NOM) 10 A Minimum current limitation trigger level IL(LIM)_TRIGGER 70 A
Datasheet 2 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Overview Diagnostic Functions
- Short circuit to battery
- O v e r t e m p e r a t u r e
- Stable latching diagnostic signal Protection Functions
- Over temperature shutdown with delayed auto restart
- Active clamp over voltage protection of the OUTput
- Current limitation with current limitation trigger
- Enhanced short circuit protection Detailed Description The device is able to switch all kind of resistive, inductive and capacitive loads, limited by maximum clamping energy and maximum current capabilities. The BTS3011TE offers dedicated ESD pr otection on the IN, VDD and STATUS pin referring to the Ground pin, as well as an over voltage clamping of the Drain/OUT to Source/GND. The over voltage protection gets activated during indu ctive turn off conditions or other over voltage events (such as load dump). The power MOSFET is limiting the drain-source voltage, if it rises above the V OUT(CLAMP). The over temperature protection prevents the device from overheating due to overload and/or bad cooling conditions. The BTS3011TE has a delayed auto restar t thermal shut-down function. The devi ce will turn on again, If the input pin is still high after a delayed time t D(RESTART) considering the junction temperature has dropped below the thermal hysteresis. Minimum current limitation level IL(LIM) 35 A Maximum OFF state load current at TJ ≤ 85 °C IL(OFF)_85 3µ A Maximum stand-by supply current at TJ ≤ 85 °C IDD(OFF)_85 6µ A Table 1 Product Summary (cont’d)
Datasheet 3 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Table of Contents
Datasheet 4 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch
Datasheet 5 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Block Diagram
2 Block Diagram
BlockDiagram_5pin .emf VDD STATUS Over- temperature Protection Short circuit detection / Current limitation Supply Unit Gate Driving Unit Over Voltage Protection Status Feedback ESD Protection
Datasheet 6 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Pin Configuration
3 Pin Configuration
3.1 Pin Assignment BTS3011TE
Figure 2 Pin Configuration DPAK5
3.2 Pin Definitions and Functions
3.3 Voltage and Current Definition
Figure 3 shows all external terms used in this data sheet, with associated convention for positive values. Table 2 Pin Symbol Function 1I N I n p u t p i n
2 VDD 5 V supply pin
3,6 OUT Drain, Load conn ection for power DMOS
4 STATUS Open-drain status feedback (low active)
5 GND Ground, Source of power DMOS
(top view ) GND5 6 (Tab) STATUS VDD IN PinConfig_DPAK5.emf
Datasheet 7 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Pin Configuration Figure 3 Naming Definition of electrical parameters VBAT GND Terms_5pin. emf IN VBAT VIN IIN GND ZL IL, ID VOUT, VDS OUT VDD IDD VDD VDD STATUS ISTATU S RSTATU S VSTATU S
Datasheet 8 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics
4 General Product Characteristics
4.1 Absolute Maximum Ratings
Table 3 Absolute Maximum Ratings 1) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Voltages Supply voltage VDD -0.3 – 5.5 V – P_4.1.1 Output voltage VOUT ––4 0 V i n t e r n a l l y c l a m p e d P_4.1.2 Battery voltage for short circuit protection VBAT(SC) ––3 2 V 1) l = 0 or 5 m RSC = 30 mΩ+ RCable RCable = l * 16 mΩ/m LSC = 5 µH + LCable LCable = l * 1 µH/m P_4.1.3 Battery voltage for load dump protection (VBAT(LD) = VA + VS with VA=13.5 V) VBAT(LD) ––4 0 V 2) Ri =2 Ω; RLoad =2 . 2Ω; td=400 ms; suppressed pulse P_4.1.4 Input Pin Input voltage VIN -0.3 – 5.5 V – P_4.1.8 Status Pin Status voltage VSTATUS -0.3 – 5.5 V – P_4.1.9 Power Stage Load current | I L|– – IL(LIM)_TRIGGER A– P_4.1.12 Energies Unclamped single inductive energy single pulse EAS – – 390 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 150°C P_4.1.13 Unclamped repetitive inductive energy pulse with 100k cycles E AR(100k) – – 290 mJ IL(0) = IL(NOM) VBAT = 13.5 V Tj(0) = 105°C P_4.1.15 Temperatures Operating temperature Tj -40 – +150 °C – P_4.1.17 Storage temperature Tstg -55 – +150 °C – P_4.1.18 ESD Susceptibility
Datasheet 9 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics Notes 1. Stresses above the ones listed he re may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to preven t IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation
4.2 Functional Range
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. ESD susceptibility (all pins) VESD -2 – 2 kV HBM 3) P_4.1.19 ESD susceptibility OUT pin vs. GND VESD -4 – 4 kV HBM 3) P_4.1.20 ESD susceptibility VESD -750 – 750 V CDM 4) P_4.1.21 1) Not subject to production test, specified by design. 2) VBAT(LD) is setup without the DUT connected to the generator per ISO7637-1; Ri is the internal resistance of the load dump test pulse generator; td is the pulse duration time for load dump pulse (pulse 5) according ISO 7637-1, -2. 3) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS-001 (1.5 kΩ, 100 pF) Table 4 Functional Range 1) 1) Not subject to production test, specified by design. Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Supply Voltage Range for Nominal Operation Supply current continuous ON operation IDD(ON) ––1 m A – P_4.2.2 Standby supply current (ambient) IDD(OFF) –1 . 5 6 µ A Tj ≤85°C P_4.2.4 Battery Voltage Range for Nominal Operation VBAT(NOR) 6 13.5 18 V – P_4.2.5 Extended Battery Voltage Range for Operation VBAT(EXT) 0 – 32 V parameter deviations possible P_4.2.6 Table 3 Absolute Maximum Ratings 1) (cont’d) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max.
Datasheet 10 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics
4.3 Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 5 Thermal Resistance Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Junction to Solder Point RthJSP –2– K / W 1) 2) 1) Not subject to production test, specified by design. 2) Specified RthJSP value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature). Tc = 85°C. Device is loaded with 1 W power. P_4.3.1 Junction to Ambient (2s2p) RthJA(2s2p) –2 5 –K / W 1) 3) 3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (Chip and Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Ta = 85°C. Device is loaded with 1 W power. P_4.3.2 Junction to Ambient (1s0p+600mm2 Cu) RthJA(1s0p) –3 8 –K / W 1) 4) 4) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (Chip and Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600mm2 and 70 µm thickness. Ta = 85°C. Device is loaded with 1 W power P_4.3.3
Datasheet 11 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics
4.3.1 PCB set up (from THB report)
The following PCB set up was implemented to determine the transient thermal impedance. Figure 4 Cross section JEDEC 2s2p. Figure 5 Cross section JEDEC 1s0p. Figure 6 PCB layout. 70µm modelled (traces) 35µm, 100% metalization* 1,5 mm 70µm, 5% metalization* 70µm modelled (traces, cooling area) 1,5 mm 70µm; 5% metalization* JEDEC 1s0p / 600 mm² JEDEC 1s0p / Footprint JEDEC 2s2p Detail: Solder area
Datasheet 12 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics
4.3.2 Transient Thermal Impedance
Figure 7 Typical transi ent thermal impedance ZthJA = f(tp), Ta = 85 °C Value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The product (Chip and Package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (2 x 70 um Cu, 2 x 35 um Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Device is dissipating 1 W power. Figure 8 Typical transi ent thermal impedance ZthJA = f(tp), Ta = 85°C Value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board. Device is dissipating 1 W power.
Datasheet 13 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Power Stage
5 Power Stage
5.1 Output On-state Resistance
The on-state resistance depends on the supply voltage as well as on the junction temperature TJ. Figure 9 shows this dependencies in terms of temperature and voltage for the typical on-state resistance RDS(ON). The behavior in reverse polarity is described in chapter“Reverse Current Capability” on Page 16. Figure 9 Typical On-State Resistance, RDS(ON) = f(TJ); VDD = 5 V, 3 V; VIN = high A high signal at the input pin causes the power DMOS to switch ON with a dedicated slope. To achieve the specified RDS(ON) and switching speed, a 5 V supply is required.
Datasheet 14 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Power Stage
5.2 Resistive Load Output Timing
Figure 10 shows the typical timing when switching a resistive load. Figure 10 Definition of Power Ou tput Timing for Resistive Load
5.3 Inductive Load
5.3.1 Output Clamping
When switching off inductive loads with lo w side switches, the drain-source voltage VOUT rises above battery potential, because the inductance intends to continue driving the current. To prevent unwanted high voltages the device has a voltage clamping mechanism to keep the voltage at VOUT(CLAMP). During this clamping operation mode the device heats up as it dissipates the energy from the inductance. Therefore the maximum allowed load inductance is limited. See Figure 11 and Figure 12 for more details. Figure 11 Output Clamp Circuitry tVOUT VBAT Switching.emf t 10 % 90 % tON tDON tOFF tDOFF VIN VIN ( L) VIN ( H) 50 % -(dV/dt)ON (dV/dt)OFF tF tR GND ( DMOS Source) OUT (DMOS Drain) IGND VBAT ZL IL VOUT
Datasheet 15 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Power Stage Figure 12 Switching an Inductive Load Note: Repetitive switching of inductive load by VD D instead of using the input is a not recommended operation and may affect the device reliability and reduce the lifetime.
5.3.2 Maximum Load Inductance
While demagnetization of inductive loads, energy has to be dissipated in the BTS3011TE. This energy can be calculated by the following equation: (5.1) Following equation simplifies under assumption of RL = 0 (5.2) Figure 13 shows the inductance / current combination the BTS3011TE can handle. For maximum single avalanche energy please also refer to EAS parameter in Page 8 t tVOUT VBAT t IOUT VOUT( CLAMP ) VIN L L CLAMPOUTBAT LL L CLAMPOUTBAT CLAMPOUT R LIVV IR R VVV × +⎟⎟ )( 1lnE −−×= CLAMPOUTBAT BAT L VV VLIE
Datasheet 16 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Power Stage Figure 13 Maximum load inductance for single pulse L = f(IL); TJ(0) = 150°C; VBAT = 13.5 V
5.4 Reverse Current Capability
A reverse battery situation means the OUT pin is pulled below GND potential to -VBAT via the load ZL. In this situation the load is driven by a current th rough the intrinsic body di ode of the BTS3011TE and all protection, such as current limitation, over temperature or over voltage clamping, are not active. OT is active in inverse current if DMOS is ON In certain application case (for exam ple in a bridge or half-bridge conf iguration) the intrinsic reverse body diode is used for freewheeling of an inductive load. In this case the devi ce is still supplied but an inverse current is flowing from GND to OUT(drain) and the OUT will be pulled below GND. In inverse or reverse operation via the reverse body diode, the device is dissipating a power loss which is defined by the driven current and the voltage drop on the body diode -VDS. The BTS3011TE is capable of switching ON during inverse current by setting the IN high. In this condition, the over temperature is active.
5.5 Characteristics
Please see “Power Stage” on Page 24 for electrical characteristic table.
Datasheet 17 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Protection Functions
6 Protection Functions
The device provides embedded protection functions. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operation. Protection functions are not to be used for continuous or repetitive operation.
6.1 Over Voltage Clamping on OUTput
The BTS3011TE is equipped with a voltage clamp circuitry that keeps the drain-source voltage VDS at a certain level VOUT(CLAMP). The over voltage clamping is overruling the other protection functions. Power dissipation has to be limited to not exceed the maximum allowed junction temperature. This function is also used in terms of inductive clamping. Please see also “Output Clamping” on Page 14 for more details.
6.2 Thermal Protection
The device is protected against over temperature du e to overload and/or bad cooling conditions by an integrated temperature sensor. The thermal protection is available if the device is active. . The device incorporates an absolute (TJ(SD)) and a dynamic temperature limitation (ΔTJ(SW)). Triggering one of them will cause the output to switch off. The BTS3011TE has a delayed thermal-restart function. If the input (IN) is still high the device will turn on again after a delayed time t D(RESTART) considering the junction temperat ure has dropped below the thermal hysteresis. Figure 14 Thermal protective switch OFF scenario with thermal restart Note: For better understanding, the time scale is not li near. The real timing of this drawing is application dependant and cannot be described. IN t Dynamic thermal shutdown t Tj(SD) Auto restart VIN (H) no overload Ta ΔTj(SW) Absolute over temperature shutdown Auto restart ΔTj(SD)_HY Tj(D M OS) t VOUT VBA T Thermal_faul t_res tart tD(RE S T ART) tD(RE S T ART)
Datasheet 18 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Protection Functions
6.3 Overcurrent Limitation / Short Circuit Behavior
This device is providing a smart overcurrent limitation intended to provide protection against short circuit conditions while allowing also load in rush currents higher than the curren t limitation level. To achieve this, the device has a current limitation level IL(LIM) which is triggered by a higher trigger level IL(LIM)_TRIGGER. The condition short circuit is an overload condition on the device. If the load current IL reaches the current limitation trigger level IL(LIM)_TRIGGER the internal current limitation will be activated and the device limits the current to a lower value IL(LIM). The device then starts heating up. When the thermal shutdown temperature TJ(SD) i s r e a c h e d , t h e d e v i c e t u r n s o f f . T h e t i m e f r o m t h e b e g i n n i n g o f current limitation until the over temperature switch off depends strongly on the cooling conditions. If input is still high, the device will turn on again after a delayed time t D(RESTART) considering the junction temperature has dropped below the thermal hysteresis. The current limitation trigger is a latched signal. It will be only reset by input (IN) pin low and resetting the latch fault signal (STATUS pin = high. See Chapter 7 Diagnostics) at the same time. This me ans if the input stays high all the ti me during short circuit, the current will be limited to IL(LIM) during the following pulses (while on ther mal restart). It also means that the output current remains limited to the current limitation level IL(LIM) as long as the current limitation trigger is not reset. Figure 15 shows this behavior. Figure 15 Short circuit protection via current limitation and thermal switch off, with latched fault signal on STATUS-pin IN tTj(D M OS) Absolu te over t emp erature sh utdo wn IL IL(LIM) Auto re sta rt; li mited to current l imitation l ev el Re st ar t i n to n or ma l l oa d co nd i ti o n VBAT/Zsc t t Occurren ce of sho rt circu it IL(LIM )_T RI GGE R Drain current trigg erin g IL(LI M)_TRIGG ER -> current lim it to IL(LI M) VIN (H) Res et current lim it trigger by „ST ATUS=high“ and „IN=low“ and „DMOS off (I L=0A)“ Re st ar t i n to sh o rt circuit Tj(SD) ΔTj(SD)_HY Ta t VST ATU S H tRE SE T tD(RE S T ART) tD(RE S TART)
Datasheet 19 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Protection Functions Note: For better understanding, the time scale is not li near. The real timing of this drawing is application dependant and cannot be described. Behavior with overload current below current limitation trigger level The lower current limitation level IL(LIM) will be also triggered by a thermal shutdown. This could be the case in terms of overload with a current still below the current limitation trigger level (IL < IL(LIM)TRIGGER). Figure 16 Example of overload behavior with thermal shutdown Note: For better understanding, the time scale is not li near. The real timing of this drawing is application dependant and cannot be described.
6.4 Characteristics
Please see “Protection” on Page 26 for electrical characteristic table. IN IL IL(LIM ) t t Occurren ce of o ve rload (be low cu rre nt limita tio n trig ger level) IL(LIM )_T RI GGE R VIN (H) Th er ma l r es ta rt i nt o no rm al lo ad con dit ion VBAT/Zsc Tj(SD) ΔTj(SD)_HY Tj(D M OS) Ta Res et current lim it trigger by „ST ATUS=high“ and „IN=low“ and „DMOS off (IL=0A)“ t VST ATU S H tRE SE T tD(RE S T ART) tD(RE S T ART) Auto re sta rt; limited to curren t limitation le vel Absolu te over t emp erature sh utdo wn
Datasheet 20 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Diagnostics
7 Diagnostics
The BTS3011TE provides a latching di gital fault feedback signal on th e STATUS pin triggered by an over temperature shutdown.
7.1 Functional Description of the STATUS Pin
The BTS3011TE provides digita l status information via the STATUS pi n to give an alarm feedback to a connected microcontroller. Please see Figure 17 “Feedback and control of STATUS pin” on Page 20 Normal operation mode In normal operation (no fault is dete cted) the STATUS pin’s logic is set ”high”. It is pulled up via an external Resistor (RSTATUS). Internally it is connected to an open drain MOSFET through an internal resistor. Fault operation In case of a thermal shutdown (fault), an internal MOSFET connected to the STATUS pin, pulls its voltage down to GND, providing a “low” level signal to the mi crocontroller. Fault mode operation remains active independent from the input pin state or internal restarts until it is reset. Reset latch fault signal (external pull up) To reset the latch fault signal of the BTS3011TE, the STATUS pin has to be pulled up to 5 V (recommended VDD). Resetting the fault signal will not reset the current limi tation trigger signal. To do so, the INPUT pin has to be set in logic “low” at the same time the STATUS pin is set “high”. In this case, the fault latch signal and the current limitation trigger will be reset (assuming the temperature has dropped below ΔTJ_HYS). Please refer to Figure 15 and Figure 16. Figure 17 Feedback and control of STATUS pin For recommended values of external components please see “Application Information” on Page 40
7.2 Characteristics
Please see “Diagnostics” on Page 27 for electrical characteristic table. GND feedback .emf IN VBAT GND IGND ZL IL VOUT OUT VDD IDD VDD STATUS Micro controller I/O I/O RSTATU S
Datasheet 21 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Supply and Input Stage
8 Supply and Input Stage
8.1 Supply Circuit
The supply pin VDD is protected against ESD pulses as shown in Figure 18. The device supply is not internal regulated but direct ly taken from a external supply. Therefore a reverse polarity protected and buffered 5 V (or 3.3 V) voltage supply is re quired. To achieve the specified RDS(ON) and switching speed a 5 V supply is required. The device shall be supplied via the V DD pin before applying an input signal V IN to ensure the correct functionality of the device. Figure 18 Supply Circuit
8.1.1 Undervoltage Shutdown
In order to ensure a stable and defined device behavior under all allowed conditions the supply voltage VDD is monitored. The output switches off, if the supply voltage VDD drops below the switch-off threshold VDD(TH). In this case also all latches will be reset. The device functions are only given for supply volt ages above the supply voltage threshold VDD(SD)MAX. There is no failure feedback ensured for VDD < VDD(SD). 3.0V .. 5.5V GND VDD ESD protection Logic & Driver Supply_Stage.emf
Datasheet 22 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Supply and Input Stage
8.2 Input Circuit
Figure 19 shows the input circuit of the BTS3011TE. Due to an internal pull-down it is ensured that the device switches off in case of open input pin. A Zener structure protects the in put circuit against ESD pulses. As the BTS3011TE has a supply pin, the RDS(ON) of the power MOS is independent of the voltage on the IN pin (assumed VDD is sufficient). Figure 19 Simplified INput circuitry GND IN RIN(GND) ESD Logic ON/OFF Input .emf RIN IIN VINVuC
Datasheet 23 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Supply and Input Stage
8.3 Characteristics
Please see “Supply and Input Stage” on Page 28 for electrical characteristic table.
Datasheet 24 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch
Electrical Characteristics
9 Electrical Characteristics
Note: Characteristics show the deviation of paramete r at given input voltage and junction temperature. Typical values show the typical parameters expected from manufacturing and in typical application condition. All voltages and currents naming and polarity in accordance to Figure 3 “Naming Definition of electrical parameters” on Page 7
9.1 Power Stage
Please see Chapter “Power Stage” on Page 13 for parameter description and further details. Table 6 Electrical Characteristics: Power Stage Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V, VBAT = 6 V to 18 V, all voltages with re spect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Power Stage - Static Characteristics On-State resistance at 25°C RDS(ON)_25 – 10.7 – m Ω IL = IL(NOM); VDD =5V ; TJ = 25°C P_9.1.1 On-State resistance at 150°C RDS(ON)_150 –1 9 2 2 m Ω IL = IL(NOM); VDD =5V ; Tj = 150°C P_9.1.2 Nominal load current IL(NOM) –1 0 – A 1) TJ < 150°C; VDD =5V ; P_9.1.7 OFF state load current, Output leakage current IL(OFF)_85 ––3 µ A 2) VOUT =V BAT; VIN =0V ; VDD =5V ; TJ ≤85°C P_9.1.8 OFF state load current, Output leakage current at 150°C IL(OFF)_150 –61 4 µ A VOUT =V BAT; VIN =0V ; VDD =5V ; TJ = 150°C P_9.1.9 Reverse Diode Reverse diode forward voltage -VDS – 0.8 1.5 V IL =- IL(NOM); VIN =0V P_9.1.11 Power Stage - Dynamic characteristics - switching time VBAT = 13.5 V;VDD = 5 V; resistive load: RL = 2.2 Ω see Figure 10 “Definition of Power Output Timing for Resistive Load” on Page 14 for definition details Turn-on time tON 35 75 115 µs - P_9.1.12 Turn-off time tOFF 70 135 210 µs - P_9.1.13 Turn-on delay time tDON 51 5 2 5 µ s - P_9.1.14
Datasheet 25 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Turn-off delay time tDOFF 40 75 120 µs - P_9.1.15 Turn-on output fall time tF 30 60 90 µs - P_9.1.16 Turn-off output rise time tR 30 60 90 µs - P_9.1.17 1) Not subject to production test, calculated by RthJA and RDS(ON) 2) Not subject to production test, specified by design 3) Not subject to production test, calculated slew rate between 90% and 50%; dV/dt = (VOUT(90%) - VOUT(50%)) / |(t90% - t50%)| 4) Not subject to production test, calculated slew rate between 50% and 90%; dV/dt = (VOUT(50%) - VOUT(90%)) / |(t50% - t90%)| Table 6 Electrical Characteristics: Power Stage (cont’d) Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V, VBAT = 6 V to 18 V, all voltages with re spect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max.
Datasheet 26 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch
9.2 Protection
Please see Chapter “Protection Functions” on Page 17 for parameter description and further details. Note: Integrated protection function s are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation Table 7 Electrical characteristics: Protection Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V; VBAT = 6 V to 18 V, all voltages with re spect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Thermal shut down 1) 1) Not subject to production test, specified by design. Thermal shut down junction temperature TJ(SD) 150 170 200 °C 1) P_9.2.1 Thermal hysteresis ΔTJ_HYS –2 0 –K 1) P_9.2.4 Dynamic temperature limitation ΔTJ(SW) –7 0 –K 1) P_9.2.5 Auto-restart delay time tD(RESTART) 10 30 40 ms 1) 2) VDD = 5.0 V 2) Auto restart delay time after temperature protection shutdown. Thermal hysteresis must be also considered. P_9.2.8 Over Voltage Protection / Clamping Drain clamp voltage VOUT(CLAMP) 40 – – V VIN =0V ; ID =5 0m A ; P_9.2.9 Current limitation Current limitation trigger level IL(LIM)_TRIGGER 70 – 140 A VIN =5V ; VDD =5V ; VDS = VBAT P_9.2.10 Current limitation level IL(LIM) 35 – 70 A VIN =5V ; VDD =5V ; VDS = VBAT P_9.2.11
Datasheet 27 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch
9.3 Diagnostics
Please see Chapter “Diagnostics” on Page 20 for description and further details. Table 8 Electrical Characteristics: Diagnostics Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V, VBAT = 6 V to 18 V, all voltages with re spect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Feedback pin Status pin voltage drop VSTATUS(ON) –0 . 5 0 . 8 V ISTATUS =0 . 5m A ; 3V ≤VIN ≤ 5.5 V latched fault; P_9.3.1 Status pin leakage current ISTATUS(OFF)_85 –1 . 5 6 µ A 1) VSTATUS ≤5.5 V; TJ ≤85°C; 0V ≤VIN ≤5.5 V 1) Not subject to production test, specified by design. P_9.3.2 Status pin leakage current at 150°C ISTATUS(OFF)_150 –61 2 µ A V STATUS ≤5.5 V; TJ ≤150°C; 0V ≤VIN ≤5.5 V P_9.3.3 Status pin reset current ISTATUS(RESET) 3– 7 m A – P_9.3.5 Fault feedback reset time tSTATUS(RESET) 100 – – µs VSTATUS > VSTATUS(RESET); no over temperature P_9.3.6
Datasheet 28 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch
9.4 Supply and Input Stage
Please see Chapter “Supply and Input Stage” on Page 21 for description and further details. Table 9 Electrical Characte ristics: Supply and Input Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V, VBAT = 6 V to 18 V, all voltages with re spect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Supply Supply Undervoltage Shutdown Switch-on/off threshold voltage Supply current, continuos ON operation IDD(ON) – – 1 mA device on-state VDD =5 . 0V IL(0) = IL(NOM) P_9.4.3 Supply current, inverse condition on OUT to GND IDD(-VOUT) ––1 m A 1) VOUT <- 0 . 3V VIN = 5.0 V 1) Not subject to production test, specified by design. P_9.4.5 Standby supply current IDD(OFF)_85 –1 . 5 6 µ A 1) VIN =0V VDD =5 . 0V TJ < 85°C no fault signal P_9.4.6 Standby supply current at 150°C IDD(OFF)_150 –61 4 µ A VIN =0V VDD =5 . 0V TJ < 150°C no fault signal P_9.4.7 Standby supply current, inverse condition on OUT to GND IDD(OFF)(-VOUT) – – 200 µA IL=-IL(NOM) VIN = 0 V P_9.4.8 Input Low level input voltage VIN(L) -0.3 – 0.8 V – P_9.4.9 High level input voltage VIN(H) 2.0 – 5.5 V – P_9.4.10 Input voltage hysteresis VIN(HYS) – 200 – mV 1) P_9.4.11 Input pull down current IIN – – 160 µA 2.7 V < VIN <5 . 5V -0.3 V < VDD <5 . 5 V P_9.4.12 Internal Input pull down resistor RIN(GND) 25 50 100 k Ω – P_9.4.13
Datasheet 29 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results
10 Characterisation Results
Typical performance characteristics
10.1 Power Stage
Figure 20 Typical RDS(ON) vs. VDD (3..5.5 V) @ Tj=-40, 25, 85, 150°C; IL(NOM) Figure 21 Typical RDS(ON) vs. VDD (3..5.5 V) @ Tj=-40, 25, 85, 150°C; IL=2*IL(NOM)
Datasheet 32 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results
10.2 Dynamic characteristics
Figure 26 Typical delay on time, delay off time vs. T (-40..150°C) @J VDD=5 V; VBAT=13.5 V Figure 27 Typical fall time, rise time vs. TJ (-40..150°C) @ VDD=5 V; VBAT=13.5 V
Datasheet 36 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 34 Typical slew rate (ON&OFF) vs. VBAT (0..40V) @ TJ (-40, 25, 150°C); VDD=5 V; IL=IL(NOM)
10.3 Supply and Input Stage
Figure 35 VDD(UV_on, VDD(UV_off) vs. TJ
Datasheet 40 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. Application Diagram An application example with the BTS3011TE is shown below. Figure 42 Simplified application diagram Note: This is a very simplified example of an applicatio n circuit. The function must be verified in the real application.
11.1 Design and Layout Recommendations/Considerations
As consequence of the fast switching times for high currents, special care has to be taken with the PCB layout. Stray inductances have to be minimized. Table 10 Recommended external components Reference Value Description RSTATUS 10 kΩ Pull-up resistor for STATUS pin CVDD 100 nF Supply pin capacitor for fa st supply current transients VBAT CVD Doptional: e.g. 100nF Load VDD STATUS OUT GND IN RSTATU S Voltage Regulator IN OUT I/O PWM Micro controller I/O Status/ Reset GND VDD
Datasheet 41 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Figure 43 PG-TO252-5 Transistor Outline Package Green Product (RoHS compliant) To meet the world-wide customer requirements for en vironmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Dimensions in mm
Datasheet 42 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch
Revision History
Rev. 1.0 2018-07-19 Datasheet released
All referenced product or service names and trademarks are the property of their respective owners. Edition 2018-07-19 Published by Infineon Technologies AG
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