BTF50060-1TEA

BTF50060-1TEA INFINEON | Alldatasheet

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Smart High-Side Power Switch, One Channel High PWM Frequencies Datasheet, Rev. 1.0, June 2010 Automotive

Datasheet 2 Rev. 1.0, 2010-06-24 BTF50060-1TEA

BTF50060-1TEA PG-TO252-5-311 F50060A Datasheet 3 Rev. 1.0, 2010-06-24 Smart High-Side Power Switch, One Channel High PWM Frequencies BTF50060-1TEA 1O v e r v i e w Application

• Driving all types of resistive, inductive and capacitive loads
• Most suitable for driving load s with PWM frequency from 0Hz (DC operation) up to 33kHz and above
• Drives valves, coils, and motors, wit h inrush currents up to 60 A

Features

• Optimized for PWM frequencies of approx. 25 kHz
• 3.3V and 5V compatible logic inputs
• Advanced analog load current sense signal
• Designed for easy current sense calibration
• Embedded diagnosis features (e.g. open load in ON and OFF state)
• Embedded protection functions (e.g. over current shutdown, over temperature shutdown)
• I n f i n e o n ® INTELLIGENT LATCH
• I n f i n e o n® SMART CLAMPING
• Green Product (RoHS compliant)
• AEC Qualified

Description

Embedded in a PG-TO252-5-311 package, the BTF50060-1TEA is a 6mΩ single channel Smart High-Side Power Switch. It is based on Smart power chip on chip technology with a P-channel vertical power MOSFET, providing protective and diagnostic functions. It is specially designed to drive loads in the harsh automotive environment. Table 1 Product Summary Parameter Symbol Values Range of typical PWM frequencies fPWM 0 Hz ... 33 kHz Maximum On-state Resistance at Tj = 150 °C RDS(ON)_150 12 mΩ Nominal Supply Voltage Range for Operation VS(NOM) 6 V … 19 V Nominal Load Current (DC operation) IL(NOM) 16.5 A Typical Stand-by Current at Tj = 25 °C IS(OFF) 5 µA Minimum short circuit current shutdown threshold IL(SC) 60 A Maximum reverse battery voltage - VS(REV) 16 V

Datasheet 4 Rev. 1.0, 2010-06-24 BTF50060-1TEA Block Diagram Embedded Protection Functions

• I n f i n e o n® INTELLIGENT LATCH - resettable latch resulting from protective switch OFF
• Over current protection by short-circuit shutdown
• Overload protection by over-temperature shutdown
• I n f i n e o n® SMART CLAMPING Embedded Diagnosis Functions
• Advanced analog load current sense signal with defined positive offset current; enabling load diagnosis like Open Load in ON state, overload
• Providing defined fault signal
• Open Load detection in OFF state
• Short-to-battery detection

2 Block Diagram

Figure 1 Block Diagram of BTF50060-1TEA For a Diagram of Diagnosis & Protection block, please see Figure 15. ESD + over voltage protection BlockDiagram .emf Vs OUT IN GND IS Diagnosis Protection Sense output Input circuit RIN Temp Gate driver Smart Clamping A

Datasheet 5 Rev. 1.0, 2010-06-24 BTF50060-1TEA Pin Configuration

3 Pin Configuration

3.1 Pin Assignment

Figure 2 Pin Configuration

3.2 Pin Definitions and Functions

3.3 Definition of Terms

Figure 3 shows all terms used for currents and voltages in this data sheet, with associated convention for positive values. Figure 3 Definition of currents and voltages Pin Symbol Function 1G N D Ground; Ground connection for control chip. 2I N Input; Digital 3.3 V and 5 V compatible logic input; activates power switch if set to HIGH level; Includes internal pull-down resistor RIN. Tab; 31) 1) Tab and pin 3 are internally connected. Pin 3 is cut. OUT Output; Protected high side power output 4I S Sense; Provides analog sense current signal and defined fault signal. 5V s Supply Voltage; Positive supply voltage for Logic and Power Stage2) 2) PCB traces have to be designed to withstand maximum current occuring in the application. PinConfiguration .emf GND (OUT) IN IS VS OUT (TAB) Terms.emf VIN OUT VS VOUT IS IN VS IIN IGND GND IS IIS IL VSIS VIS VSD

Datasheet 6 Rev. 1.0, 2010-06-24 BTF50060-1TEA General Product Characteristics

4 General Product Characteristics

4.1 Absolute Maximum Ratings

Table 2 Absolute Maximum Ratings 1) Tj = -40°C to 150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. T y p . Max. Supply voltages Supply Voltage VS -0.3 28 V – P_4.1 Reverse Polarity Voltage on pin GND, IS Supply voltage for short circuit protection VBAT(SC) 4) 02 8 V RECU =2 0 mΩ, RCable =6 mΩ/m, LCable =1 µ H / m , l =0o r5 m , see Chapter 5.3.1 P_4.3 Supply voltage for load dump protection VS(LD) –4 5 V RI =2 Ω 5) , RL =1 . 0Ω, td =4 0 0 m s P_4.4 Short Circuit Capability Short circuit cycle capability nRSC1 –1 E 6 (Grade A) – 4) P_4.21 IN + IS + GND pin Voltage at IN pin VIN -0.3 6 V – P_4.5 Current through IN pin IIN -2 2 mA t < 2min P_4.6 Voltage at IS pin VIS -0.3 VS V – P_4.7 Current through IS pin IIS -2 10 mA – P_4.8 Current through GND pin IGND -2 10 mA – P_4.9 Power stage Load current IL -IL(SC) IL(SC) A – P_4.10 Maximum energy dissipation for switching OFF an inductive load - single pulse EAS –2 8 0 m J VS = 13.5V IL(0) =2 0 A Tj(0) =1 5 0 ° C See Figure 4 and Chapter 5.1.2 P_4.11 Maximum energy dissipation for switching OFF an inductive load - repetitive pulse EAR –8 4 m J VS = 13.5V IL(0) =2 0 A Tj(0) =1 0 5 ° C See Figure 4 and Chapter 5.1.2 P_4.13 Temperatures Junction Temperature Tj -40 150 °C – P_4.14

Datasheet 7 Rev. 1.0, 2010-06-24 BTF50060-1TEA General Product Characteristics Figure 4 Maximum energy dissipation for switching OFF an inductive load EA vs. load current Dynamic temperature increase while switching Storage Temperature Tstg -55 150 °C – P_4.16 ESD Susceptibility ESD Resistivity HBM all Pins to GND VESD1 -2 2 kV HBM 6) P_4.17 ESD Resistivity HBM VS vs. GND, VS vs. OUT, OUT vs. GND VESD2 -4 4 kV HBM 6) P_4.18 ESD Resistivity CDM all pins to GND VESD3 -500 500 V CDM 7) P_4.19 ESD Resistivity CDM corner pins VESD4 -750 750 V CDM 7) P_4.20 1) Not subject to production test, specified by design. 2) In case of reverse polarity voltage on pin IN, IIN needs to be limited (see P_4.6) by external resistor RINPUT, see Figure 45. 3) In case of reverse polarity voltage, current through the OUT pin needs to be limited by external circuitry to prevent over heating (see P_4.14). Power dissipation during reverse polarity voltage can be calculated by Equation (3). Please note, build-in protection functions are not available during reverse polarity condition. 4) In accordance to AEC Q100-012 and AEC Q101-006. Test aborted after 1 E6 cycles. 5) VS(LD) is set up without the DUT connected to the generator per ISO 7637-1. 6) ESD susceptibility, HBM acco rding to EIA/JESD 22-A114B 7) ESD susceptibility, Charged Device Model “CDM” EIA/JESD22-C101 or ESDA STM5.3.1 Table 2 Absolute Maximum Ratings (cont’d)1) Tj = -40°C to 150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. T y p . Max. 100 1000 10 100 I L(0) [A] E A [mJ] E_AR (Tj(0) = 105°C) E_AS (Tj(0) = 150°C)

Datasheet 8 Rev. 1.0, 2010-06-24 BTF50060-1TEA General Product Characteristics Notes 1. Stresses above the ones listed here may cause perma nent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection func tions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation.

Datasheet 9 Rev. 1.0, 2010-06-24 BTF50060-1TEA General Product Characteristics

4.2 Functional Range

Figure 5 Overview of functional ranges Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table. Table 3 Functional Range Parameter Symbol Values Unit Note / Test Condition Number Min. T y p . Max. Nominal Supply Voltage Range for Operation VS(NOM) 6 19 V – P_4.23 Extended Supply Voltage Range for Operation VS(EXT) VS(UV)ON 1) see Chapter 5.5, Undervoltage turn ON voltage and Undervoltage turn OFF voltage

28 V 2)

2) In extended supply voltage range, the device is functi onal but electrical parameters are not specified. P_4.24 Extended Supply Voltage Range for short dynamic undervoltage swings VS(DYN) VS(UV)OFF 1) VS(UV)ON 1) V 2)3) 3) Operation only if supply voltage was in range of VS(EXT) before undervoltage swing. Otherwise, device will stay OFF. P_4.25 Junction Temperature Tj -40 150 °C – P_4.26 VS VS(UV)OFF VS(UV)ON 6V 19V 28VVS(NOM) VS(EXT)VS(DYN) FunctionalRange .emf 13.5V

Datasheet 10 Rev. 1.0, 2010-06-24 BTF50060-1TEA General Product Characteristics

4.3 Thermal Resistance

Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Figure 6 and Figure 7 are showing the typical thermal impedance of BTF50060-1TEA mounted according to Jedec JESD51-2,-5,-7 at natural c onvection on FR4 1s and 2s2p boar d. The product (chip + package) was simulated on a 76,4 x 114,3 x 1,5 mm board with 2 inner copper layers (2x 70µm Cu, 2 x 35µm Cu). Where applicable, a thermal via array under the exposed pad co ntacted the first inner copper layer. The PCB layer structure is shown in Figure 8. The PCB layout is shown in Figure 9. Table 4 Thermal Resistance Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max. Thermal Resistance - Junction to Case RthJC 1) Not subject to production test, specified by design. Thermal Resistance - Junction to Ambient - 2s2p RthJA_2s2p 1) –2 2 –K / W 2) 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm board with 2 inner copper layers (2 × 70 mm Cu, 2 × 35 mm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. P_4.29 Figure 6 Typical Transient Thermal Impedance Zth(JA) =f (tP) for different cooling areas Figure 7 Typical Transient Thermal Impedance Zth(JA) =f (tP) for PWM operation with duty cycles D = t / tperiod on a 2s2p PCB /g19/g17/g20 /g20 /g20/g19 /g20/g19/g19 /g19/g17/g19/g19/g20 /g19/g17/g19/g20 /g19/g17/g20 /g20 /g20/g19 /g20/g19/g19 /g20/g19/g19/g19 /g87/g51/g3/g62/g86/g72/g70/g17/g64 /g61/g87/g75/g45/g36/g3/g62/g46/g18/g58/g64 /g20/g86/g3/g80/g76/g81/g3/g73/g82/g82/g87/g83/g85/g76/g81/g87 /g20/g86/g3/g22/g19/g19/g80/g80/g240 /g20/g86/g3/g25/g19/g19/g80/g80/g240 /g21/g86/g21/g83 /g19/g17/g20 /g20 /g20/g19 /g20/g19/g19 /g19/g17/g19/g19/g20 /g19/g17/g19/g20 /g19/g17/g20 /g20 /g20/g19 /g20/g19/g19 /g20/g19/g19/g19 /g87/g51/g3/g62/g86/g72/g70/g17/g64 /g61/g87/g75/g45/g36/g3/g62/g46/g18/g58/g64 /g39/g3/g32/g3/g19/g17/g24 /g3/g3/g3/g3/g3/g3/g3/g19/g17/g21 /g3/g3/g3/g3/g3/g3/g3/g19/g17/g20 /g3/g3/g3/g3/g3/g3/g3/g19/g17/g19/g24 /g3/g3/g3/g3/g3/g3/g3/g19/g17/g19/g21 /g3/g3/g3/g3/g3/g3/g3/g19/g17/g19/g20 /g21/g86/g21/g83

Datasheet 12 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description

5 Functional Description

5.1 Power Stage

The power stage is built by a P-channel vertical power MOSFET (DMOS). The ON-state resistance RDS(ON) depends on the supply voltage VS as well as the junction temperature Tj. Figure 26 shows the dependencies for the typical ON-state resistance. The behav ior in reverse polarity is described in Chapter 5.3.4. A HIGH signal at the input pin (see Chapter 5.2) causes the power DMOS to switch ON. A LOW signal at the input pin causes the power DMOS to switch OFF.

5.1.1 Switching a Resisitve Load

Defined slew rates for turn ON and OFF as well as edg e shaping support PWM’ing of the load while achieving lowest EMC emission at minimum switching losses. Figure 10 shows the typical timing when switching a resistive load. Please note: if the devices logic is inac tive, e.g. because the IN signal was LOW for t > tRESET, the logic of the device needs a wake-up time of twake for turning the output ON in addition to the turn ON time tON. See also Figure 11. Figure 10 Switching a resistive load SwitchingResistiveLoad_F.emf VOUT t VIN 10% VS 30% VS 70% VS 90% VS tON tOFF (dV/dt)ON (dV/dt)OFF tr tf VIN(H),min VIN(L),max t

Datasheet 13 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description Figure 11 Wake up timing

5.1.2 Switching an Inductive Load - Infineon ® SMART CLAMPING

When switching OFF inductive loads with no path for load current freewheeling available, the output voltage VOUT drops below ground potential due to the involved inductance ( -d iL/dt = - vL/L ; - VOUT ≅ - VL ). To prevent the destruction of the device due to high voltages, there is a voltage clamp mechanism implemented that keeps the negative output voltage at a certain level (-VOUT=VS-VSD(CL)). Please refer to Figure 1 and Figure 12 for details. Figure 12 Switching an inductance Nevertheless, the energy capability of the device is limited because the energy is converted into heat. That’s why the maximum allowed load inductance is limited as well. Please see Figure 4 for limitations of energy and load inductance. For calculationg the demagnization energy, Equation (1) may be used: (1) The equation can be simplified under the assumption of RL = 0 Ω to: (2) The BTF50060-1TEA provides Infineon® SMART CLAMPING functionality. To optimize the energy capability for single and parallel operation, the clamp voltage VSD(CL) increases over the junction temperature Tj and load current IL. Figure 30 shows the dependency from Tj for the typical VSD(CL). Please refer also to Figure 15. t t wake-up.emf VIN VOUT t IIS twake+tsIS(ON) IIS(OFFSET) tRESET twake+tON t > tRESET t < tRESET tON tsIS(ON) VOUT SwitchingInductance .e mf t IL t VS ON OFF VSD(CL) EA VSDC L() L RL RL VSD CL() VS– ln IL+××= EA 2--- LI L

2 VSDC L()

Datasheet 14 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description

5.1.3 Switching a Capacitive Load

A capacitive load’s dominant characteristic is it’s inrush current. The BTF50060-1TEA can support inrush currents up to IL(SC). If the inrush current reaches IL(SC), the device may detect a short circuit condition and switches OFF. For a description of the short circuit protection mechanism, please refer to Chapter 5.3.1.

5.1.4 Inverse Load Current Operation

In case of a negative load current, e.g. caused by load operating as a generator, the device can not block a current flowing through the intrinsic body diode. See Figure 13. The power stage of the devi ce can be switched ON or stays ON as long as VIN = HIGH, reaching the same RDS(ON) as for positive load currents, if no fault condition is detected. In case of fault condition, the logic of the device will switch OFF the power stage and supply a fault signal IIS(fault). Since the device can not block a negative load current (even under fault conditions), it can not protect itself from overload condition. In the applicat ion, overload conditions , e.g. over temperature, must not occur during inverse load current operation. Figure 13 Inverse load current operation

5.2 Input Circuit

The input circuitry is compatible wit h 3.3 and 5V micro controllers. If VIN is set to VIN = VIN(H) (VIN = HIGH), the device will turn ON. See Figure 10 for the timings. If VIN is set to VIN = VIN(L) (VIN = LOW), the power stage of the device will be turned OF F. The input circuitr y has a hysteresis ∆VIN. The input circuitry is compatible with PWM applications. Figure 14 shows the electrical equivalent input circ uitry. The logic of the BTF50060-1TEA stays active for a delay time tRESET after the switch OFF signal. Figure 14 Input pin circuitry Applying an input voltage of VIN > 20V (absolute maximum ratings exceeded!) may force the BTF50060-1TEA to deactivate parts of the logic circuitry. This includes the undervoltage shutdown, the undervoltage restart delay, and the analog sense function. In this case, also the short circuit shutdown threshold IL(SC) is set to typically 50A, and LOAD GND logic Invers.emf VS OUT G -IL(inv) IN GND RIN InputCircuitry.emf

Datasheet 15 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description the latch reset time tRESET is reduced to typically 200µs. To reset this behavior, set input voltage to VIN = LOW for t>300µs.

Datasheet 16 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description

5.3 Protection Functions

The BTF50060-1TEA provides embedded protective functi ons. Integrated protection functions are designed to prevent the destruction of the IC from fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functi ons are designed for neither continuous nor repetitive operation. In case of overload, high inrush currents, or short circuit to ground, the BTF50060-1TEA offers several protection mechanisms. Figure 15 describes the functionality of the diagnosis and protection block. Figure 15 Diagram of Diagnosis & Protection block

5.3.1 Protection by O ver Current Shutdown

The internal logic permanently monitors the load current IL. In the event of a load current exceeding the short circuit shutdown threshold ( IL>IL(SC)), the output will switch OFF with a latchi ng behavior. During an over current shutdown, an overshooting IL(SC)peak may occur, depending on the short circuit impedances. For the case the device is in ON state while short circuit appears, the typical overshooting IL(SC)peak as a function of the steepness of the short circuit current dISC/dt, see Chapter 6.2.3. For a detailed description of the latching behavior, please see Chapter 5.3.3. At lower supply voltages the current tripping level IL(SC) will decrease depending on the supply voltage. At VS = 4.7V, the current tripping level will be reduced to IL(SC)LV. Please refer to Figure 32 for typical current tripping level IL(SC) as a function of the supply voltage VS. Diagnosis & Protection DiagnosisProtection .emf Temp Input circuit Sense output IIS(fault) A Gate driver Undervoltage protection VS(UV) delay = td(UV) no delay INTELLIGENT LATCH Tjt IL(SC) ≥1QS QR Open Load at OFF VOUT(OL) ENABLE Vs OUT 1delay = tRESET no delay timer reset No FAULT IN No Undervoltage ROUT(GND)

Datasheet 17 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description

5.3.2 Protection by Over Temperature Shutdown

The internal logic permanently monitors the junction temp erature of the output stage. In the event of an over temperature ( Tj > Tjt) the output will immediately switch OFF with a latchi ng behavior, see Chapter 5.3.3 for details.

5.3.3 Infineon ® INTELLIGENT LATCH

The BTF50060-1TEA provides Infineon ® INTELLIGENT LATCH to avoid permanent resetting of a protective, latched switch OFF caused by over current shutdown or over temperature shutdown) in PWM applications. To reset a latched protective switch O FF the fault has to be acknowledged by commanding the input LOW for a minimum duration of treset. See Figure 16 for details. Figure 16 Infineon ® INTELLIGENT LATCH - fault acknowledge and latch reset

5.3.4 Reverse Polarity Protection

Reverse polarity condition is the mix- up of the power supply connections of the entire application. This means, application GND connector is connected to positive supply voltage, while Vs pin is connected to negative supply voltage or ground potential. See Figure 17 and Figure 45. Figure 17 Reverse polarity condition t INTELLIGENTLATCH .emf VIN t IIS IIS(fault) t over temperature / short circuit t VOUT tRESET tRESET IIS(OFFSET) latch reset latch reset LOAD GND Revers .emf VS OUT -VS(rev) -IL RIS RSENSE RINPUT-IIN logic

Datasheet 18 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description Under reverse polarity condit ion, the output stage can not block a cu rrent flow. It will conduct a load current via the intrinsic body diode. The current th rough the output stage has to be limited either by the load itself or by external circuitry, to avoid over heating of the power stage. Power losses in the power stage during reverse polarity condition can be calculated by Equation (3): (3) Additionally, the current into the logic pins has to be limited to the maximum current described in Chapter 4.1 with an external resistors. Figure 46 shows a typical application. Resistors RINPUT and RSENSE are used to limit the current in the logic of the device and in the ESD protection stage. The recommended value for RINPUT = RSENSE = 10kΩ. As long as |-VS(rev)| < 16V, the current through the GND pin of the device is blocked by an internal diode.

5.3.5 Protection during Loss of Ground

In case of loss of the module ground or device grou nd connection (GND pin) the device protects itself by automatically turning OFF (w hen it was previously ON) or remains O FF (even if the load remains connected to ground), regardless if the input is driven HIGH or LOW. In case GND recovers the device may need a reset via the IN pin to return to normal operation.

5.3.6 Protection during Loss of Load or Loss of V S Condition

In case of loss of load with charged primary inductanc es the maximum supply voltage has to be limited. It is recommended to use a Z-diode, a varistor ( VZa < 40V) or VS clamping power switches with connected loads in parallel. In case of loss of a charged inductive load, disturbances on pin OUT may require a reset on IN pin for the device to regain normal operation. In case of loss of VS connection with charged inductive loads, a current path with load current capability has to be provided, to demagnetize the charged inductances. It is recommended to use a diode, a Z-diode or a varistor (VZb <1 6 V , VZL + VD <1 6 V ) . For higher clamp voltages currents through all pins have to be limited according to the maximum ratings. Please see Figure 18 and Figure 19 for details. Figure 18 Loss of V S Prev ILr e v()–() VSD rev()–()×= LossOfVs.emf VD VZL LOAD VZb LOAD VZa GND logic VS OUT Sm ar t Clamping GND logic VS OUT Sm ar t Clamping

Datasheet 19 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description Figure 19 Loss of load

5.3.7 Protection during ESD or Over Voltage Condition

All logic pins have ESD protection. A dedicated clamp mechanism protects the logi c IC against transient over voltages. See Figure 20 for details. Figure 20 Over voltage protection In the case ( VS > max VS(SC))&(VS < VSD(CL)), the output transistor is still operational and fo llows the input. Parameters are no longer warranted and lifetime is reduced compared to normal mode. This specially impacts the short circuit robustness, as well as the maximum energy EAS the device can handle. The BTF50060-1TEA provides Infineon ® SMART CLAMPING functionality, which suppresses non nominal over voltages by actively clamping the over voltage across the power stage and the load. This is achieved by controlling the clamp voltage VSD(CL) depending on the junction temperature Tj and the load current IL. See Figure 15 for details. Please refer also to Chapter 5.1.2. VZb LOAD VZa LossOfLoad .emf GND logic VS OUT Sm ar t Clamping ESD protection IS OverVoltageProtection.emf VS Over voltage protection VZ(IC) IN OUT GND

Datasheet 20 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description

5.4 Diagnosis Functions

For diagnosis purpose, the BTF50060 -1TEA provides an enhanced analog sense signal at the pin IS. For an overview of the diagnosis func tions, you may have a look at Figure 15 “Diagram of Diagnosis & Protection block”.

5.4.1 Sense Output

The current sense output is a current source driving a signal IIS proportional to the load current (see Equation (5)) as long as no “hard” failure mode occurs (short circuit to GND / over temperature) and VSIS = VS - VIS > 3V. It is activated and deactivated by the input signal. Us ually, in the applicatio n a pull-down resistor RIS is connected between the current sense pin IS and GND pin. A typical value is RIS =1 . 0kΩ. Figure 46 shows a simplified application setup. Table 5 is giving a quick reference for the logic / analog state of the IS pin during device operation. In case a short circuit or an over temperature condition is detected, the sense output is supplying a fault signal IIS(fault). The fault signal is reset by an input signal being LOW for t > tRESET. As long as an open load, short-to- VS or inverse operation is detected while the device is in OFF state, the sense output al so supplies the fault signal IIS(fault). The timings and logic of the IS pin are described in Figure 21. During output turning ON or OFF, the sense signal is invalid. Please note: if the devices logic is inactive, e.g. because the IN signal was LOW for t > tRESET, the logic of the device needs a wake-up time of twake for activating the sense output in addition to the current sense settling time for turn ON tsIS(ON). See also Figure 11. Table 5 Truth Table for Sense Signal Operation mode Input level Output level Sense output Normal operation HIGH 1) 1) HIGH: VIN = VIN(H) VOUT = VS - RDS(ON) * IL IIS =( IL / kIS)+ IIS(OFFSET) LOW 2) for t < tRESET 2) LOW: VIN = VIN(L) VOUT ~G N D (VOUT < VOUT(OLL)) IIS = IIS(OFFSET) LOW for t > tRESET Z3) (IIS = IIS(LL)) 3) Z: High impedance Inverse operation HIGH VOUT > VS IIS ≤ IIS(OFFSET) LOW for t < tRESET IIS = IIS(OFFSET) LOW for t > tRESET IIS = IIS(FAULT) After short circuit to GND or over temperature detection HIGH or LOW for t< tRESET VOUT ~G N D IIS = IIS(FAULT) LOW for t > tRESET Z (IIS = IIS(LL)) Short circuit to VS HIGH VOUT = VS IIS ≤ IIS(OFFSET) LOW for t < tRESET IIS = IIS(OFFSET) LOW for t > tRESET IIS = IIS(FAULT) Open load HIGH VOUT = VS IIS ≤ IIS(OFFSET) LOW for t < tRESET VOUT > VOUT(OLH) 4) Can be achieved e.g. with external pull up resistor ROL, see Figure 46. IIS = IIS(OFFSET) LOW for t > tRESET IIS = IIS(FAULT)

Datasheet 22 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description For definition of kIS, the following Equation (6) is used: (6) IL1 and IL2 are two different load currents, IIS(IL1) and IIS(IL2) are the corresponding sense currents.

5.4.2 Enhancing Accuracy of the Sense Output by End of Line Calibration

For some applications it may be necessary to measure the load current with very high accuracy. To increase the device accuracy, different methods can be used, e.g. single point calibration or dual point calibration. The variance of the sense current at a certain load current depends on the variance of the factor kIS as well as on the variance of the offset current IIS(OFFSET). The temperature variance of the factor kIS over the temperature range is described with the parameter ∆kIS,Temp. (7) The variance of the sense current offset over the temperature range is defined as shown in Equation (8): (8)

5.4.3 Short-to-Battery detection / Open Load Detection in OFF state

The BTF50060-1TEA provides open load diagnosis in OFF state. This is achieved by monitoring the OUT voltage. The open load at OFF diagnosis is activated if VIN = LOW for t > tRESET. An open load or short-to-battery is detected if VOUT > VOUT(OLH). To provoke this condition during Open Load, it may be necessary to use an external pull up resistor ROL (see Figure 46). In case of detecting a shorted load to battery, open load, or inverse operation in OFF state, the pin IS provides a defined fault current IIS(fault). If VOUT drops below VOUT(OLL), or VIN is set to HIGH, the fault signal is removed. Figure 23 shows the behavior of the open load at OFF diagnosis. Figure 43 and Figure 44 provide the typical behavior of VOUT(OLH) and VOUT(OLL) as a function of the supply voltage and junction temperature. The device internally connect s OUT with GND pin with an effective resistor ROUT(GND). In case the application provides high leakage current outside of the BTF50060-1T EA between Vs and OUT, it may be necessary to use an external resistor RL_OL to disable open load detection. Figure 46 gives an example of external circuitry for enabling / disabling open load detection in OFF state. kIS IL1 IL2– IIS IL1() IIS IL2()– ∆kIS Temp, max k IS 40°C–() kIS 25°C()– kIS 40°C–() kIS 25°C()–;[]= ∆IIS OFFSET() max IIS OFFSET() 40°C–() IIS OFFSET() 25°C()– IIS OFFSET() 40°C–() IIS OFFSET() 25°C()–;[ ]=

Datasheet 23 Rev. 1.0, 2010-06-24 BTF50060-1TEA Functional Description Figure 23 Open load detection in OFF state

5.5 Undervoltage Shutdown & Restart

The BTF50060-1TEA switches OFF whenever VS drops below VS(UV)OFF. The device restarts automatically after the supply voltage increases to a sufficient level ( VS > VS(UV)ON) and a delay time of tdelay(UV), if the input pin IN is HIGH. Please see Figure 24 for details. The fault signal is reset if VS is below VS(UV) for more than typ. 70µs. Figure 24 Undervoltage shutdown and restart OpenLoad_at_OFF.emf VOUT t IIS ∆VOUT(OL) VOUT(OLL ) VOUT(OLH ) t IIS(LL) IIS(FAULT) Undervoltage.emf VS t VOUT tdelay(UV) ∆VS(UV) ON VS(UV)OFF VS(UV)ON Z t t VIN HIGH

Datasheet 24 Rev. 1.0, 2010-06-24 BTF50060-1TEA

6 Electrical Character istics BTF50060-1TEA

6.1 Electrical Characteristics Table

Table 6 Electrical Characteristics: BTF50060-1TEA VS = 6V to 19V, Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max. Operating currents Standby current for whole device with load Tj =2 5 ° C IS(OFF)_25 1) –58 µ A VIN = LOW for t> tRESET, VS = 13.5V, Tj =2 5 ° C VOUT < VOUT(OLL) P_6.1 Standby current for whole device with load Tj =8 5 ° C IS(OFF)_85 1) –58 µ A VIN = LOW for t> tRESET, VS = 13.5V, Tj =8 5 ° C VOUT < VOUT(OLL) P_6.2 Standby current for whole device with load Tj =1 5 0 ° C IS(OFF)_150 –2 0 6 0 µ A VIN = LOW for t> tRESET, Tj =1 5 0 ° C VOUT < VOUT(OLL) P_6.3 Ground current during ON IGND(ON) –35 m A VIN =H I G H , t> tON P_6.4 Supply current during open load detection in OFF state IS(OL) 1) –1 2 1 5 m A VIN = LOW for t> tRESET, VOUT > VOUT(OLH) P_6.5 Power stage On-State Resistance RDS(ON)_25 1) –6 . 8– m Ω VIN =H I G H , Tj =2 5 °C, VS = 13.5V, IL = +/-13.5A P_6.6 On-State Resistance RDS(ON)_150 –1 0 1 2 m Ω VIN =H I G H , Tj =1 5 0 °C, VS = 13.5V, IL = +/-13.5A P_6.7 On-State Resistance RDS(8V)_25 1) –8– m Ω VIN =H I G H , Tj =2 5 °C, VS =8 V , IL = +/-13.5A P_6.8 On-State Resistance RDS(8V)_150 1) –1 1 . 5 1 5 m Ω VIN =H I G H , Tj =1 5 0 °C, VS =8 V , IL = +/-13.5A P_6.9

Datasheet 25 Rev. 1.0, 2010-06-24 BTF50060-1TEA On-State Resistance at low supply voltage RDS(UV)_25 1) –1 0 . 5– m Ω VIN =H I G H , Tj =2 5 °C, VS =4 . 7 V , IL = +/-13.5A P_6.10 On-State Resistance at low supply voltage RDS(UV)_150 –1 9 2 5 m Ω VIN =H I G H , Tj =1 5 0°C, VS =4 . 7 V , IL = +/-13.5A P_6.11 Body diode forward voltage drop2) -VSD(rev) 1) 300 700 1000 mV VIN =0 V , IL = -13.5A (see Figure 13 and Figure 17) P_6.12 Output leakage current3) IL(OFF)_25 1) –0 . 11 µ A Tj =2 5 ° C , VIN =L O W , VOUT =0 V P_6.13 Output leakage current IL(OFF)_85 1) –0 . 11 µ A Tj =8 5 ° C , VIN =L O W , VOUT =0 V P_6.14 Output leakage current IL(OFF)_150 –1 6 0 µ A Tj =1 5 0 ° C , VIN =L O W , VOUT =0 V P_6.15 Switching a resistive load Slew rate 30% to 70% VS (dV/dt)ON 15 35 55 V/µs RL =1 Ω, VS = 13.5V (see Figure 10 and Figure 11 for definitions) P_6.16 Slew rate 70% to 30% VS -(dV/dt)OFF 12.5 25 37.5 V/µs P_6.17 Slew rate matching (dV/dt)ON -| ( dV/dt)OFF| ∆dV/dt -7 10 27 V/µs P_6.18 Turn ON time to 90% VS tON – 0.35 1.0 µs P_6.19 Turn OFF time to 10% VS tOFF – 0.85 1.5 µs P_6.20 Turn ON/OFF matching tON-tOFF -1.15 -0.5 -0.25 µs P_6.21 Wake up delay time twake 1) –2– µ s P _ 6 . 6 2 Turn ON rise time 10% to 90% VS tr – 0.25 0.6 µs P_6.22 Turn OFF fall time 90% to 10% VS tf – 0.35 0.6 µs P_6.23 Switching an inductive load Output voltage drop limitation4) VSD(CL)_25 1) 32 40 – V Tj =2 5 ° C , IL =4 0 m A , P_6.26 Output voltage drop limitation VSD(CL)_150 1) 40 48 – V Tj =1 5 0 ° C , IL = 13.5A, P_6.27 Input circuitry LOW level input voltage VIN(L) -0.3 – 0.8 V – P_6.28 Table 6 Electrical Characteristics: BTF50060-1TEA (cont’d) VS = 6V to 19V, Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max.

Datasheet 26 Rev. 1.0, 2010-06-24 BTF50060-1TEA HIGH level input voltage VIN(H) 2.0 – 6 V – P_6.29 Input voltage hysteresis VIN(HYS) Input pull down resistor RIN 50 100 200 k Ω –P _ 6 . 3 1 Protection Short circuit shutdown threshold IL(SC) 60 75 95 A 8V < VS < 19V P_6.32 Short circuit shutdown threshold at low supply voltage IL(SC)LV 1) 10 – IL(SC) A4 . 7 V < VS <8 V P _ 6 . 3 3 Thermal shutdown temperature Tjt 150 175 1) 2001) °C – P_6.34 Latch reset time tRESET 1) 40 55 80 ms VIN =L O W 6V < VS <2 8 V P_6.35 Output leakage current while GND disconnected5) IOUT(GND) 1) 00 . 5 1 . 0 m A VS = VS(EXT), GND pin disconnected P_6.40 Over voltage protection of logic IC VZ(IC) 45 50 – V IGND = 5mA P_6.41 Sense Output Sense current steepness (reciprocal) kIS 10.5 13 15 k see Equation (6) IL1 =1 3 . 5 A , IL2 =0 A , VS - VIS >3 V P_6.42 kIS temperature variance ∆kIS,Temp Sense current IL = IL1 IIS(L1) 0.95 1.24 1.63 mA IL = 13.5A, VS - VIS >3 V P_6.44 Sense current offset IIS(OFFSET) 50 200 350 µA VS - VIS >3 V P _ 6 . 4 6 Sense current offset temperature variance ∆IIS(OFFSET) -100 0 100 µA see Equation (8) P_6.47 Leakage Current at sense output IIS(LL) 00 . 11 µ A VIN = LOW for t> tRESET, VOUT < VOUT(OLL) P_6.48 Fault signal current at sense output IIS(fault) 6.5 7.5 9 mA 6) VS - VIS >3 V P_6.49 Current sense settling time for turn ON to 90% IIS tsIS(ON) 1) 013 µ s VS = 13.5V, RL =1 . 0Ω, RIS =1 . 0 kΩ, CSENSE < 100pF, See Figure 21 P_6.50 Current sense settling time for turn OFF to 10% IIS tsIS(OFF) 1) 013 µ s P _ 6 . 5 1 Current sense settling time matching tsIS(ON)- tsIS(OFF) -0.5 0 0.5 µs P_6.52 Table 6 Electrical Characteristics: BTF50060-1TEA (cont’d) VS = 6V to 19V, Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max.

Datasheet 28 Rev. 1.0, 2010-06-24 BTF50060-1TEA

6.2 Parameter dependencies

6.2.1 Power Stage

Figure 25 Typical standby current IS(OFF) as a function of the junction temperature Tj VS = 13.5V, VIN = LOW for t > tRESET Figure 26 Typical ON state resistance RDS(ON) as a function of the junction temperature Tj VS = 13.5V, IL = 13.5A, VIN =H I G H Figure 27 Typical ON state resistance RDS(ON) as a function of the supply voltage VS Tj =2 5 ° C , IL = 13.5A, VIN =H I G H Figure 28 Typ. output leakage current IL(OFF) as a function of the junction temperature Tj VS = 13.5V, VIN =L O W /g19 /g24 /g20/g19 /g20/g24 /g21/g19 /g21/g24 /g16/g24/g19 /g19 /g24/g19 /g20/g19/g19 /g20/g24/g19 /g55 /g77/g3/g62/g131/g38/g64 /g44/g54/g11/g50/g41/g41/g12/g3/g62/g151/g36/g64 /g57/g86/g3/g32/g3/g20/g22/g17/g24/g57/g57/g86/g3/g32/g3/g20/g28/g57 /g19 /g21 /g23 /g25 /g27 /g20/g19 /g20/g21 /g16/g24/g19 /g19 /g24/g19 /g20/g19/g19 /g20/g24/g19 /g55 /g77/g3/g62/g131/g38/g64 /g53/g39/g54/g11/g50/g49/g12/g3/g62/g80/g50/g75/g80/g64 0 5 10 15 20 25 30 V S [V] R DS(ON) [mOhm] /g19 /g21 /g23 /g25 /g27 /g20/g19 /g20/g21 /g16/g24/g19 /g19 /g24/g19 /g20/g19/g19 /g20/g24/g19 /g55 /g77/g3/g62/g131/g38/g64 /g44/g47/g11/g50/g41/g41/g12/g3/g62/g151/g36/g64

Datasheet 29 Rev. 1.0, 2010-06-24 BTF50060-1TEA

6.2.2 Input Circuit

Figure 29 Typical body diode forward voltage drop -VSD(rev) as a function of the junction temperature Tj IL =- 4 A , VIN =L O W Figure 30 Typical output voltage drop limitation VSD(CL) as a function of the junction temperature Tj IL =4 0 m A , VIN =L O W Figure 31 Typ. input pull down resistor RIN as a function of the junction temperature Tj /g19 /g19/g17/g21 /g19/g17/g23 /g19/g17/g25 /g19/g17/g27 /g20 /g16/g24/g19 /g19 /g24/g19 /g20/g19/g19 /g20/g24/g19 /g55/g77/g3/g62/g131/g38/g64 /g57/g54/g39/g11/g85/g72/g89/g12/g3/g62/g57/g64 /g19 /g20/g19 /g21/g19 /g22/g19 /g23/g19 /g24/g19 /g25/g19 /g16/g24/g19 /g19 /g24/g19 /g20/g19/g19 /g20/g24/g19 /g55 /g77/g3/g62/g131/g38/g64 /g57/g54/g39/g11/g38/g47/g12/g3/g62/g57/g64 /g19 /g21/g19 /g23/g19 /g25/g19 /g27/g19 /g20/g19/g19 /g20/g21/g19 /g20/g23/g19 /g16/g24/g19 /g19 /g24/g19 /g20/g19/g19 /g20/g24/g19 /g55/g77/g3/g62/g131/g38/g64 /g53/g44/g49/g3/g62/g78/g50/g75/g80/g64

Datasheet 30 Rev. 1.0, 2010-06-24 BTF50060-1TEA

6.2.3 Protection Functions

Figure 32 Typical short circuit shutdown threshold as a function of the supply voltage VS; Tj = 25°C Figure 33 Typical short circuit shutdown threshold as a function of the junction temperature Tj; VS = 13.5V Figure 34 Typical short circuit overshooting as a function of the dISC/dt (device is in ON state when short circuit appears) Tj =2 5 ° C /g19 /g21/g19 /g23/g19 /g25/g19 /g27/g19 /g20/g19/g19 /g19 /g24 /g20/g19 /g20/g24 /g21/g19 /g21/g24 /g22/g19 /g57/g54/g3/g62/g57/g64 /g44/g47/g11/g54/g38/g12/g3/g62/g36/g64 /g57/g54/g11/g56/g57/g12/g50/g41/g41 /g19 /g21/g19 /g23/g19 /g25/g19 /g27/g19 /g20/g19/g19 /g16/g24/g19 /g19 /g24/g19 /g20/g19/g19 /g20/g24/g19 /g55/g77/g3/g62/g131/g38/g64 /g44/g47/g11/g54/g38/g12/g3/g62/g36/g64 /g57/g86/g3/g32/g3/g20/g22/g17/g24/g57/g57/g86/g3/g32/g3/g24/g57 100 120 0.1 1 10 100 dI L/dt [A/µs] I peak,SC [A]

Datasheet 31 Rev. 1.0, 2010-06-24 BTF50060-1TEA

6.2.4 Diagnosis Functions

Figure 35 Typical sense current slope kIS as a function of the junction temperature Tj VS = 13.5V, IL1=13.5A, IL2=0A, VIN=HIGH Figure 36 Typical sense current slope kIS as a function of the supply voltage VS Tj =2 5 ° C , IL1=13.5A, IL2=0A, VIN=HIGH Figure 37 Typical sense current slope kIS as a function of the load current IL1 VS = 13.5V, Tj =2 5 ° C , IL2=0A, VIN =H I G H Figure 38 Typical sense current offset IIS(OFFSET) as a function of the junction temperature Tj VS = 13.5V, VIN = HIGH /g19 /g21/g19/g19/g19 /g23/g19/g19/g19 /g25/g19/g19/g19 /g27/g19/g19/g19 /g20/g19/g19/g19/g19 /g20/g21/g19/g19/g19 /g20/g23/g19/g19/g19 /g20/g25/g19/g19/g19 /g16/g24/g19 /g19 /g24/g19 /g20/g19/g19 /g20 /g24 /g55/g77/g3/g62/g131/g38/g64 /g78/g44/g54 /g19 /g21/g19/g19/g19 /g23/g19/g19/g19 /g25/g19/g19/g19 /g27/g19/g19/g19 /g20/g19/g19/g19/g19 /g20/g21/g19/g19/g19 /g20/g23/g19/g19/g19 /g20/g25/g19/g19/g19 /g19 /g20 /g19/g21 /g19/g22 /g19 /g57 /g54/g3/g62/g57/g64 /g78/g44/g54 /g19 /g21/g19/g19/g19 /g23/g19/g19/g19 /g25/g19/g19/g19 /g27/g19/g19/g19 /g20/g19/g19/g19/g19 /g20/g21/g19/g19/g19 /g20/g23/g19/g19/g19 /g20/g25/g19/g19/g19 /g19/g21 /g19 /g23 /g19 /g25 /g19 /g44 /g47/g20/g3/g62/g36/g64 /g78/g44/g54 100 150 200 250 300 -50 0 50 100 150 T j [°C] I IS(OFFSET) [µA]

Datasheet 34 Rev. 1.0, 2010-06-24 BTF50060-1TEA

Application Information

7 Application Information

Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. Figure 45 Application Diagram for switching an inducti ve load without external circuitry supporting open load detection in OFF state Figure 46 Application Diagram with ex ternal circuitry supporting open load detection in OFF state Note: This are very simplified examples of an application circuit. The function must be verified in the real application. Table 7 Typical Application Parameter 1) 1) Values are calculated and not subject to production test. Parameter Symbol Typical Values Note / Condition Range of typical PWM frequencies Nominal Load Current IL(NOM) 16.5 A TA = 85°C, Tj <1 5 0 ° C , RthJA =2 2 K / W DC operation or fPWM < 1kHz; VS =1 9 V Typical load current at 10 kHz IL(10kHz) 11 A TA = 85°C, Tj <1 5 0 ° C , RthJA =2 2 K / W fPWM = 10kHz, duty cycle = 95%, VS =1 9 V Typical load current at 25 kHz IL(25kHz) 7 A TA = 85°C, Tj <1 5 0 ° C , RthJA =2 2 K / W fPWM = 25kHz, duty cycle = 95%, VS =1 9 V , appl _example_L.emf IN VS GNDRIS OUT Load GND Vbat +5V IS µC e.g. XC866 RSENSE RINPUT 10k 10k CVS 470µF appl _example _OL.emf IN VS GNDRIS OUT GND Vbat +5V IS µC e.g. XC866 RSENSE RINPUT 10k 10k ROL 3k3 RL_OL 33k LoadD1 CVS 470µF

Datasheet 35 Rev. 1.0, 2010-06-24 BTF50060-1TEA

7.1 Further Application Information

• Please contact us for information regarding the pin FMEA
• For further information you may visit http://www.infineon.com/ Table 8 Bill of Material Reference Value Purpose RINPUT 10 kΩ Protection of the µC during overvoltage and reverse battery condition RSENSE 10 kΩ Protection of the µC during overvoltage and reverse battery condition RIS 1 kΩ Sense resistor. Shunt resistor for measuring IIS by the µC’s AD converter. CVS 470µF Capacitor buffering the supply voltage Switching an inductive load D1 Freewheeling diode for commutation of load current. Depending on load current and thermal boundary conditions, it may be necessary to use active freewheeling by a MOSFET, instead of the diode. External circuitry supporting open load at OFF detection T1 BC807 Switches the supply voltage for activa tion / deactivation of Open Load at OFF detection ROL 3.3kΩ Pull up resistor for Open Load detection in OFF state RL_OL 33kΩ Pull down resistor for deactivating Open Load detection in OFF state

Datasheet 36 Rev. 1.0, 2010-06-24 BTF50060-1TEA Package Outlines and Parameters

8 Package Outlines and Parameters

Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb- free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Table 9 Parameter Value Jedec humidity category acc. J-STD-020-D MSL3 Jedec classification temperature acc. J-STD-020-D 260°C Dimensions in mm

Datasheet 37 Rev. 1.0, 2010-06-24 BTF50060-1TEA

Revision History

9 Revision History

DS V1.0 2010-06-24 Init ial datasheet version.

81726 Munich, Germany

© 2010 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.