BTF1A AGERE | Alldatasheet

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Technical content

Features

■ Produces a logic zero in third state ■ 400 mV difference voltage in third state ■ T wo line drivers per package ■ Logic to convert TTL input logic levels to differen- tial, pseudo-emmiter coupled logic (ECL) output logic levels ■ No line loading when VCC = 0 V ■ High output driver for 50 Ω loads ■ 200 mA short-circuit current (typical) ■ 2.0 ns maximum propagation delay ■ <0.2 ns output skew (typical) Receiver Features ■ T wo line receivers per package ■ High input impedance ≅ 8 kΩ ■ Logic that converts differential input logic levels to TTL output logic levels ■ 4.0 ns maximum propagation delay ■ <0.20 V input sensitivity (typical) ■ −1.2 V to +7.2 V common-mode range Common Device Features ■ Common enable for each driver/receiver pair ■ Operating temperature range: –40 °C to +125 °C (wider than the 41 Series) ■ Single 5.0 V ± 5% supply ■ 400 Mbits/s maximum data rate ■ Meets enhanced small device interface (ESDI) standards ■ Electrostatic discharge (ESD) performance better than the 41 Series ■ Lower power requirement than the 41 Series

Description

The BTF1A device is a dual differential transceiver circuit that transmits and receives digital data over balanced transmission lines and is compatible with Lucent Technologies Microelectronics Group differ- ential drivers and receivers. It is designed to provide a strong logic zero when in the third state. The mini- mum difference voltage in the third state is 400 mV . It is designed specifically for bus applications where a well-defined logic state is needed when the bus is idle. The driver puts out a logic zero when in the third state mode, which is easily overriden by an active buffer on the bus. When all the buffers on the bus are inactive (third state), the signal on the bus is a zero indicating that the bus is idle. The dual drivers translate input TTL logic levels to dif- ferential pseudo-ECL output levels. The dual receiver converts differential input logic levels to TTL output levels. Each driver/receiver pair has its own common enable control allowing serial data and a control clock to be transmitted and received on a single integrated circuit. The BTF1A transceiver requires the customer to supply termination resistors on the circuit board. The powerdown loading characteristics of the receiver input circuit are approximately 8 kΩ relative to the power supplies; hence, it will not load the transmission line when the circuit is powered down. For those circuits with termination resistors, the line will remain impedance matched when the circuit is powered down. The driver does not load the line when it is powered down.

Figure 1. Differential Transceiver Logic Diagram Table 1. Enable Truth Table periods can adversely affect device reliability. Table 2. Absolute Maximum Ratings

Agere Systems Inc. 3 Data Sheet March 2001 With Idle Bus Indicator Dual Differential Transceiver BTF1A

Electrical Characteristics

For variations in electrical characteristics over the temperature range, see Figure 10 through Figure 12. Table 3. Power Supply Current Characteristics

Table 4. Driver Voltage and Current Characteristics For variations in output voltage over the temperature range, see Figure 10 and Figure 11. TA = −40 °C to +125 °C.

  1. Values are with terminations as per Figure 7.
  2. The input levels and difference voltage provide zero noise immunity and should be tested only in a static, noise-free environment.
  3. T est must be performed one lead at a time to prevent damage to the device.

Table 5. Receiver Voltage and Current Characteristics For variation in minimum VOH and maximum VOL over the temperature range, see Figure 10. TA = –40 °C to +125 °C.

  1. The input levels and difference voltage provide zero noise immunity and should be tested only in a static, noise-free environment.
  2. Outputs of unused receivers assume a logic 1 level when the inputs are left open. (It is recommended that all unused positive inputs
  3. Test must be performed one lead at a time to prevent damage to the device.

Table 6. Driver Timing Characteristics (See Figure 3 and Figure 4.) nected to output is shown in Figure 7. TA = −40 °C to +125 °C, VCC = 5 V ± 0.25 V . Table 7. Receiver Timing Characteristics (See Figure 5 and Figure 6.) test circuit connected to output is shown in Figure 8. TA = −40 °C to +125 °C, VCC = 5 V ± 0.25 V .

  1. CL = 5 pF . Capacitor is connected from each output to ground.
  2. tP1 and tP2 are measured from the 1.5 V point of the input to the crossover point of the outputs (see Figure 3).

handling and testing. Follow guidelines such as JEDEC Publication No. 108-A (Dec. 1988). When handling and mounting line driver products, proper precautions should be taken to avoid exposure to ESD.

  1. Assume that all electronic components are sensitive to ESD damage.
  2. Never touch a sensitive component unless properly grounded.
  3. Never transport, store, or handle sensitive components except in a static-safe environment.
  4. A human body model (HBM) that is used by most of the industry for ESD-susceptibility testing and protection-

design evaluation. ESD voltage thresholds are dependent on the critical parameters used to define the model.

  1. A charged-device model (CDM), which many believe is the better simulator of electronics manufacturing expo-

The HBM ESD threshold voltage presented here was obtained by using these circuit parameters. Table 8. Typical ESD Thresholds for Data Transmission Transceivers Table 9. ESD Damage Protection

that level after the stress is removed. CMOS Latch Up Standardized Test Procedure.

  1. dc current stressing of input and output pins.
  2. Power supply overvoltage.

Table 10. Latch Up Test Criteria and Test Results

14 Agere Systems Inc. Data Sheet March 2001With Idle Bus Indicator Dual Differential Transceiver BTF1A Outline Diagrams 16-Pin SOIC (SONB/SOG) Dimensions are in millimeters. 5-4414(F) Note: The dimensions in this oultine diagram are intended for informational purposes only. For detailed schematics to assist your design efforts, please contact your Lucent Technologies sales representative. Package (N) Package Dimensions Maximum Length (L) Maximum Width Without Leads (B) Maximum Width Including Leads (W) Maximum Height Above Board (H) Small-Outline, Gull-Wing (SOG) 16 10.49 7.62 10.64 2.67 W

0.610.51 MAX

H

0.28 MAX

0.10 SEATING PLANE

1.27 TYP

N L B PIN #1 IDENTIFIER ZONE

March 2001With Idle Bus Indicator Dual Differential Transceiver BTF1A Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. Copyright © 2001 Agere Systems Inc. All Rights Reserved Printed in U.S.A. March 2001 DS01-068ANET -1 (Replaces DS01-068ANET) For additional information, contact your Agere Systems Account Manager or the following: INTERNET: http://www.agere.com E-MAIL: docmaster@micro.lucent.com N. AMERICA: Agere Systems Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, P A 18109-3286 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA P ACIFIC: Agere Systems Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 778 8833, FAX (65) 777 7495 CHINA: Agere Systems (Shanghai) Co., Ltd., 33/F Jin Mao Tower, 88 Century Boulevard Pudong, Shanghai 200121 PRC Tel. (86) 21 50471212, FAX (86) 21 50472266 JAP AN: Agere Systems Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700 EUROPE: Data Requests: DA T ALINE: Tel. (44) 7000 582 368, FAX (44) 1189 328 148 T echnical Inquiries:GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Ascot), FRANCE: (33) 1 40 83 68 00 (Paris), SWEDEN: (46) 8 594 607 00 (Stockholm), FINLAND: (358) 9 3507670 (Helsinki), IT AL Y: (39) 02 6608131 (Milan), SP AIN: (34) 1 807 1441 (Madrid)

Ordering Information

  1. Indicates on-chip output terminating resistors from each driver output to ground. Receiver Terminating2 2. Indicates on-chip input terminations across receiver inputs. Package Type Comcode BTF1A16G None None 16-pin, Plastic SOIC 108648861 BTF1A16G-TR None None T ape and Reel SOIC 108698887