BSP250

BSP250 NEXPERIA | Alldatasheet

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Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. use http://www.nexperia.com salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e -mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia

Product specification Supersedes data of November 1994 File under Discrete Semiconductors, SC13b

1997 Jun 20

P-channel enhancement mode vertical D-MOS transistor

1997 Jun 20 2

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250

FEATURES

• High-speed switching
• No secondary breakdown
• Very low on-resistance.

APPLICATIONS

• Low-loss motor and actuator drivers
• Power switching.

DESCRIPTION

P-channel enhancement mode vertical D-MOS transistor in a SOT223 plastic SMD package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. PINNING - SOT223 PIN SYMBOL DESCRIPTION 1 g gate 2 d drain 3 s source 4 d drain Fig.1 Simplified outline and symbol. handbook, halfpage MAM121 123 Top view s d g QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage (DC) −− 30 V VSD source-drain diode forward voltage IS = −1.25 A −− 1.6 V VGSO gate-source voltage (DC) open drain −± 20 V VGSth gate-source threshold voltage I D = −1 mA; VDS =V GS −1 −2.8 V ID drain current (DC) −− 3A R DSon drain-source on-state resistance I D = −1 A; VGS = −10 V − 0.25 Ω Ptot total power dissipation T s = 100°C − 5W

1997 Jun 20 3

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Notes 1. Pulse width and duty cycle limited by maximum junction temperature. 2. Device mounted on an epoxy printed-circuit board, 40× 40 × 1.5 mm; mounting pad for drain lead minimum 6 cm SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage (DC) −− 30 V VGSO gate-source voltage (DC) open drain −± 20 V ID drain current (DC) T s ≤ 100 °C −− 3A IDM peak drain current note 1 −− 12 A Ptot total power dissipation T s = 100°C − 5W Tamb =2 5°C; note 2 − 1.65 W Tstg storage temperature −65 +150 °C Tj operating junction temperature − 150 °C Source-drain diode IS source current (DC) T s ≤ 100 °C −− 1.5 A ISM peak pulsed source current note 1 −− 6A Fig.2 Power derating curve. handbook, halfpage 0 200 2.0 0.4 0.8 1.2 1.6 MLB885 Tamb (°C) 50 100 150 Ptot (W) δ = 0.01. Soldering point temperature Ts = 100°C. (1) RDSon limitation. Fig.3 SOAR. handbook, halfpage MLB835 VDS (V) ID (A) −10−2 −102 −10−1 −10 tp tp T P t Tδ = 1 ms DC (1) tp = 10 µs

1997 Jun 20 4

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 THERMAL CHARACTERISTICS Note 1. Device mounted on an epoxy printed-circuit board, 40× 40 × 1.5 mm; mounting pad for drain lead minimum 6 cm2. CHARACTERISTICS Tj=2 5°C unless otherwise specified. SYMBOL PARAMETER CONDITIONS VALUE UNIT R th j-a thermal resistance from junction to ambient note 1 75 K/W R th j-s thermal resistance from junction to soldering point 10 K/W SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS drain-source breakdown voltage VGS = 0; ID = −10 µA −30 −− V VGSth gate-source threshold voltage VGS =V DS ; ID = −1m A −1 −− 2.8 V IDSS drain-source leakage current V GS = 0; VDS = −24 V −−− 100 nA IGSS gate leakage current V GS = ±20 V; VDS =0 −−± 100 nA IDon on-state drain current V GS = −10 V; VDS = −1V −3 −− A VGS = −4.5 V; VDS = −5V −1 −− A R DSon drain-source on-state resistance VGS = −4.5 V; ID = −0.5 A − 0.33 0.4 Ω VGS = −10 V; ID = −1A − 0.22 0.25 Ω yfs forward transfer admittance V DS = −20 V; ID = −1A 1 2 − S C iss input capacitance V GS = 0; VDS = −20 V; f = 1 MHz− 250 − pF C oss output capacitance V GS = 0; VDS = −20 V; f = 1 MHz− 140 − pF C rss reverse transfer capacitance V GS = 0; VDS = −20 V; f = 1 MHz− 50 − pF Q G total gate charge V GS = −10 V; VDS = −15 V; ID = −2.3 A − 10 25 nC Q GS gate-source charge V GS = −10 V; VDS = −15 V; ID = −2.3 A − 1 − nC Q GD gate-drain charge V GS = −10 V; VDS = −15 V; ID = −2.3 A − 3 − nC Switching times ton turn-on time V GS =0t o−10 V; VDD = −20 V; ID = −1 A; RL =2 0Ω − 20 80 ns toff turn-off time V GS = −10 to 0 V; VDD = −20 V; ID = −1 A; RL =2 0Ω − 50 140 ns Source-drain diode VSD source-drain diode forward voltage VGD = 0; IS = −1.25 A −−− 1.6 V trr reverse recovery time I S = −1.25 A; di/dt = 100 A/µs − 150 200 ns

1997 Jun 20 5

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 Fig.4 Capacitance as a function of drain source voltage; typical values. VGS =0 . Tj=2 5°C. handbook, halfpage 600 400 200 −10 −20 −30 MBE144 C (pF) VDS (V) C iss C oss C rss Fig.5 Output characteristics; typical values. Tj=2 5°C. handbook, halfpage 0 −2 −10 −12 −10 −12 MBE149 −4 −6 −8 V (V)DS ID (A) VGS = −10 V −6 V −5 V −4.5 V −4 V −3.5 V −3 V −2.5 V −7.5 V Fig.6 Transfer characteristic, typical values. VDS = −10 V. Tj=2 5°C. handbook, halfpage 0 −2 −4 −8 −16 −12 MBE150 ID (A) VGS (V) Fig.7 Gate-source voltage as a function of total gate charge. VDD = −15 V. ID = −3A . handbook, halfpage 0 −2 −4 −10−8 −10 MBE145 Q g (nC) VGS (V)

1997 Jun 20 6

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 Fig.8 Source current as a function of source-drain diode forward voltage. VGD =0 . (1) Tj= 150°C. (2) Tj=2 5°C. (3) Tj= −55 °C. handbook, halfpage MBE148 IS (A) VSD (V) (1) (2) (3) Fig.9 Drain-source on-state resistance as a function of gate-source voltage; typical values. −VDS ≥− ID × R DSon ; Tj=2 5°C. (1) ID = −0.1 A. (2) ID = −0.5 A. (3) ID = −1A . (4) ID = −3A . (5) ID = −6A . handbook, halfpage −100 (1) (4) (5) VGS (V) R DSon (mΩ ) −2 −4 −6 −8 104 103 102 MDA218 (2)(3) Fig.10 Temperature coefficient of gate-source threshold voltage. handbook, halfpage 0.6 0.7 0.8 0.9 1.0 1.2 1.1 0 50 100 150−50 k Tj (°C) MBE138 Typical VGSth at ID = −1 mA; VDS =VGS =V GSth. k V GSth at Tj Fig.11 Temperature coefficient of drain-source on-resistance. Typical RDSon at: (1) ID = −1 A; VGS = −10 V. k R DSon at Tj handbook, halfpage 0.6 0.8 1.0 1.2 1.4 1.8 1.6 0 50 100 150−50 k Tj (°C) MBE146 (1) (2)

1997 Jun 20 7

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 Fig.12 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values. handbook, full pagewidth tp (s) 1 MBE147 R th j-s (K/W) 10−1 tp tp T P t Tδ = δ = 0.75 0.5 0.1 0.05 0.33 0.01 0.02 0.2

1997 Jun 20 8

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 PACKAGE OUTLINE UNIT A 1 bp cD E e1 H E Lp Qy wv REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ mm 0.10 0.01 1.8 1.5 0.80 0.60 3.1 2.9 0.32 0.22 6.7 6.3 3.7 3.3 2.3 e 4.6 7.3 6.7 1.1 0.7 0.95 0.85 0.1 0.10.2 DIMENSIONS (mm are the original dimensions) SOT223 96-11-11 97-02-28 w Mbp D e A Lp Q detail X H E E v M A AB B c y 0 2 4 mm scale A X 13 2 Plastic surface mounted package; collector pad for good heat transfer; 4 leads SOT223

1997 Jun 20 9

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 DEFINITIONS LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

1997 Jun 20 10

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 NOTES

1997 Jun 20 11

Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP250 NOTES

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