BSH205 NEXPERIA | Alldatasheet
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Philips Semiconductors Product specification P-channel enhancement mode BSH205 MOS transistor FEATURES SYMBOL QUICK REFERENCE DATA
- Very low threshold voltage VDS = -12 V
- Fast switching
- Logic level compatible ID = -0.75 A
- Subminiature surface mount package R DS(ON) ≤ 0.5 Ω (VGS = -2.5 V) VGS(TO) ≥ 0.4 V GENERAL DESCRIPTION PINNING SOT23 P-channel, enhancement mode, PIN DESCRIPTION logic level, field-effect power transistor. This device has low 1 gate threshold voltage and extremely fast switching making it ideal for 2 source battery powered applications and high speed digital interfacing. 3 drain The BSH205 is supplied in the SOT23 subminiature surface mounting package. LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS Drain-source voltage - -12 V VDGR Drain-gate voltage R GS = 20 kΩ - -12 V VGS Gate-source voltage - ± 8V ID Drain current (DC) T a = 25 ˚C - -0.75 A Ta = 100 ˚C - -0.47 A IDM Drain current (pulse peak value) Ta = 25 ˚C - -3 A Ptot Total power dissipation T a = 25 ˚C - 0.417 W Ta = 100 ˚C - 0.17 W Tstg, Tj Storage & operating temperature - 55 150 ˚C THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT R th j-a Thermal resistance junction to FR4 board, minimum 300 - K/W ambient footprint d g s 1 2 Top view August 1998 1 Rev 1.000
Philips Semiconductors Product specification P-channel enhancement mode BSH205 MOS transistor
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS Drain-source breakdown V GS = 0 V; ID = -10 µA -12 - - V voltage VGS(TO) Gate threshold voltage V DS = VGS ; ID = -1 mA -0.4 -0.68 - V R DS(ON) Drain-source on-state V GS = -4.5 V; ID = -430 mA - 0.18 0.4 Ω resistance V GS = -2.5 V; ID = -430 mA - 0.32 0.5 Ω VGS = -1.8 V; ID = -210 mA - 0.42 0.6 Ω VGS = -2.5 V; ID = -430 mA; Tj = 150˚C - 0.48 0.75 Ω gfs Forward transconductance VDS = -9.6 V; ID = -430 mA 0.5 1.6 - S IGSS Gate source leakage current VGS = ±8 V; VDS = 0 V - ±10 ±100 nA IDSS Zero gate voltage drain V DS = -9.6 V; VGS = 0 V; - -50 -100 nA current T j = 150˚C - -11 -100 µA Q g(tot) Total gate charge I D = -0.5 A; VDD = -10 V; VGS = -4.5 V - 3.8 - nC Q gs Gate-source charge - 0.4 - nC Q gd Gate-drain (Miller) charge - 1.0 - nC td on Turn-on delay time V DD = -10 V; ID = -0.5 A; - 2 - ns tr Turn-on rise time V GS = -8 V; RG = 6 Ω - 4.5 - ns td off Turn-off delay time Resistive load - 45 - ns tf Turn-off fall time - 20 - ns C iss Input capacitance V GS = 0 V; VDS = -9.6 V; f = 1 MHz - 200 - pF C oss Output capacitance - 95 - pF C rss Feedback capacitance - 41 - pF REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT IDR Continuous reverse drain T a = 25 ˚C - - -0.75 A current IDRM Pulsed reverse drain current - - -3 A VSD Diode forward voltage I F = -0.38 A; VGS = 0 V - -0.72 -1.3 V trr Reverse recovery time I F = -0.5 A; -dIF/dt = 100 A/µs; - 75 - ns Q rr Reverse recovery charge V GS = 0 V; VR = -9.6 V - 69 - nC August 1998 2 Rev 1.000
Philips Semiconductors Product specification P-channel enhancement mode BSH205 MOS transistor Fig.1. Normalised power dissipation. PD% = 100⋅PD /PD 25 ˚C = f(Ta) Fig.2. Normalised continuous drain current. ID% = 100⋅ID /ID 25 ˚C = f(Ta); conditions: VGS ≤ -10 V Fig.3. Safe operating area. Ta = 25 ˚C ID & IDM = f(VDS ); IDM single pulse; parameter tp Fig.4. Transient thermal impedance. Zth j-a = f(t); parameter D = tp/T Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS ); parameter VGS Fig.6. Typical on-state resistance, Tj = 25 ˚C. R DS(ON) = f(ID ); parameter VGS Normalised Power Dissipation, PD (%) 100 120 0 25 50 75 100 125 150 Ambient Temperature, Ta (C) BSH105 0.1 100 1000 1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 Pulse width, tp (s) Peak Pulsed Drain Current, IDM (A) single pulse D = 0.5 0.2 0.1 0.05 0.02 tp D = tp/TDP T Normalised Drain Current, ID (%) 100 120 0 25 50 75 100 125 150 Ambient Temperature, Ta (C) BSH205 -1.4 -1.2 -0.8 -0.6 -0.4 -0.2 -2-1.5-1-0.50 Drain-Source Voltage, VDS (V) Drain current, ID (A) -0.9 V -1.1 V 4.5 V -1.8 V -1 V Tj = 25 C -1.2 V -1.3 V VGS = -1.4 V -2.5 V BSH205 0.01 0.1 100 0.1 1 10 100 Drain-Source Voltage, VDS (V) Peak Pulsed Drain Current, IDM (A) d.c. 100 ms 10 ms RDS(on) = VDS/ ID tp = 100 us 1 ms BSH205 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 2.2 2.4 2.6 2.8 Drain Current, ID (A) Drain-Source On Resistance, RDS(on) (Ohms) VGS = -4.5V -1.2 V-1V Tj = 25 C -1.4 V -1.1 V -0.9 V -2.5 V -1.3 V -1.8 V August 1998 3 Rev 1.000
Philips Semiconductors Product specification P-channel enhancement mode BSH205 MOS transistor Fig.7. Typical transfer characteristics. ID = f(VGS ) Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID ) Fig.9. Normalised drain-source on-state resistance. R DS(ON) /RDS(ON)25 ˚C = f(Tj) Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS ); conditions: VGS = 0 V; f = 1 MHz BSH205 -2.5 -1.5 -0.5 Gate-Source Voltage, VGS (V) VDS > ID X RDS(on) Tj = 25 C 150 C Drain Current, ID (A) Threshold Voltage, VGS(to), (V) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 25 50 75 100 125 150 Junction Temperature, Tj (C) minimum typical BSH205 0.5 1.5 2.5 3.5 Drain Current, ID (A) Transconductance, gfs (S) Tj = 25 C 150 C VDS > ID X RDS(on) BSH205 1E-07 1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 Gate-Source Voltage, VGS (V) Drain Current, ID (A) VDS = -5 V Tj = 25 C Normalised Drain-Source On Resistance 0.5 0.6 0.7 0.8 0.9 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 0 25 50 75 100 125 150 Junction Temperature, Tj (C) VGS = -4.5 V -1.8 V RDS(ON) @ Tj RDS(ON) @ 25C -2.5 V BSH205 100 1000 Drain-Source Voltage, VDS (V) Capacitances, Ciss, Coss, Crss (pF) Ciss Coss Crss August 1998 4 Rev 1.000
Philips Semiconductors Product specification P-channel enhancement mode BSH205 MOS transistor Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG ) Fig.14. Typical reverse diode current. IF = f(VSDS ); conditions: VGS = 0 V; parameter Tj BSH205 012345 Gate charge, (nC) Gate-source voltage, VGS (V) VDD = 10 V RD = 20 Ohms Tj = 25 C BSH205 0.5 1.5 2.5 3.5 4.5 Drain-Source Voltage, VSDS (V) Source-Drain Diode Current, IF (A) Tj = 25 C150 C August 1998 5 Rev 1.000
Philips Semiconductors Product specification P-channel enhancement mode BSH205 MOS transistor MECHANICAL DATA Fig.15. SOT23 surface mounting package. Notes 1. This product is supplied in anti-static packaging. The gate-source input must be protected against static discharge during transport or handling. 2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18. 3. Epoxy meets UL94 V0 at 1/8". UNIT A 1 max. bp cD E e1 H E Lp Qw v REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE 97-02-28 IEC JEDEC EIAJ mm 0.1 0.48 0.38 0.15 0.09 3.0 2.8 1.4 1.2 0.95 e 1.9 2.5 2.1 0.55 0.45 0.10.2 DIMENSIONS (mm are the original dimensions) 0.45 0.15 SOT23 bp D e A Lp Q detail X H E E w M v M A B AB 0 1 2 mm scale A 1.1 0.9 c X Plastic surface mounted package; 3 leads SOT23 August 1998 6 Rev 1.000
Philips Semiconductors Product specification P-channel enhancement mode BSH205 MOS transistor DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. August 1998 7 Rev 1.000