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Silicon Monolithic IC BD6171KV 1131 Configuration Silicon Monolithic Integrated Circuit Product Name TFT Liquid Crystal Power Management IC for Car Navigation System Model Name BD6171KV Outline Drawing Figure - 1 (Molded Plastic) Block Diagram Figure - 2 Functions 1. 2. ch PWM controller with variable stepdown converter. 2. Variable output voltage series regulator. 3. Variable output voltage positive / negative charge pump inverter. 4. Oscillator is enabled by an external pulse synchronization. 5. Overcurrent protection (OCP) circuitry. 6. Undervoltage Lockout protection (UVLO). 7. Thermal Shutdown Protection (TSD). 8. Each channel can be individually turned ON/OFF. 9. VQUFP48 package O Absolute Maximum Ratings (Ta=25°C) otage between VCC, DVCC-GND [Voy Doc 6 Cd “oltage between PVCC1,2-GND_ [Pvt |_Votage between VCCPVOCT 2 VooPVect2 TSC” |_Votage between VREFGND REF TTC Sd | Voltage between VREGAGND TT VREGA TS TCd | Voltage between PVCC3GND Pas SCSdESCC“‘SCC*d Voltage between PVCC4,5—GND Vooss v Voltage between OUT4.5—GND Pveod 5 v Voltage between CL1,2—GND VCL1,2 PVoct,2 Vv Voltage between VS1,2—GND WS1,2 PVoct,2 Vv tage between VODETI 23 45GND | vooeri2a45 [Rega |v Voltage between SYNC—GND VSYNC 7 v | PowerDissipation Cd Ambient Storage Temperature Range ("1) When mounted on a 70 x 70 x 1.6 mm? glass epoxy substrate, for every temperature increase of 1°C, power dissipation decreases by 9 mW (at temperatures of 25°C or greater). Application example The application circuit is recommended for use. Make sure to confirm the adequacy of the characteristics. ‘When using the circuit with changes to the external circuit constants, make sure to leave an adequate margin for external components including static and transitional characteristics as well as dispersion of the IC. Note that ROHM cannot provide adequate confirmation of patents. ‘The product described in this specification is designed to be used with ordinary electronic equipment or devices (such as audio-visual equipment, office-automation equipment, communications devices, electrical appliances, and electronic toys). Should you intend to use this product with equipment or devices which require an extremely high level of reliability and the malfunction of which would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. ROHM assumes no responsibility for use of any circuits described herein, conveys no license under any patent or other right, and makes no representations that the circuits are free from patent infringement. DESIGN CHECK APPROVAL 2/13/04 1$Z02201-BD6171KV-1-2 i DATE: SPECIFICATION No. : Gh ip B UMA C REV. ROHM CO.,LTD. 7$Z22111-03

Silicon Monolithic IC BD6171KV 2/31 O Recommended Operating Conditions Standard Value ee ge bot it - | svectcatens | sym aaa a] Ue | Contin | Supply Voltage |veopvec | 60 [| = | 20 [vif | PWM Controller Input} PVcc1,2 24.0 Vv Voltage Series REG Input PVcc3. 5.0 24.0 Vv Voltage Charge Pump Input] PVcc4,5 3.0 12.0 Vv Voltage Oscilator Frequency | _Fose_| 60 | — | 600 | we | Sid External FSYNC kHz Synchronization Frequency Oscillator Timing RT 30 680 kQ Resistor Value Overcurrent Protection | Cocp1,2 pF Cancellation Timing Capacitor Value O Electrical Properties (Ta=25°C, Vec,DVcc,PVcc1,2,3=13.2V, PVcc4,5=8V, Fosc=500kHz, EN1~5=5V) unless otherwise specified.) - Standard Value . . Measure- ificat it i ee ee ed oe {Entire Device) Operating Current pe | [5 | fmm reine ft | (Reference Voltages] A Vec=7~18V, tine Regulation heidiaal P| - |e fowler fs [Internal Regulator) VREGA Output Vreca| 45 | 50 | 55 | v Voltage VREGB Output When switching between 1000 pF connection ROHM CO.,LTD. SPECIFICATION No; TSZ02201-BD6171KV-1-2 7SZ22111-05

Silicon Monolithic IC BD6171KV 3/31 Voltage between 1 VREGB-GND es ofa) -| || Bom” Voltage VREGB Vec=5.6V,PVcc1,2-OUT1, 2with a 1000 pF connection [Tivesnoldvotase [ VEN [42 [48 [2a] v] | 1 fintow cures eN | - | 17 | a5 [wa lemme [+ | © The design of this device does not incorporate measures used to harden against radiation. 1SZ22111-05

Silicon Monolithic IC BD6171KV 4/31 O Electrical Properties (Ta=25°C, Vec,DVcc,PVcc1,2,3=13.2V, PVcc4,5=8V, Fosc=500kHz, EN1~5=5V unless otherwise specified.) Standard Value Measure- Specification Symbol [me | ss || Unit Conditions ment Standard Circuit Series REG Unit (Output) (Measured at a 5V output setting, unless otherwise specified.) Feedback Voltage | _VF83 103=-80mA Line Reguation | vu | — | 20 | 40 | mv | Voo=10~16v, K3=80nA Output Current) 163 | t00 ma | vO03=4.75v 2 Ability Ripple Rejection | RRB | 45 | 60 | — [dB _| t=100Hz, lo3=-80mA Outputvotage | vos | = | s0 | = | v_ | to3=-8oma Current Current [Output Voltage Detection) Output Detection) ners | oss V__| FBS Voltage 2 Voltage vives | or [oz [os [wv [si] i IDET3=-1 4A Output High VDETH3 v Hu 2 Voltage Output Low) VoeTLa 04 v_ | IDET3=25 A 2 Voltage PWM Controller Unit {Oscillator] | Oscitator | Fose [270 [300 | 330 | kHz | RT=91k2 Oscillator | aFose 2 % | Vec=7~18V 3 Frequency Ratio (Frequency Synchronization] Synchronization _ SYNC Threshold SYNC Outflow = | ROHM CO, LTD. SPECIFICATION No T$Z02201-BD6171KV-1-2 7SZ22111-05

Silicon Monolithic IC | BD6171KV 5/31 Feedback Volage | vinvi2 [ oss | 100 | ia] vl +i Input Bias Current NV12 | -1 | — | — | mA [VINV1,2=097v i 3 Maximum Output) vepino| 28 V__ | VINV1,2=0.5V Voltage Minimum Output - 3 i 3 Output Sink | IFBSINK | 5 | 500 | -o5 | ma | vret2=1.5v Current 1,2 Output Source | IFBSOUR 400 460 uA | VFB12=1.5V Current CE1,2 Son Start isst2 | 40 | -25 | -10 | wa |vssi,2=1.0V 3 Charging Current Soft Start 1.0 Vv IV1,2=1. Threshold Voltage wSst2 P- [we] - fy VINYE2=1L OWSS Vollage Soft Start Standby | VSSSTD 10 400 mv_ | $$ Voltage Voltage 1,2 © The design of this device does not incorporate measures used to harden against radiation. ROHM CO, LTD. SPECIFICATION No 1SZ02201-BD6171KV-1-2 7SZ22111-05

Silicon Monolithic IC BD6171KV 6/31 © Electrical Properties (Ta=25°C, Vcc,DVcc,PVcct,2,3=13.2V, PVcc4,5=8V, Fosc=500kHz, EN1~5=5V unless otherwise specified.) joan [aoe lel | = Specification Symbol | Unit Conditions ment | CFET Driver) | Output Source Current fesourcera [ — [100 | = [ma [PVect,2-0uTi,2=0.4v | 3 _| | Output Sink Current | wosivas.2 | = [100 | — | ma |outi2vrece-iav [3 | | PchON Resistance | ronpxz | — [30 | 60 | @ |iouT12=-100ma | 3 | NchON Resistance | Ronniz | — [130 [200 | @ |iouri2=100ma_ |_| When switching between PVcc1,2-OUT1,2 with a Rise Time TH 2 20 nsec | 1000 pF connection 3 Design Assurance When switching between PVcc1,2-OUT1,2 with a Fall Time TAH,2 20 nsec | 1000 pF connection 3 Assurance vec vec vec fermion | wae S/S [Ea] ¥ [rons | * | | VS inflow Current | vena [= [| 1 [ wa [vst2=pveci2 | 4 | |cLinfiow Curent | _ici2 [ 9 | 1 | om [wa [veinzt32v | 4 | | Charging Curent | ocrcta | 40 | 26 | 10 [wa [vocpci2-10v [4 | [Threshold Vottage | vocrciz| 19] 20 [a1 |v] sd a vocpcsT ewarwen [er] -t=fely| || | Threshold Voltage | vowo | sé [57 [88 [ Vv [Vecsweepdown | 4 _| . VHYSUVL 4 pomewwen [e"fow fe feefy] | fae | vena | ome | oe | ome |v [oeravence |? | Voltage | Hysteresis Voltage | vivsi2 | o1 | o2 | os |v [3 | omsmaven foms (ee = | - |v | [Output Low Voltage | voenni2[ — | [oa | ov [ipetn225va | 3 | © The design of this device does not incorporate measures used to harden against radiation. 1$Z22111-05

Silicon Monolithic IC BD6171KV 7/31 O Electrical Properties (Ta=25°C, Vcc,DVcc,PVcc1,2,3=1 3.2V, PVcc4,5=8V, Fosc=500kHz, EN1~5=5V unless otherwise specified.) Specification Symbol [me [stat | noe | Unit Conditions ment Standard Cireuit Charge Pump Unit [foutpty Output Source losouRCE4.5| “40 mA OUT4,5=PVCC4,5-150m 5 Current Vv Output Sink Current_[ wesinnas | 10 [=| =| ma | our4.5=150mv Feedback Voltage 5 FB4 . 1.03 (Positive Voltage) | vee [os [sofsofv[ fF | Input Bias Current 5 IFB4 -1 A | FB4=0.97V (Positive Voltage) eee ee ee ee Feedback Voltage VFBS .03 0.03 Vv (Negative Voltage) wes |om|oofoofv{ | F | Input Bias Current IF 4 A | FB5=-0.03V (Output Voltage Detection] [| Output Detection 5 -] | Voltage VDET4 0.55 0.65 Vv FB4 (Positive Voltage) Hysteresis Voltage VHYs4 014 02 03 v 5 (Positive Voltage) Output Detection 5 Voltage VDETS 0.65 Vv FBS (Negative Voltage) Hysteresis Voltage | ives | 94 o2 | o3 | v 5 (Negative Voltage) vi A- IDET4,5=-1 “A 5 Output Low voltage | vores | — | — | o4 |v _ [ipeT45=25ua | 5 | © The design of this device does not incorporate measures used to harden against radiation. ROHM CO.,LTD. SPECIFICATION No 1$Z02201-BD6171KV-1-2 TSZ22111-05

Silicon Monolithic IC BD6171KV 8/31 9.040.2 36 2s ooqagqggggg0000 | | ARRRRARRAAAA fa 32 od por 2¢ a | = = ~ =] BD6 171K V [Es = s ao = 4 ~ d a ES 4 =e : lon 7 ES EB 33 ad oo =") +1 9 HOVE ERG GHH g | Ss | a /. 2

4 PIN@-27

Lot No. x fa ats: 2] | arr “ ‘; Ml w H ~ se slo 0.5#0.1 3] 4 S]6 0.2225 %94 (UNIT: mm) Figure - 1 Outline Drawing ROHM CO, LTD. SPECIFICATION No. : -- TSZ02201-BD6171KV-1-2 78222111 -05

Silicon Monolithic IC BD6171KV @ 13.2¥ EMO O vec One EN3 PVCC3 y v O wor 8 pa ane: EN3 C) ) sob C) ENA C) € VO3DE OnneF [> ¢ voc BN SOFT C) es Cys! 70.6 E [nel me EEC > U pm FET orive} oH gfe T_T] VREBA L\\ a“ a Par > oy o> <tapa? q id Mrz ’ eo SOFT ? P| |”) 13.2 EN2 C) Teast Te CTT inet [Te a om = fy yo" e VREGA vozoeT |_| 2 LN Pane | osc tsp | OUT} uveo |_ OUT I © DELAY} Oscillator w av os ENS —N4 wey VY ae Internal SVREG dveo 7 Fs > O > VREGA > E> VREGA VY are |e O > VREF W > Foe ay 7 7 Pend] PGNDS > 0. 6v o- W ee osper | Sato Da a | vreoA \\voaDeT O Lb O-O-O-0-O O VREF pa Figure - 2 Block Diagram ROHM CO.,LTD. SPECIFICATION No. : 1$702901-BD6171KV-1-2 T$Z22111-05

Silicon Monolithic IC BD6171KV 10/31 © Heat Dissipation Graph (WW) 1.25 (1) When IC alone is used: & 1.00 (2) When mounted on a 70x 70x 1. 6 mn? glass epoxy

3 Log) | substrate

By »~ é 0.75 | (Pd) > is Yt

0.25 I N

Ambient Temperature (Ta] Cc) ROHM CO, LTD. SPECIFICATION No. : — 1$799201-BD6171KV-1-2 TSZ22111-05

Silicon Monolithic IC BD6171KV 11/31 Ey ct] 26 Lm =a j = fa Lae ros] 21 rs we} | a [Hs Sv = (we) © ka | ee tax <a | 16 | [er [a] | as ar) Car O — ree] ‘ " Th BATT a ar Figure-3 Pin Plot Diagram (Example of Recommended Circuit) ROHM CO.,LTD. SPECIFICATION No: 1$702201-BD6171KV-1-2 18Z22111-05

Silicon Monolithic IC BD6171KV 12/31 veo Vena| VEN4| VENS| Toews wal sc ua oy OOOO® [an] | ‘out r fuze tt AABN ARTE © Ra Voom 36 a 26 Toa Ik ca = «| a —— Cais VREF s—~e | a P Vw = 21 | [mee (V) wt & ae iP Ee | O.1uF Co [ Fz V) | Ee | ue a1kQ | = | Wek | to a | mis 100k Q Lt ee d ® 6 " vec : EE H $ Y] vec 1000pF 1000pF 0.1 0.1 Figure - 4 Measurement Circuit Diagram - 4 18Z22111-05

Silicon Monolithic IC BD6171KV 13/31 Las J “@) [sx] ve & ? 124 (¥) [ Vuze 7 Y) HNGTUNGION GER z [sv2] 9 O—GD [#1] Vacs

36 Hn 26 oO © ®)

Ca] Er | KQ ¥ vec pa i a] 2 | Fae] -—s Lome] uF iw | — ot uF Ks (v) i a oo na] @)+-© — — Cm =) | fst) ae on 6 | Fawr] © 1000 uF Ca] | as ha ~10dbv cc O iam VooH2 Crea] ‘ " fe 7 7] fy fi t j i al Figure - 5 Measurement Circuit Diagram - 2 1SZ22111-05

Silicon Monolithic IC BD6171KV 14131 al 1027 | Vuz7, Vues] 1026, 8 ® O8 tz 2) tom? = Vi7 lore 36 ci 6 Yne res] [as a) Ca [res] SHipe [or] O1uF | 21 | [ner Veo tus [sz] lb be) | Bhs SHHO)—9 <= Fa 7) @) a os y; Cao] | o oko Ca] | +s fa ons Com O [oa] Vis Cree] ‘ " i me, . - O—O—* St) TR | aes tf fal |i 1.2577 > YL 375kHz T [sts] Our J: 1 nae @—|!0000F [$e ra Figure -6 Measurement Circuit Diagram - 3 ROHM CO.,LTD. SPECIFICATION No. 1$792201-BD6171KV-1-2 T8Z22111-05

Silicon Monolithic IC BD6171KV 15/31 al SARARA ARAN .

6 ED 26 -—+

Cres] << Cours [ pvocs J — O1uE veo Coe] | «1 ° te | a fe lo | Ve 51kQ Croc] 16 | Ga -—* < @ [ere Cree] ‘ MN [er a 0.1 woo] | [| 0.1 ve(¥) 20k 2 “y PFT] “Trooor} 'e) fe) Ts | O[ser | re) 'e) i V2 I" y J 2 I Via I va vo) re © Figure -7 Measurement Circuit Diagram - 4 ROHM CO.,LTD. SPECIFICATION No. : 1§702201-BD6171KV-1-2 1822211105

Silicon Monolithic IC. BD6171KV 16/31 a f wes Yioos aS ORS) Vens Vues loze Ven 4 8 H oe MGNGAGTORGIC UGH tose 36 EN 6 = [as [sva] [rvcrs

39 Joxso = 21 | (mer)

[ore] | 41 t= 3 — ot] — = Veet} el | = 6] Fa wee = O — Tow 6 W UEREEEA ET H Voein Figure - 8 Measurement Circuit Diagram - 5 ROHM CO.,LTD. SPECIFICATION No. : 1$Z02201-BD6171KV-1-2 1SZ22111-05

Silicon Monolithic IC BD6171KV 17/31 O Terminal Internal Equivalence Circuits * OUTC2(2pin), OUTC1(14pin) + VREGA(3pin) VREF vee vec SUBGND SUBGND GND GND + VS2(4pin), VS1(13pin) * CL2(5pin), CL1(12pin) vec vec ve vec 1kQ 1kQ 1kQ —VREF ‘SUBGND ‘SUBGND GND @ND GND + PVCC2(6pin), PVCC1(11pin) + OUTH2(7pin), OUTH1(10pin) vec vec vec 300k Q 10Q VREGB SUBGND SUBGND ROHM CO, LTD. SPECIFICATION No. TSZ02201-BD6171KV-1-2 7SZ22111-05

Silicon Monolithic IC | BD6171KV 18/31 * DGND(8pin) + VREGB(pin) vec bvec | | 400k Q ‘SUBGND GND uBGND iD af GND + FBI(15pin), FB2(18pin) + INV4(16pin), INV2(19pin) VREF vec vec 1kQ 1k2 & 2kQ GND ‘SUBGND = ‘SUBGND GND GND + $S1(17pin), SS2(20pin) * VREF(21pin) VREF veo vec | ‘SUBGND SUBGND ND ROHM CO.,LTD. | 2ev B SPECIFICATION No 1$Z02201-BD6171KV-1-2 TSZ22111-05

Silicon Monolithic IC BD6171KV 19/31 + OUT3(22pin), PVCC3(23pin) + FB3(24pin) vec PVCC3 ours CS ol SUBGND ND ‘SUBGND exo + VoDET(25~2Spin) + SUBGND(30pin) vec VREGA 250kQ oa SUBGND sx ND + EN1~5(31~36pin) + PVCC5(37pin), PVCC4(48pin), vec OUTS5(38pin), OUT4(47pin) veo Pycc 40k Q OUT SUBGND en — Go 40k SUBGNO GND ND + FB5(39pin), FB4(46pin) + PGND5(40pin), PGND(45pin) vec 1kQ f SUBGND end SUBGND GND ROHM CO.,LTD. | rev B | SPECIFICATION No. : T$Z02201-BD6171KV-1-2 T$Z22111-05

Silicon Monolithic IC | BD6171KV 20/31 * VCC(42pin) + FIN(43pin) vec 2kQ ‘SUBGND ‘SUBGND GND + RT(44pin) VREF ra, 200k 2 1kQ 60kQ ‘SUBGND GND ROHM CO, LTD. SPECIFICATION No 1$Z02201-BD6171KV-1-2 7T$Z222111-05

Silicon Monolithic IC BD6171KV 21/31 O Explanation of Each Function (Typical values are used for all numeric values below.) 1. PWM Controller Functions (1) Reference Voltage Block This circuit generates a constant, temperature-compensated voltage from the power input supplied to the VCC terminal. The voltage is 3V. (2) Internal Regulator Block (VREGA) This circuit generates a 5V voltage from the power input supplied to the VCC terminal. Alow ESR capacitor must be connected between VREGA—GND. (3) Internal Regulator Block (VREGB) This circuit generates a voltage (Vec-5V) from the voltage supplied to the VCC terminal. This voltage serves as the voltage supply for the main FET driver unit. A low ESR capacitor must be connected between VREGB—VCC. (4) Oscillator Block This circuit generates a triangular waveform via the connection of a resistance, which is used to set the frequency, to the RT terminal. It allows for external synchronization of the oscillator via the input of a pulsed waveform to the SYNC terminal, at a frequency higher than the specified oscillator frequency, thus enabling the fine adjustment of the oscillator frequency (within 25%). (5) Error Amp Block This circuit detects the output voltage at the INV terminal, amplifies the error in relation to the output voltage setting and then outputs the resulting error voltage from the FB terminal. The comparison voltage used is 1V. An arbitrary degree of phase compensation can be specified externally by connecting a resistance and a capacitor between the INV terminal and the FB terminal. (6) PWM Comparator Unit This unit converts the voltage output from the error amp into a PWM waveform and then outputs it to the FET driver. (7) FET Driver Unit Outputs are driven by Pch FETs, with all outputs being push/pull. Each output voltage is clamped by the VREGB output voltage. ROHM CO.,LTD. SPECIFICATION No 1$Z02201-BD6171KV-1-2 7SZ22111-05

Silicon Monolithic IC BD6171KV 22/31 2. Channel Control Function Each output can be controlled individually, via terminals EN1 - ENS. As well, by connecting the DET terminal of each output to terminals EN1 - EN5, the order of activation can be controlled arbitrarily for each output. (Example) ENI my acu pT Vo1ver wy Eo Ose dc/oer > v 104K DC/DC1 x60%T EN2 1 200K Oreex be7ocz} —s, O 104K DC/DC2 x 60% ca i é 1 200k O 196K L_Res_ |— 0 REG x 60% 104K aa 2 200K Vio6K > 0 104K Charge Pump x 60% aa si " 1 200K orem Sam OLS $—O 104K Charge Pum x60% J c Es Output activates in the order of Vo1—Vo2—-Vo3—Vo04—V05. Furthermore, when the activation of each output must be delayed, a specific delay time can be set by connecting a capacitor C to an EN terminal, as shown in the diagram above. ROHM CO.,LTD. SPECIFICATION No. : —_ 1$709901-BD6171KV-1-2 18Z22111-05

Silicon Monolithic IC BD6171KV 23/31 3. Protection Functions (1) Overcurrent Protection Circuit (OCP) In the DC/DC unit, if the external Pch MOS drain voltage drops to a lower value than the specified external voltage when the output FET is ON, this circuit will cause the output to latch OFF. Subsequently, this circuit begins to charge the capacitor connected to the OCPC terminal. Once the capacitor reaches 2.0V, the latch OFF operation will cancel and the circuit will reactivate. At that time, if the unit is still in the overcurrent condition, the output will turn OFF. If the unit has returned to normal load conditions, then normal operation will resume. (2) Input Undervoltage Malfunction Prevention Circuit (UVLO) In order to prevent the IC from malfunctioning during power-up or during a power interruption, whenever the supply voltage decreases to approximately 5.7V or less, this circuit turns all of the outputs off. There is approximately 0.1V of hysteresis width between the detection voltage and the UVLO cancellation voltage, thus preventing malfunctions due to input voltage fluctuations at the threshold online. (3) Overheating Protection Circuit (TSD) This circuit detects any excess chip heat and tums all of the outputs off, in order to prevent IC damage. A hysteresis width is present between the overheat detection temperature and the cancellation temperature, thus preventing malfunctions caused by temperature fluctuations at the threshold online. 7SZ22111-05

Silicon Monolithic IC BD6171KV 24/31 4. Oscillator External Pulse Synchronization Function Permits external pulse synchronization of the oscillator through the connection of a resistance to the RT terminal and the input of a synchronizing signal to the SYNC terminal. The input must be a pulse waveform having a higher frequency than that determined by RT. However, the frequency differential must be specified to within 25%. In addition, the duty cycle of the pulse signal must be set within the range of 10% - 90%. H Hi H { 1 i ‘| t oN ot é Internal OSC ' ' DY | / sooeno" RT Only aN if / Kh / ——— : During External NS SY * NY Synchronization Figure - 9 CT Waveform During External Pulse Synchronization If the external synchronization function is not utilized, the SYNC terminal must be shorted to GND. oh Figure - 10 If External Synchronization Function is Not Utilized RT vs Oscillator 500 3) Se

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50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 RT™kQ) ROHM CO.,LTD. SPECIFICATION No: 1§702201-BD6171KV-1-2 1SZ22111-05

Silicon Monolithic IC BD6171KV 25/31 5. Setting the Overcurrent Detection Level The level of overcurrent detection for the overcurrent protection circuit (locp) is determined by the resistance connected to the ON-resistor (RON) of the external main FET and the resistance connected between CL-VCC (Rcl). _~—Rd_ is locp = RON x10° [A] (typ.) In addition, a capacitor (Ccl) must be connected in parallel to Rel, in order to prevent incorrect detection due to noise. If the overcurrent protection circuit is not utilized, the VS terminal must be short-circuited to PVCC and the CL terminal must be short-circuited to GND. (Refer to Figure 11) Rel wp t Col Pvc vs To FET Drain on vs Main Side If Overcurrent Protection Circuit is Used If Overcurrent Protection Circuit is Not Used Figure - 11 CL and VS Terminal Connections 6. Setting the Timer to Reset Overcurrent Protection The time required for the unit to reset from the overcurrent protection state (Tocprst) is determined by the size of the capacitor (Cocp) connected to the OCPC terminals. Tocprsts8x10°xCocp —_ [sec] (typ.) 7. Setting the soft start timer The soft start time is determined by the size of the capacitor (Css) connected between SS1, SS2 to GND. Vss x Css Iss The soft start is from VIN standup to Output voltage 100%. ROHM CO,, LTD. SPECIFICATION No T$Z02201-BD6171KV-1-2 7SZ22111-05

Silicon Monolithic IC BD6171KV 26/31 8. Connecting Channel Terminals If DC/DC Is Not Used If DC/DC is not utilized, connect the terminals as shown below. FB —————> Short-circuit to GND EN FB VREF INV Figure -12 Connecting Channel Terminals If DC/DC Is Not Used 9. Setting Output Voltage For OUT3 The output voltage for OUT3 can be determined by using the formula shown below. vours-—Ri+R2_ Ri OUTS Vour3 FB3 Figure-13 Setting Output Voltage For OUT3 The output voltage for OUT3 must be set to 10V or less using R1 + R2 values that are equal to or less than 3kQ. 1SZ22111-05

Silicon Monolithic IC BD6171KV 27/31 10. Setting Output Voltage For OUT1,2 The output voltage for OUT1,2 can be determined from the formula below. Vourt.2= -RI+R2_ Rt Pvccl, 2 OUT1, 2 Vour1, 2 INV1, 2 | RI Figure - 14 Setting Output Voltage For OUT1,2 11. Setting Output Voltage For OUT4,5 The output voltage for OUT4,5 can be determined from the formula below. Vours = -Ri+R2_ Vours= —Vref x —R2__ Ri Ri OUT4 OUTS Vours Vouts R2 R2 FB4 FBS RI RI Vref Figure - 15 Setting Output Voltage For OUT4,5 | ROHM CO,, LTD. SPECIFICATION No. = T'$70201-BD6171KV-1-2 TSZ22111-05

Silicon Monolithic IC BD6171KV 28/31 In addition, the charge pump must be configured in a manner such that its voltage is sufficiently greater than Vo, which is determined as shown below. + Side Pvecs Pvece Vo=(n+1) x PVocd—n x 2x VE —2x (Ronn+Ronp) x lo xn? —d Ronp VF ° FB4 1 Stage n: Number of Diode Stages (1 stage for every 2 diodes) Ronn VF Vf: Correct Diode Polarity Voltage 1 lo: Negative Current ‘\\ rc Figure-16 Setting the (+) Side Charge Pump — Side Pvccs Vo=—n x PVcc5-+n x2 x VF Pvces WT 2 +2 (Ronn+Ronp) x Io x n' VF | Ponp FBS

1 Stage n: Number of Diode Stages (1 stage

for every 2 diodes) + Ponn Vf: Correct Diode Polarity Voltage Vf lo: Negative Current \\ lo Figure-17 Setting the (—) Side Charge Pump ROHM CO.,LTD. SPECIFICATION No: -§702201-BD6171KV-1-2 1SZ22111-05

Silicon Monolithic IC BD6171KV 29/31 Precautions For Usage 1. Although these devices have been manufactured under strict quality control conditions, if any of the absolute maximum ratings are exceeded, such as for the applied voltage or operating temperature range, the devices may malfunction or be damaged. If a malfunction occurs, no assumptions can be made for any special modes of operation, such as short mode or open mode. in the event that a special mode of operation is required, in which the absolute maximum ratings may be exceeded, it is recommended that physical safety measures be implemented. 2. Information About The Operating Supply Voltage Range As long as the circuit is supplied with power within the operating supply voltage range, all circuit functions are guaranteed for operation within the ambient operating temperature range. With respect to the values for electrical properties, although particular standardized values cannot be guaranteed, abrupt fluctuations in electrical property values will not occur within these ranges. 3. Information About Grounding The configuration of each ground circuit shown in the circuit application examples must be kept as short as possible, for connection to the ground pin (GND). Furthermore, the configuration must not be susceptible to electrical interference. 4. Information About Input Power The configuration of the input power circuit shown in the circuit application examples must be kept as short as possible, for connection to the input pin VCC. Furthermore, the configuration must not be susceptible to electrical interference. 5. Information About The Bypass Capacitor Between VCC—GND It is recommended that a bypass capacitor be connected between each VCC terminal and GND, located as close to the pins as possible. 6. Information About The FB Terminal The FB terminal determines the phase margin of the DC/DC system. Connect either a capacitor or a capacitor and resistor combination between the INV terminal and the FB terminal. As each set value changes depending upon the output coil, the capacitance, the input/output voltages and the load, adjust each value to its optimum, in accordance with these conditions. 7. Information About Operation Within Electromagnetic Fields Please note that the device may not function correctly if used in the presence of strong electromagnetic fields. 8. Information About Applications When the device is used with external circuitry, ensure that sufficient spacing and margin for adjustment is available for performing external circuit settings. 9. Information About Power Dissipation (Pd) Please refer to the heat dissipation characteristics described within these specifications (8/29) and ensure that your application design does not exceed the specified maximum power ratings, for the appropriate operating temperature range. 1SZ22111-05

Silicon Monolithic IC BD6171KV 30/31 10. Information About Negative Surges Applied To The VCC Terminal In the event that the voltage at the VCC terminal may fall to a value lower than that at the GND terminal, a protection diode (D1) must be connected between the VCC and GND terminals, as shown in the figure below. vec a) ZA GND 11. Information About The Overcurrent Protection Circuit The REG3 output terminal incorporates an overcurrent protection circuit that prevents against IC malfunction in the event of an overcurrent condition. The OCPC has a “hanging J shape" and limits the flow of electrical current. The IC has been designed with sufficient margin such that it will not latch up, even in the event of a high transient current flow released from a large-value capacitor. In addition, when the output voltage is 1V or less, the output is considered to be in short mode, thus further limiting the output current. Please ensure that the output voltage is carefully verified for the design of each application. 12. Information About The Built-in Thermal Protection Circuit The device incorporates a thermal protection circuit that prevent against IC malfunction due to excess heat. If the temperature rises excessively, all outputs will enter the OFF state. Once the temperature returns to normal, the device will return to normal operation. 13. If the device is used in a mode where a reverse electrical potential is applied to the input (VCC), to GND and to individual outputs, or if a special operation is performed causing electrical current to flow into the output terminals, then the IC may malfunction. It is recommended that bypass channels and diodes be utilized to prevent reverse current flow. Under normal usage conditions no such problems will occur. 14. If the possibility exists that back electromotive force may be produced during either start-up or when outputs are OFF, and if loads containing large inductive components are present at the output terminals, then ensure that diodes are utilized for protection. (Example) — l 15. This device is a monolithic IC, thus has a P substrate and possesses P+ isolation between each element. The P-N junctions are formed from both the P layers and the N layers of each element, thus comprising a variety of parasitic elements. 7$Z22111-05

Silicon Monolithic IC BD6171KV 31/31 For example, when a resistor and transistor are connected to the terminal, as shown in Figure — 9; © The P-N junction functions as a parasitic diode when: GND > (Terminal A) for the resistor and GND > (Terminal B) for the transistor (NPN). © Also for the transistor (NPN), when GND > (Terminal B), parasitic NPN transistor function will occur within the "N" layer of other elements that are adjacent to the abovementioned parasitic diode. Due to the configuration of the IC, the effects of parasitic elements will inevitably occur, derived from the relationship between the potentials. The effects of parasitic elements interferes with circuit Operation, thus may cause malfunctions or even permanent circuit damage. Please ensure that the device is not utilized in a manner that promotes parasitic element function, such as by applying voltages of less than the GND potential (P substrate) to the input/output terminals. Resistor Transistor (NPN) B (Terminal A) (Terminal B) c R E O _ 2 O E—t> OZ ss ZA At AA AAS cr) Pe bw | Pe Pt pe, Pt N a--f- --b-- N N i N n\\\\a < N — t “ae 1 P Substrate f <—~__ Parasitic Element ' { P Substrate es «Ho Parasitic Elements (Terminal B) (Terminal A) rs cc ‘ > O-+—-W—-8 i og i <— Parasitic Element r E 4 1 { GND SND Other Adjacent Elements Power Dissipation and Heat Dissipation Characteristics Figure - 9 ROHM CO.,LTD. SPECIFICATION No 1$Z02201-BD6171KV-1-2 78Z22111-05