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BDXXFC0_V01 ROHM | Alldatasheet

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〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays TSZ02201-0G2G0A600040-1-2 © 2017 ROHM Co., Ltd. All rights reserved. 21.Mar.2025 Rev.006 TSZ22111 • 14 • 001 www.rohm.com Single-Output LDO Regulators 35V Withstand Voltage 1A LDO Regulators BDxxFC0 Series

Description The BDxxFC0 series are low-saturation regulators. The series’ output voltages are Variable, 3.0V, 3.3V, 5.0V, 6.0V, are HTSOP-J8, TO252-3, and TO252-5. This series has a built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits and a thermal shutdown circuit that protects the IC from thermal damage due to overloading.
Key Specifications 1) Output current capability: 1A 3) High output voltage accuracy (Ta=25°C): ±1% 4) Low saturation with PDMOS output 5) Built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits 6) Built-in thermal shutdown circuit for protecting the IC from thermal damage due to overloading 7) Available Ceramic Capacitor to prevent oscillation 8) HTSOP-J8, TO252-3 and TO252-5 packages
Features ・Output Voltage: 1.0V to 15.0V ・Output Voltage Precision(Ta=25°C): ±1% ・Supply Voltage(VO≧3.0V): VO+1.0V to 26.5V ・Supply Voltage(VO＜3.0V): 4.0V to 26.5V ・Output Current: 1A ・Operating Temperature Range: -25°C≦Ta≦+85°C
Packages (Typ) (Typ) (Max) HTSOP-J8 4.90mm x 6.00mm x 1.00mm TO252-3 6.50mm x 9.50mm x 2.50mm TO252-5 6.50mm x 9.50mm x 2.50mm
Ordering part number B D x x F C 0 x x x x - E 2 Part Number Output voltage 00: Variable 30: 3.0V 33: 3.3V 50: 5.0V 60: 6.0V 70: 7.0V 80: 8.0V 90: 9.0V J0: 10.0V J2: 12.0V J5: 15.0V Input Voltage F:35V Output Current C0:1.0A Enable “W”: Included Enable None: Without Enable “J”: Included Enable, Production line added Package EFJ: HTSOP-J8 FP: TO252-3/5 Packaging and forming specification E2: Emboss tape reel Datasheet

Pin Configuration/Pin Description 〈With Enable (HTSOP-J8)〉

Figure 4. Pin Configuration (With Enable)

1 Vo Output pin

3 GND GND pin

5 EN Enable pin

8 VCC Power supply pin

(Note 1) N.C. Pin can be open, because it is not connected to the IC. Figure 5. Pin Description (Without Enable)

1 Vcc Power Supply Pin

3 Vo Output Pin

(Note 1) N.C.Pin can be open since it is not connected inside of IC.

1 EN Enable Pin

2 Vcc Power Supply Pin

4 Vo Output Pin

(Note 1) N.C.Pin can be open since it is not connected inside of IC.

Absolute Maximum Ratings (Ta= 25°C) Parameter Symbol Ratings Unit Supply Voltage *1 Vcc -0.3 to +35.0 V EN Voltage *2 VEN -0.3 to +35.0 V Operating Temperature Range Ta -25 to +85 ℃ Storage Temperature Range Tstg -55 to +150 ℃ Maximum Junction Temperature Tjmax 150 ℃ *1 Do not exceed Tjmax. *2 Power Supply (Vcc) and EN pin startup sequence does not matter provided they are operated within the power supply voltage ran ge.
Operating Conditions (-25°C≦Ta≦+85°C) Parameter Symbol Min Max Unit Supply Voltage (VO≧3.0V) Vcc VO+1 26.5 V Supply Voltage (VO<3.0V) Vcc 4.0 26.5 V Startup Voltage (IO=0mA) Vcc - 3.8 V EN Voltage (with shutdown ENABLE) VEN 0 26.5 V Output Current IO 0 1.0 A Output Voltage *3 (BD00FC0) VO 1.0 15.0 V *3 Please refer to Notes when using BD00FC0W at output voltage of 1.0V to 3.0V.
Electrical Characteristics Unless otherwise specified, Ta=25°C, Vcc=13.5V, IO=0mA, VEN=5.0V The resistor between FB and OUT =56.7kΩ, FB and GND =10kΩ (BD00FC0) Parameter Symbol Guaranteed Limit Unit Conditions Min Typ Max Circuit Current at shutdown mode ISD - 0 5 µA VEN=0V Circuit Current Icc - 0.5 2.5 mA Output Reference Voltage (BD00FC0) VFB 0.742 0.750 0.758 V IO =50mA Output Voltage (BD30/33/50FC0) VO VO×0.99 VO VO×1.01 V IO =200mA Output Voltage (BD60/70/80/90/J0/J2/J5FC0) VO VO×0.99 VO VO×1.01 V IO =500mA *4 Minimum dropout voltage ΔVd - 0.4 0.7 V Vcc=4.0V IO =500mA *5 Minimum dropout voltage (BD00/50/60/70/80/90/J0/J2/J5FC0) ΔVd - 0.3 0.5 V Vcc= VO×0.95, IO =500mA Line Regulation Reg.I - 20 80 mV Vcc=VO+1.0V→26.5V Load Regulation Reg.IO - VO×0.010 VO×0.020 V IO =5mA→1A *4 EN High Voltage (with Enable) VEN(High) 2.0 - - V ACTIVE MODE EN Low Voltage (with Enable) VEN(Low) - - 0.8 V OFF MODE EN Bias Current (with Enable) IEN - 25 50 µA *4 In case of J0, J2 and J5, Vcc=Vo+4.5V *5 In case of Vo ≧ 4.0V

Thermal Resistance(Note 1) Parameter Symbol Thermal Resistance (Typ) Unit 1s(Note 3) 2s2p(Note 4) HTSOP-J8 Junction to Ambient θJA 206.4 45.2 °C/W Junction to Top Characterization Parameter(Note 2) ΨJT 21 13 °C/W TO252-5 / TO252-3 Junction to Ambient θJA 115.3 20.8 °C/W Junction to Top Characterization Parameter(Note 2) ΨJT 14 3 °C/W (Note 1)Based on JESD51-2A(Still-Air) (Note 2)The thermal characterization parameter to report the difference between junction temperature and the temperature at t he top center of the outside surface of the component package. (Note 3)Using a PCB board based on JESD51-3. Layer Number of Measurement Board Material Board Size Single FR-4 114.3mm x 76.2mm x 1.57mmt Top Copper Pattern Thickness Footprints and Traces 70μm (Note 4)Using a PCB board based on JESD51-5, 7. Layer Number of Measurement Board Material Board Size Thermal Via (Note 5) Pitch Diameter Top 2 Internal Layers Bottom Copper Pattern Thickness Copper Pattern Thickness Copper Pattern Thickness Footprints and Traces 70μm 74.2mm x 74.2mm 35μm 74.2mm x 74.2mm 70μm (Note 5) This thermal via connects with the copper pattern of all layers. The placement and dimensions obey a land pattern.

Measurement setup for reference data ■BD00FC0 series（5.0V Output Setting） Measurement setup for Figure 12 Measurement setup for Figure 13 Measurement setup for Figure 14 Measurement setup for Figure 15 Measurement setup for Figure 16 Measurement setup for Figure 17 Measurement setup for Figure 18 Measurement setup for Figure 19 Measurement setup for Figure 20 Measurement setup for Figure 21 Measurement setup for Figure 22 Measurement setup for Figure 23 Vcc EN GND FB Vo 1µF FEEDBACK _R 56.7kΩ 10kΩ 1µF Vcc EN GND FB Vo 1µF 56.7kΩ 10kΩ 1µF Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ 500mA Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ 13.5V Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ 13.5V Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ 13.5V Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ 13.5V Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ 13.5V Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ 13.5V IFEEDBACK_R Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ 4.75V Vcc EN GND FB Vo 1µF 1µF 56.7kΩ 10kΩ13.5V 1Vrms 100mA V

I/O equivalent circuit
Output Voltage Configuration Method (BD00FC0) Please connect resistors R1 and R2 (which determines the output voltage) as shown in Figure 77. Please be aware that the offset, due to the current that flows from the FB terminal, becomes large when resistors with large values are used. Resistance values ranging from R2=5kΩ to 10kΩ is recommended. Determine R1 by adjusting with R2 VOUT setting equation is, VOUT≒VFB×(R1+R2)/R2 Thoroughly check the constant settings on the application because circuit current increases depending on connected resistor. Figure 77. Vcc Terminal EN Terminal Vo Terminal BD30/33/50/60/70/80/90/J0/J2/J5FC0 R1 (kΩ) (Typ) R2 (kΩ) (Typ) R3 (kΩ) (Typ) BD30FC0 30.3 BD33FC0 34 BD50FC0 56.6 BD60FC0 70.1 BD70FC0 83.5 BD80FC0 5 48.3 20 BD90FC0 55 BDJ0FC0 5 61.7

15 BDJ2FC0 75

BDJ5FC0 4 76.1 BD00FC0 Vo Terminal FB Terminal Figure 76. IC FB pin VO VFB ≒ 0 . 75 V ( TYP ) Vcc IC Vcc Vo Vcc Vo 15kΩ (Typ) EN 200 k Ω 200 k Ω 1 k Ω Vo FB 1kΩ (Typ) 20kΩ (Typ) 1kΩ (Typ)

Operational Notes 1. Absolute maximum ratings Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode) when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device, consider adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC. 2. Electrical characteristics described in these specifications may vary, depending o n temperature, supply voltage, external circuits, and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics. 3. GND potential The potential of the GND pin must be the minimum potential in the system in all operating conditions. Ensure that no pins are at a voltage below the GND at any time, regardless of transient characteristics. 4. Ground wiring pattern When using both small -signal and large -current GND traces, the two ground traces should be routed separately but connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused by large currents. Also, ensure that the GND traces of external components do not cause variations on GND voltage. The power supply and ground lines must be as short and thick as possible to reduce line impedance. 5. Inter-pin shorts and mounting errors Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply or GND pins (caused by poor soldering or foreign objects) may result in damage to the IC. 6. Operation in strong electromagnetic fields Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in applications where strong electromagnetic fields may be present. 7. Testing on application boards When testing the IC on an application board, connecting a capacitor directly to a low -impedance pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 8. Power Dissipation Pd Using the unit in excess of the rated power dissipation may cause deterioration in electrical characteristics including reduced current capability due to the rise of chip temperature. The mentioned power dissipation in the Thermal Design is the value at HTSOP-J8 and TO252-3/5 package when 114.3mm×76.2mm×1.6mm glass epoxy board is mounted . And in case this exceeds, take the measures like enlarge the size of board; make copper foil area for heat dissipation big; and do not exceed the power dissipation. 9. Thermal consideration Use a thermal design that allows for a su fficient margin in light of the Pd i n actual operating conditions. Consider Pc that does not exceed Pd in actual operating conditions. (Pd≧Pc) Tjmax : Maximum junction temperature=150(℃) , Ta : Peripheral temperature(℃) , θja : Thermal resistance of package-ambience(℃/W), Pd : Package Power dissipation (W), Pc : Power consumption (W), Vcc : Input Voltage, VO : Output Voltage, IO : Load, Icc : Circut Current Package Power dissipation : Pd (W) = (Tjmax-Ta) / θja Power consumption : Pc (W) = (Vcc-VO)×IO+Vcc×Icc 10. Vcc pin the capacitance according to the line between the power smoothing circuit and the V cc pin. Selection of the capacitance also depends on the application. Verify the application and allow for sufficient margins in the design. It is recommended to use a capacitor with excellent voltage and temperature characteristics. Electrolytic capacitor Ceramic capacitor, Low ESR capacitor IC

© 2017 ROHM Co., Ltd. All rights reserved. 21.Mar.2025 Rev.006 www.rohm.com TSZ22111・15・001 11. Capacitor connected to Output pin In order to prevent oscillation, a capacitor needs to be placed between the output pin and GND pin. We recommend a capacitor with a capacitance of more than 1μF(3.0V≦VO≦15.0V). Electrolytic, tantalum and ceramic capacitors can be used. When selecting the capacitor , ensure that the capacitance of more th an 1 μF(3.0V≦VO≦15.0V) or more than 4.7μF(1.0V≦VO<3.0V) is maintained at the intended applied voltage and temperature range. Due to changes in temperature, the capacitance can fluctuate possibly resulting in oscillation. For selection of the capacitor , refer to the Cout_ESR vs I OUT data. The stable operation range given in the reference data is based on the standalone IC and resistive load. For actual applications , the stable operating range is influenced by the PCB impedance, input supply impedance, and load impedance. Therefore, verification of the final operating environment is needed. When selecting a ceramic type capacitor, we recommend using X5R, X7R , or better , with excellent temperature and DC-biasing characteristics and high voltage tolerance. Also, in case of rapidly changing input voltage and load current, select the capacitance in accordance with verifying that the actual application meets the required specification. Operation Note 11 Measurement circuit (BD00FC0) 0.001 0.01 0.1 100 0 200 400 600 800 1000 Io(mA) Cout_ESR(Ω） Unstable operating region Stable operating region Cin vs Cout 3.0V ≤ Vo ≤ 15.0V (Reference data) Cout_ESR vs Io 3.0V ≤ Vo ≤ 15.0V (Reference data) 4.0V ≤ Vcc ≤ 26.5V 3.0V ≤ VO ≤ 15.0V -25℃ ≤ Ta ≤ +85℃ 5kΩ ≤ R2 ≤ 10kΩ (BD00FC0) Cin=2.2µF ≤ Cin ≤ 100µF 1µF ≤ Cout ≤ 100µF 4.0V ≤ Vcc ≤ 26.5V 3.0V ≤ VO ≤ 15.0V -25℃ ≤ Ta ≤ +85℃ 0A ≤ IO ≤ 1A 5kΩ ≤ R2 ≤ 10kΩ (BD00FC0) 100 1 10 100 Cout(µF) Cin（µF） Stable operating region 6.0V≤Vcc≤26.5V 5.0V≤VO≤15.0V -25℃≤Ta≤+85℃ 0A≤IO≤1A 5kΩ≤R2≤10kΩ (BD00FC0) 100 1 10 100 Cout（μF） Cin（μF） Stable operating region 2.2 Unstable operating region IO(mA) 0.001 0.01 0.1 100 0 200 400 600 800 1000 Io(mA) Cout_ESR(Ω） Stable operating region Unstable operating region 0.5 4.0V ≤ Vcc ≤ 26.5V 1.0V ≤ Vo < 1.5V -25 C ≤ Ta ≤ +85°C 5kΩ ≤ R1 ≤ 10kΩ (BD00FC0) 2.2µF ≤ Cin ≤ 100µF 4.7µF ≤ Cout ≤ 100µF 4.0V ≤ Vcc ≤ 26.5V 1.0V ≤ Vo < 3.0V -25 C ≤ Ta ≤ +85°C 0A ≤ Io ≤ 1A 5kΩ≤ R1 ≤ 10kΩ (BD00FC0) 4.0V ≤ Vcc ≤ 26.5V 1.5V ≤ Vo < 3.0V -25 C ≤ Ta ≤ +85°C 5kΩ ≤ R1 ≤ 10kΩ (BD00FC0) 2.2µF ≤ Cin ≤ 100µF 4.7µF ≤ Cout ≤ 100µF Stable operating region 100 1 10 100 Cout（μF） Cin（μF） Stable operating region Unstable operating region 2.2 4.7 0.001 0.01 0.1 100 0 200 400 600 800 1000 Io(mA) Cout_ESR(Ω） Stable operating region Unstable operating region Cout_ESR vs Io 1.0V ≤ Vo < 3.0V (Reference data) Cin vs Cout 1.0V ≤ Vo < 3.0V (Reference data) Vcc EN GND FB Vo VEN (5.0V) Cin (1µF or higher) Cout (1µF or higher) ESR (0.001Ω or higher) Io (Rout) (5k to 10kΩ) VCC (4.0V to 26.5V)

© 2017 ROHM Co., Ltd. All rights reserved. 21.Mar.2025 Rev.006 www.rohm.com TSZ22111・15・001 Operation Note 11 Measurement circuit (BD00FC0) 12. EN pin Do not make the voltage level of the chip’s enable pin at floating level or in between VEN(High) and VEN(Low). Otherwise, the output voltage would be unstable or indefinite. 13. For a steep change of the Vcc voltage Because MOSFET for output Transistor is used when an input voltage change is very steep, it may evoke large current. When selecting the value of external circuit constants, please make sure that the operation on the actual application takes these conditions into account. 14. For infinitesimal fluctuations of output voltage. For applications that have infinitesimal fluctuations of the output voltage caused by some factors (e.g. disturbance noise, input voltage fluctuations, load fluctuations, etc.), please take enough measures to avoid some influence (e.g. insert a filter, etc.). 15. Over current protection circuit (OCP) The IC incorporates an integrated over -current protection circuit that operates in accordance w ith the rated output capacity. This circuit serves to protect the IC from damage when the load becomes shorted. It is also designed to limit output current (without latching) in the event of a large and instantaneous current flow from a larg e capacitor or other component. These protection circuits are effective in preventing damage due to sudden and unexpected accidents. However, the IC should not be used in applications characterized by the continuous or transitive operation of the protection circuits. 16. Thermal Shutdown circuit (TSD) The IC incorporates a built -in thermal shutdown circuit, which is designed to turn the IC off , completely, in the event of thermal overload. It is not designed to protect the IC from damage or guarantee its operation. IC ’s should not be used after this function has activated, or in applications where the operation of this circuit is assumed. 0.001 0.01 0.1 100 0 200 400 600 800 1000 Io(mA) Cout_ESR(Ω） Unstable operating region Stable operating region 4.0V ≤ Vcc ≤ 26.5V 1.0V ≤ Vo < 3.0V (Cout and Ceramic capacitor 10 µF is connected in parallel.) -25°C ≤ Ta ≤ +85°C 5kΩ ≤ R1 ≤ 10kΩ (BD00FC0) 2.2µF ≤ Cin ≤ 100µF 1µF ≤ Cout ≤ 100µF 4.0V ≤ Vcc ≤ 26.5V 1.0V ≤ Vo < 3.0V (Cout and Ceramic capacitor 10µF is connected in parallel.) -25°C ≤ Ta ≤ +85°C 0A ≤ Io ≤ 1A 5kΩ≤ R1 ≤ 10kΩ (BD00FC0) Cout_ESR vs Io 1.0V ≤ Vo < 3.0V Cout and Ceramic capacitor 10µF is connected in parallel. (Reference data) Cin vs Cout 1.0V ≤ Vo < 3.0V Cout and Ceramic capacitor 10µF is connected in parallel. (Reference data) Vcc EN GND FB Vo Cin (1µF or higher) VEN (5.0V) VCC (4.0V to 26.5V) (5k to 10kΩ) Output load Io(Rout) Cout (1µF or higher) ESR (0.001Ω or higher) 10µF 100 1 10 100 Cout（μF） Cin（μF） Stable operating region 2.2 Unstable operating region

© 2017 ROHM Co., Ltd. All rights reserved. 21.Mar.2025 Rev.006 www.rohm.com TSZ22111・15・001 17. In some applications, the V cc and the V o potential might be reversed, possibly resulting in circuit internal damag e or damage to the elements. For example, the accumulated charge in the output pin capacitor flow backward from th e Vo to the Vcc when the V cc shorts to the GND. Use a capacitor with a capacitance with les s than 1000μF for reducing the damage. We also recommend using reverse polarity diodes in series between the V cc and the GND or a bypass diode between the Vo and the Vcc. 18. Regarding input pins of the IC This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes and/or transistors. For example (refer to the Figure below): ○When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode ○When GND > Pin B, the PN junction operates as a parasitic transistor Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutua l interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be avoided. Example of monolithic IC structure N NP+ P N NP+ P Substrate GND N P+ N NP+N P P Substrate GND GND Parasitic Elements Pin A Pin A Pin B Pin B B C E Parasitic Elements GND Parasitic Elements C B E Transistor (NPN)Resistor N Region close-by Parasitic Elements

Physical Dimension Tape and Reel Information Package Name HTSOP-J8

Marking Diagram (Note 1) The left column is for BDxxFC0WEFJ. The right column is for BDxxFC0JEFJ. Output Voltage[V] Part Number Marking 3.3 33FC0 5.0 50FC0 Output Voltage[V] Part Number Marking Variable 00FC0W 3.0 30FC0W 3.3 33FC0W 5.0 50FC0W 6.0 60FC0W 7.0 70FC0W 8.0 80FC0W 9.0 90FC0W

10.0 J0FC0W

12.0 J2FC0W

15.0 J5FC0W

Voltage[V] Part Number Marking(Note 1) Variable 00FC0W 00FC0J 3.0 30FC0W 30FC0J 3.3 33FC0W 33FC0J 5.0 50FC0W 50FC0J 6.0 60FC0W 60FC0J 7.0 70FC0W 70FC0J 8.0 80FC0W 80FC0J 9.0 90FC0W 90FC0J

10.0 J0FC0W J0FC0J

12.0 J2FC0W J2FC0J

15.0 J5FC0W J5FC0J

(TOP VIEW) Part Number Marking LOT Number TO252-5 TO252-5 (TOP VIEW) Part Number Marking LOT Number HTSOP-J8 1PIN 1PIN HTSOP-J8 (TOP VIEW) Part Number Marking LOT Number Pin 1 Mark

Revision History Date Revision Changes 27.Aug.2013 001 New Release 20.Oct. 2015 002 Add BDxxFC0FP and BDxxFC0WFP Change pin name OUT -> Vo 02.Dec. 2015 003 P2 Lineup modified 16.May. 2016 004 The document control number:TSZ02201-0GAG0A600040-1-2 -> TSZ02201-0G2G0A600040-1-2 P8 Power dissipation deleted P8 notes added in electrical characteristics P9 Copper Pattern area modified Misentry modified in Whole page 10.Jan. 2017 005 P3,4 Pin name modified in Pin Configuration/Pin Description P8 Product name modified in Operating Conditions *3 P8 Enable condition added in Circuit Current at shutdown mode for preventing mistake P10-12 Comment and Condition added for preventing mistake Figure title changed due to expression difference between Japanese and English datasheet P14-25 Comment and Condition added for preventing mistake Figure title changed due to expression difference between Japanese and English datasheet P13, P26 Measurement setup for reference data modified P29 Figure 76. I/O equivalent modified P29 Duplicated contents deleted in Output Voltage Configuration Method P30 Misentry modified in Operational notes Expression of shutdown mode and shutdown SW changed to Enable 21.Mar.2025 006 BDxxFC0JEFJ added

Notice-PGA-E Rev.004 © 2015 ROHM Co., Ltd. All rights reserved. Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ( “Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used. However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse , is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. I f the flow soldering method is preferred on a surface-mount products , please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification

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Product Information

BD00FC0JEFJ-E2 specifications and overview.

Summary

35V Withstand Voltage 1A LDO Regulators 21.Mar.2025 Rev.006

Description

35V Withstand Voltage 1A LDO Regulators 21.Mar.2025 Rev.006

Source title BD00FC0JEFJ-E2 Datasheet(PDF) - Rohm

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