B10011S_05 ATMEL | Alldatasheet
Document overview
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Technical content
Features
- Capability of Single-wire Operation Hardware Fault Recognition Inputs with High Common-mode and Differential-mode Interference Rejection Above
100 VPP due to External Filters at the Receiver Input
Immunity Against Electromagnetic Interference Immunity Against Ground-voltage Offsets < 6V Ruggedized Against ESD by MIL-STD-883C, Method 3015 Benefits Systems which employ this device have the following benefits compared to solutions using discrete components: High Reliability
Applications
Especially Suited for Truck and Van Applications Interface Between Truck and Trailer Interface Between Dashboard and Engine 1. Description The CAN driver IC B10011S is a low-speed, high-level interface for 24V (27V) opera- tion with transmission levels according to ISO WD 11992-1 (point-to-point interface between trucks and trailers). It is developed for signal levels of 8V/16V and a speed of up to 250 kbits/s. This device allows transmission, that is insensitive to electromagnetic interference. Such interferences may especially occur in truck applications where (due to the length of the wires) high common-mode voltages (e.g., 50) can be coupled into the lines. This device contains a fault recognition circui t that detects faults on one of the two wires, which are normally used for transmission. If a fault occurs the operation can be switched from double-wire to single-wire mode thus, allowing proper operation even if one wire is broken, has a short-cut or a high series resistance. Can Transceiver IC B10011S Rev. 4749C–AUTO–09/05
4749C–AUTO–09/05 B10011S Figure 1-1. Block Diagram VDD +4.3 V VSS VCC B10011S Select control Error control Compa- rators Output control 2.5 V GND
4749C–AUTO–09/05 B10011S 2. Pin Configuration Figure 2-1. Pinning SO16 ASEL BSEL ER RX1 RX0 TX0 VDD VSS VCC GND Table 2-1. Pin Description 16-lead SOIC (SO16), Small Outline Gull - Wing Pin Symbol Function
1 ASEL Select control input
2 BSEL Select control input
3 ER Error signal output
4 RX1 Reference voltage 2.5V
5 RX0 Receiver output
6 TX0 Transmitter input
7 VDD Controller supply voltage 5V
8 VSS Controller supply voltage 0V
9 S- Collector of internal NPN switch
10 GND Vehicle ground 0V
11 L ’ Data out driver
12 H’ Data out driver
13 VCC Vehicle power supply 24V
14 S+ Control output for external PNP
15 F0 Receiver input
16 F1 Receiver input
4749C–AUTO–09/05 B10011S ER (error signal) is low when normal operation is disturbed by line faults (interruption, short to ground or to VCC, H to L short disturbance by high voltage transients). After a waiting period due to transient delays, the controller is asked to test if single-wire operation is possible by changing the Asel and Bsel state. Asel and Bsel have an internal pull-up resistor. Therefore, the no-connect state is 1, but connec- tion to VDD is recommended when not in use. 3. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Symbol Value Unit Supply voltage V CC –0.5 to +36 V Controller supply voltage V DD –0.5 to +5.5 V Input voltage at any input V in –0.5 to VDD V Junction temperature T j 150 °C Storage temperature range T stg –55 to +150 °C Soldering temperature (for 10s maximum) T sld 260 °C Operating Conditions Parameters Symbol Value Unit Supply voltage car battery V CC 7 to 32 V Controller supply voltage V DD 4.75 to 5.25 V Control input voltage A sel, Bsel 0 to VDD V Input voltage T x0 0 to VDD V Operating temperature T amb –40 to +105 °C 4. Operating Modes 0 = 0V, 1 = 5V Asel Bsel Rx0 Mode 0 0 3.8V H, L drivers disabled, L load disabled, S-, S+ disabled station not in operation, but consuming current 1 0 From H Single-wire H, L driver, L load, S-, S+ disabled 0 1 From L Single-wire L, H driver disabled 1 1 From L-H Two-wire operation, normal mode
4749C–AUTO–09/05 B10011S 5. Pulse Diagram The pulse diagram for two connected, identical stations is shown below. The resistor levels have to be kept constant when additional stations are connected. Figure 5-1. Pulse Diagram TX0 dominant recessive 4 ms min(1) t 5 V 0 V RX0 t 5 V 0 V 27 V 18 V 9 V L H t0 V 27 V 18 V 9 V t0 V (1) Filter has to be changed if short distances are to be allowed
4749C–AUTO–09/05 B10011S 6. Electrical Characteristics Test condition: Test circuit (see Figure 6-1 on page 7), 0 = 0V, 1 = 5V VCC = 27V, VDD = 5V, VSS = 0V, Tamb = –40°C to +105°C, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit Supply current Tx0 = 0, Asel = 1, Bsel = 1 I CC 15 mA Tx0 = 0, Asel = 0, Bsel = 0 I DD 22 mA Tx0 = 1, Asel = 1, Bsel = 1 I CC 26 mA Tx0 = 1, Asel = 1, Bsel = 1 I DD 16 mA Input current Tx0 = 1, Asel = 1, Bsel = 1 I(T x0) 650 µA Tx0 = 1, Asel = 1, Bsel = 1 I(A sel, Bsel) 150 µA Output voltage Tx0 = 0, Asel = 1, Bsel = 0 VIL(F0) = 1.9V, VIH(F1) = 2.7V Rx0 1.0 V Tx0 = 1, Asel = 1, Bsel = 1 VIL(F1) = 1.9 V, VIH(F0) = 2.7 V Rx0 3.8 V Tx0 = 0, Asel = 1, Bsel = 1 U(H’) 24.5 V Tx0 = 1, Asel = 1, Bsel = 1 U(H’) 1.0 V Tx0 = 1, Asel = 1, Bsel = 1 U(L ’) 26 V Tx0 = 0, Asel = 1, Bsel = 1 U(L ’) 1.0 V No fault ER 4.7 V Fault on line ER 100 mV V CC = 7V, VDD = 4.75V, VSS = 0V, Tamb = 25°C, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit Output voltage Tx0 = 0, Asel = 1, Bsel = 1 U(H’) 4.5 V Tx0 = 1, Asel = 1, Bsel = 1 U(H’) 100 mV Tx0 = 1, Asel = 1, Bsel = 0 U(L ’) 6.5 V Tx0 = 0, Asel = 1, Bsel = 1 U(L ’) 1.0 V Tx0 = 1, Asel = 1, Bsel = 0 VIL(F1) = 1.0V, VIH(F0) = 1.15V Rx0 3.3 V Tx0 = 0, Asel = 1, Bsel = 0 VIL(F0) = 1.0V, VIH(F1) = 1.15V Rx0 1.0 V VCC = 32V, VDD = 5.25V, VSS = 0V, Tamb = 25°C, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit Output voltage Tx0 = 0, Asel = 1, Bsel = 1 U(H’) 29 V Tx0 = 1, Asel = 1, Bsel = 1 U(H’) 500 mV Tx0 = 1, Asel = 1, Bsel = 0 U(L ’) 31.5 V Tx0 = 0, Asel = 1, Bsel = 1 U(L ’) 1.0 V Tx0 = 1, Asel = 1, Bsel = 0 VIL(F1) = 1.6V, VIH(F0) = 2.7V Rx0 4.0 V Tx0 = 0, Asel = 1, Bsel = 0 VIL(F0) = 1.6V, VIH(F1) = 2.7V Rx0 1.0 V
4749C–AUTO–09/05 B10011S Figure 6-3. Implementation of a Power Filter and Over Clamps 7. Application Hints As an interface between CAN controllers and a two-wire data bus system for serial data inter- change, this device is adapted to a special high- level, low-speed transmission system, which is useful in harsh environments. High immunity agai nst ground offset and interference voltages on the bus have been the design goals for this device, rather than low power consumption or a min- imum of external components. An error detection scheme is implemented in the receiver part to give quick information to the controller in case of faults occurring on the bus. Thus, the controller is able to start a search cycle in order to look for the possibility of single-wire operation or to dis- able the station from the bus. An automatic error-signal end is not feasible because parts of the system are disabled during single-wire operation. Therefore, the controller has to carry out short tests by switching to the two-wire state and checking, whether the error signal is still present or not. Errors due to dirty contacts, shorts between high and low line, or interruptions may not be recognized at all, because this device does not contain a complete fault computer. Two control inputs A sel and Bsel enable four operation modes (see Table “Operating Modes” on page 4’). Depending on the nature of the error, the error signal ER is internally generated partly in the recessive or partly in the dominant transmission state. In order to avoid watching the error bits bitwise, an open-collector output driver (with a 1-k Ω series resistor) discharges a storage capacitor, which is charged by a time constant, long enough to hold the 0 state for, e.g., 200 µs, thus, giving the controller enough time to recognize this status during idle times. Only the charg- ing resistor may be changed and not the 2.2-nF capacitor. In order to perform a faster error-end test, the charging resistor may be shorted by an NPN emitter follower or by a tristate output high for approximately 1 to 2 µs. The pinout of the device shows a controller side (pins 1 to 8) and a bus side (pins 9 to 16). The application circuit utilizes an input filter section which is necessary for every station and a bias section which is needed in two master stations on ly. Additional slave st ations only contain the driving resistors at pins 11 and 12 (270 Ω and 220Ω), the choke coil, and capacitor between pins 13 and 10. A power filter and overvoltage clamp is highly recommended in order to avoid transmission errors due to spikes on the 24-V battery voltage. The input filter is designed as an 2-RC filter for 125 kbit/s and may be changed to 250 kbit/s. Its good pulse response and good suppression of high frequencies should not be weakened by omitting one of the capacitors. From battery (cl. 15) Ground 33 V To VCC (pin 13) To pin 10 + 22 µF
4749C–AUTO–09/05 B10011S All the logical and sensing functions in the device are powered by V DD = 5V. Therefore, the filter section also acts as a level shifter to the input comparator range (approximately 1 to 3.3V). The diagram (see Figure 7-1) shows how the battery voltage, V CC, influences the comparator input voltages, F0 and F1, in relation to the internal reference voltage, Vref, in the recessive state. The lower VCC, the lower the bus level. Taking this into account the comparator input levels are F1 – Vref for single-wire H respectively F 1 – F0 for two-wire operation. The comparator’s offset voltage is ≤ 10 mV. Matching the filter biasing to the internal reference is essentially for safe operation even at low battery voltages during motor start. The level investigations and tests described in the following description have been carried out within the temperature range of –40°C to +105°C with two B10011S on a bus line, one of them always in the recessive state (see Figure 7-2 on page 10). In case of line shorts to V CC or to ground or in case of H to L shorts, all participants on the bus are intended to switch to single-wire operation and to disable their drivers not in use. The dynamic behavior of the circuit depends on the line capacitances to ground. Approximately 200 pF/m and a maximum of 6 nF have to be taken into account. The transition from the domi- nant to the recessive state enables the bias network to recharge the line through a driving resistor of approximately 300 Ω. The transition from the recessive to the dominant state is approximately twice as fast. This is probably the source of emitted radiation having no capaci- tance on the line. The choke coil enables the suppression of this radiation in the frequency range above 5 MHz to 7 MHz. Care should be taken not to feed noise from V DD or V CC to the line. Therefore, they should be properly blocked by low-inductance capacitors. Data loss by externally induced interference is avoided by careful PCB layout and EMC design for this circuit as well as by providing appropriate overvoltage protection. It is very essential to separate battery ground and filter ground as indicated in the application circuit (see Figure 6-2 on page 7). Especially important is that the filter ground must be connected to pin 8 by a short connection not subject to disturbing currents from external sources. The ground wire of the “star- quad” cable may introduce such currents and should be connected to battery ground via a 0.1-µF capacitor in a way as short as possible, perhaps to the metal housing. In order to avoid thermal problems, the voltage divider and driving resistors should be kept away from the IC. Otherwise they would heat up the environment of the small IC and might reduce its life expectancy. Figure 7-1. Comparator Thresholds 5 10 15 20 25 30 35 RxN not ER Uref VCC V
4749C–AUTO–09/05 B10011S Figure 7-2. Test Circuit Equivalents VCC H L 300 300 300 300 2/3 VCC 1/3 VCC Ideal test circuit equivalent CH0 CL0 H L 2CHL Capacitance H: CHgnd = CH0 + 2 CHL <= 200 pF/m Capacitance L: CLgnd = CL0 + 2 CHL <= 200 pF/m Switches are closed in the dominant state Switches are closed in the dominant state 1/3 VCC 2/3 VCC H L 300 300 220 270 38k 38k 4k54 4k54 F1 0.946 V 0.946 V Real test circuit equivalent VCC
4749C–AUTO–09/05 B10011S 9. Package Information 10. Revision History 8. Ordering Information Part Number Package Remarks B10011S-MFPG1Y SO16 Taped and reeled, Pb-free B10011S-MFPG3Y SO16 Taped and reeled, Pb-free 3.80 0.25 6.0 0.3 9.9 0.3 1.27 0.42 0.07 1.55 0.2 0.18 0.08 Pin 1 0.22 0.03 0.7 0.1 Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. History 4749C-AUTO-09/05
- Put datasheet in a new template
- Pb-free logo on page 1 added
- Table “Ordering Information” on page 11 changed 4749B-AUTO-09/04 • Figure 2 “Pinning SO16” on page 2 changed
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