ATF22V10B-10NM/883

ATF22V10B ATMEL | Alldatasheet

Document overview

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Technical content

Features

• Industry Standard Architecture – Low Cost Easy-to-Use Software Tools
• High-Speed, Electrically-Erasable Programmable Logic Devices – 7.5 ns Maximum Pin-to-Pin Delay
• Several Power Saving Options
• CMOS and TTL Compatible Inputs and Outputs – Input and I/O Pull-Up Resistors
• Advanced Flash Technology – Reprogrammable – 100% Tested
• High Reliability CMOS Process – 20 Year Data Retention – 100 Erase/Write Cycles – 2,000V ESD Protection – 200 mA Latchup Immunity
• Full Military, Commercial, and Industrial Temperature Ranges
• Dual-in-Line and Surface Mount Packages in Standard Pinouts Logic Diagram Device I CC , Stand-By I CC , Active A TF22V10B 85 mA 90 mA A TF22V10BQ 35 mA 40 mA A TF22V10BQL 5 mA 20 mA Rev. 0250F–05/98 High- Performance EE PLD ATF22V10B Pin Configurations Pin Name Function CLK Clock IN Logic Inputs I/O Bidirectional Buffers * No Internal Connection V CC +5V Supply DIP/SOIC TSSOP Top View CLK/IN IN IN IN IN IN IN IN IN IN IN GND VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN LCC/PLCC Top View

Description

The ATF22V10B is a high performance CMOS (Electrically Erasable) Programmable Logic Device (PLD) which utilizes Atmel’s proven electrically erasable Flash memory technol- ogy. Speeds down to 7.5 ns and power dissipation as low as 10 mA are offered. All speed ranges are specified over the full 5V ± 10% range for military and industrial tempera- ture ranges, and 5V ± 5% for commercial temperature ranges. Several low power options allow selection of the best solu- tion for various types of power-limited applications. Each of these options significantly reduces total system power and enhances system reliability. Absolute Maximum Ratings* Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: 1. Minimum voltage is -0.6V DC, which may under- shoot to -2.0V for pulses of less than 20 ns. Max- imum output pin voltage is V CC + 0.75V DC, which may overshoot to 7.0V for pulses of less than 20 ns. Voltage on Any Pin with Voltage on Input Pins with Respect to Ground Programming Voltage with (1) DC and AC Operating Conditions Commercial Industrial Military Operating T emperature (Case) 0°C - 70°C -40°C - 85°C -55°C - 125°C VCC Power Supply 5V ± 5% 5V ± 10% 5V ± 10%

Notes: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec. DC Characteristics Symbol Parameter Condition Min Typ Max Units IIL Input or I/O Low Leakage Current 0 ≤ VIN ≤ VIL (MAX) -35 -100 µA IIH Input or I/O High Leakage Current 3.5 ≤ VIN ≤ VCC 10 µA ICC Power Supply Current, Standby VCC = MAX, VIN = MAX, Outputs Open B-7, -10 Com. 85 120 mA Ind., Mil. 85 140 mA B-15, -25 Com. 65 90 mA Ind., Mil. 65 115 mA BQ-15 Com. 35 55 mA BQL-20, -25 Com. 5 10 mA Ind., Mil. 5 15 mA ICC2 Clocked Power Supply Current VCC = MAX, Outputs Open, f = 15 MHz B-7, -10 Com. 90 120 mA Ind., Mil. 90 145 mA B-15, -25 Com. 65 90 mA Ind., Mil. 65 120 mA BQ-15 Com. 40 60 mA BQL-20, -25 Com. 20 50 mA Ind., Mil. 20 70 mA IOS (1) Output Short Circuit Current VOUT = 0.5V -130 mA VIL Input Low Voltage -0.5 0.8 V VIH Input High Voltage 2.0 V CC + 0.75 V VOL Output Low Voltage VIN = VIH or VIL, VCC = MIN IOL = 16 mA Com., Ind. 0.5 V IOL = 12 mA Mil. 0.5 V VOH Output High Voltage VIN = VIH or VIL, VCC = MIN IOH = -4.0 mA 2.4 V

AC Waveforms (1) Notes: 1. See ordering information for valid part numbers. 2. 5.5 ns for DIP package devices. 3. 111 MHz for DIP package devices. AC Characteristics(1) Symbol Parameter -7 -10 -15 -20 -25 UnitsMin Max Min Max Min Max Min Max Min Max tPD Input or Feedback to Combinatorial Output 3 7 . 531 031 532 032 5 n s tCO Clock to Output 2 4.5 (2) 2 6 . 5 282 1 2 2 1 5 n s tCF Clock to Feedback 2.5 2.5 2.5 8 13 ns tS Input or Feedback Setup Time 3.5 4.5 10 14 15 ns tH Hold Time 0 0 0 0 0 ns FMAX External Feedback 1/(tS + tCO ) 125 (3) 90 55.5 38.5 33.3 MHz Internal Feedback 1/(tS + tCF ) 166 142 69 45.5 40 MHz No Feedback 1/(tWH + tWL ) 166 142 83.3 38.5 MHz tW Clock Width (tWL and tWH ) 3 3.5 6 10 13 ns tEA Input or I/O to Output Enable 3 7.5 3 10 3 15 3 20 3 25 ns tER Input or I/O to Output Disable 3 7.5 3 9 3 15 3 20 3 25 ns tAP Input or I/O to Asynchronous Reset of Register 3 1 0 31 232 032 232 5n s tAW Asynchronous Reset Width 7 8 15 20 25 ns tAR Asynchronous Reset Recovery Time 5 6 10 20 25 ns tSP Setup Time, Synchronous Preset 4.5 6 10 14 15 ns tSPR Synchronous Preset to Clock Recovery Time 5 8 10 14 15 ns

tR , tF < 3 ns Outout Test Loads * All except -7 which is R2 = 300Ω Note: 1. T ypical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Power Up Reset The registers in the ATF22V10Bs are designed to reset during power up. At a point delayed slightly from VCC crossing VRST , all registers will be reset to the low state. The output state will depend on the polarity of the output buffer. This feature is critical for state machine initialization. How- ever, due to the asynchronous nature of reset and the uncertainty of how V CC actually rises in the system, the fol- lowing conditions are required: 1. The VCC rise must be monotonic, 2. After reset occurs, all input and feedback setup times must be met before driving the clock pin high, and 3. The clock must remain stable during tPR . Preload of Registered Outputs The ATF22V10B’s registers are provided with circuitry to allow loading of each register with either a high or a low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A JEDEC file with preload is generated when a source file with vectors is compiled. Once downloaded, the JEDEC file preload sequence will be done automatically by most of the approved programmers after the programming. Security Fuse Usage A single fuse is provided to prevent unauthorized copying of the ATF22V10B fuse patterns. Once programmed, fuse verify and preload are inhibited. However, the 64-bit User Signature remains accessible. The security fuse should be programmed last, as its effect is immediate. Commercial Military Pin Capacitance f = 1 MHz, T = 25°C(1) Typ Max Units Conditions C IN 58 p F V IN = 0V C OUT 68 p F V OUT = 0V Parameter Description Typ Max Units tPR Power-Up Reset Time 600 1,000 ns VRST Power-Up Reset Voltage 3.8 4.5 V

There are 64 bits of programmable memory that are always available to the user, even if the device is secured. These bits can be used for user-specific data. Programming/Erasing Programming/erasing is performed using standard PLD programmers. See CMOS PLD Programming Hardware and Software Support for information on software/program- ming. Input and I/O Pull-Ups All ATF22V10B family members have internal input and I/O pull-up resistors. Therefore, whenever inputs or I/Os are not being driven externally, they will float to V CC . This ensures that all logic array inputs are at known states. These are relatively weak active pull-ups that can easily be overdriven by TTL-compatible drivers (see input and I/O diagrams below). Input Diagram I/O Diagram

Functional Logic Diagram ATF22V10B

Notes: 1. Recommend A TF22V10C versions. 2. Difference between 03 and 05 is that 05 has a relaxed tCO = 12 ns and fMAX (witrh external feedback) = 42 MHz.

Ordering Information

tPD (ns) t S (ns) t CO (ns) Ordering Code Package Operation Range 7.5 3.5 4.5 ATF22V10B-7JC (1) A TF22V10B-7PC(1) A TF22V10B-7SC(1) A TF22V10B-7XC(1) 28J 24P3 24S 24X Commercial (0°C to 70°C) 10 4.5 6.5 A TF22V10B-10JC (1) A TF22V10B-10PC(1) A TF22V10B-10SC(1) A TF22V10B-10XC(1) 28J 24P3 24S 24X Commercial (0°C to 70°C) A TF22V10B-10JI(1) A TF22V10B-10PI(1) A TF22V10B-10SI(1) A TF22V10B-10XI(1) 28J 24P3 24S 24X Industrial (-40°C to 85°C) A TF22V10B-10GM/883 A TF22V10B-10NM/883 24D3 28L Military/883C (-55°C to 125°C) Class B, Fully Compliant 15 10 8 A TF22V10B-15JC A TF22V10B-15PC A TF22V10B-15SC A TF22V10B-15XC 28J 24P3 24S 24X Commercial (0°C to 70°C) A TF22V10B-15JI A TF22V10B-15PI A TF22V10B-15SI A TF22V10B-15XI 28J 24P3 24S 24X Industrial (-40°C to 85°C) A TF22V10B-15GM/883 A TF22V10B-15NM/883 24D3 28L Military/883C (-55°C to 125°C) Class B, Fully Compliant 25 15 15 A TF22V10B-25JC A TF22V10B-25PC A TF22V10B-25SC A TF22V10B-25XC 28J 24P3 24S 24X Commercial (0°C to 70°C) A TF22V10B-25JI A TF22V10B-25PI A TF22V10B-25SI A TF22V10B-25XI 28J 24P3 24S 24X Industrial (-40°C to 85°C) 10 4.5 6.5 5962-89841 06LA 5962-89841 063X 24D3 28L Military (-55°C to 125°C) Class B, Fully Compliant 15 10 8 5962-89841 03LA (2) 5962-89841 033X(2) 5962-89841 05LA 5962-89841 053X 24D3 28L 24D3 28L Military (-55°C to 125°C) Class B, Fully Compliant

tPD (ns) t S (ns) t CO (ns) Ordering Code Package Operation Range 15 10 8 ATF22V10BQ-15JC A TF22V10BQ-15PC A TF22V10BQ-15SC A TF22V10BQ-15XC 28J 24P3 24S 24X Commercial (0°C to 70°C) 20 14 12 ATF22V10BQL-20JC A TF22V10BQL-20PC A TF22V10BQL-20SC A TF22V10BQL-20XC 28J 24P3 24S 24X Commercial (0°C to 70°C) A TF22V10BQL-20JI A TF22V10BQL-20PI A TF22V10BQL-20SI A TF22V10BQL-20XI 28J 24P3 24S 24X Industrial (-40°C to 85°C) A TF22V10BQL-20GM/883 A TF22V10BQL-20GM/883 24D3 28L Military/883C (-55°C to 125°C) Class B, Fully Compliant 25 15 15 ATF22V10BQL-25JC A TF22V10BQL-25PC A TF22V10BQL-25SC A TF22V10BQL-25XC 28J 24P3 24S 24X Commercial (0°C to 70°C) A TF22V10BQL-25JI A TF22V10BQL-25PI A TF22V10BQL-25SI A TF22V10BQL-25XI 28J 24P3 24S 24X Industrial (-40°C to 85°C) A TF22V10BQL-25GM/883 A TF22V10BQL-25NM/883 24D3 28L Military/883C (-55°C to 125°C) Class B, Fully Compliant20 14 12 5962-89841 14 LA 5962-89841 14 3X 24D3 28L 25 15 15 5962-89841 13 LA 5962-89841 13 3X 24D3 28L Package Type 24D3 24-Lead, 0.300" Wide, Ceramic Dual Inline Package (Cerdip) 28J 28-Lead, Plastic J-Leaded Chip Carrier (PLCC) 28L 28-Pad, Ceramic Leadless Chip Carrier (LCC) 24P3 24-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 24S 24-Lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC) 24X 24-Lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline (TSSOP)

1.28(32.5) 1.24(31.5) PIN .310(7.87) .285(7.24) .098(2.49) MAX .005(.127) MIN .060(1.52) .015(.381) .023(.584) .045(1.14) .325(8.25) .300(7.62)

15 REF

.400(10.2) MAX .015(.381) .008(.203) .110(2.79) .090(2.29) .200(5.08) .125(3.18) SEATING PLANE .200(5.08) MAX 1.100(27.94) REF .045(1.14) X 45°PIN NO. 1 IDENTIFY .032(.813) .026(.660) .050(1.27) TYP .300(7.62) REF SQ .012(.305) .008(.203) .021(.533) .013(.330) .430(10.9) .390(9.91)SQ .043(1.09) .020(.508) .120(3.05) .090(2.29) .180(4.57) .165(4.19) .456(11.6) .450(11.4) .495(12.6) .485(12.3) SQ SQ 1.27(32.3) 1.25(31.7) PIN .266(6.76) .250(6.35) .090(2.29) MAX .005(.127) MIN .070(1.78) .020(.508) .023(.584) .014(.356) .065(1.65) .040(1.02) .325(8.26) .300(7.62) .400(10.2) MAX .012(.305) .008(.203) .110(2.79) .090(2.29) .151(3.84) .125(3.18) SEATING PLANE .200(5.06) MAX 1.100(27.94) REF 24D3 , 24-Lead, 0.300" Wide, Non-Windowed, Ceramic Dual Inline Package (Cerdip) Dimensions in Inches and (Millimeters) MIL-STD-1835 D-9 CONFIG A 28J, 28-Lead, Plastic J-Leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-018 AB 28L, 28-Pad, Non-Windowed, Ceramic Leadless Chip Carrier (LCC) Dimensions in Inches and (Millimeters) MIL-STD-1835 C-4 24P3, 24-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 AF

.020(.508) .013(.330) .299(7.60) .291(7.39) .420(10.7) .393(9.98) .105(2.67) .092(2.34) .050(1.27) BSC .616(15.6) .598(15.2) .012(.305) .003(.076) .013(.330) .009(.229) .050(1.27) .015(.381)8

0 REF

24S, 24-Lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC) Dimensions in Inches and (Millimeters) 24X, 24-Lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline (TSSOP) Dimensions in Millimeters and (Inches)