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Document overview
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Technical content
Features
High linearity performance Enhancement Mode Technology [1] Low noise fi gure Excellent uniformity in product specifi cations 800 micron gate width Low cost surface mount small plastic package SOT- 343 (4 lead SC-70) Tape-and-Reel packaging option available Lead-free option available. Specifi cations 2 GHz; 3V, 60 mA (Typ.) 36.2 dBm output 3 rd order intercept 20.4 dBm output power at 1 dB gain compression 0.5 dB noise fi gure 16.6 dB associated gain
Applications
Low noise amplifi er for cellular/PCS base stations LNA for WLAN, WLL/RLL and MMDS applications General purpose discrete E -PHEMT for other ultra low noise applications Note: 1. Enhancement mode technology requires positive Vgs, thereby eliminating the need for the negative gate voltage associated with conventional depletion mode devices. Surface Mount Package SOT-343 Pin Connections and Package Marking SOURCE DRAIN GATE SOURCE 4Fx Note: Top View. Package marking provides orientation and identifi cation “4F” = Device Code “x” = Date code character identifi es month of manufacture. Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model (Class A) ESD Human Body Model (Class 1A) Refer to Avago Application Note A004R: Electrostatic Discharge Damage and Control.
Symbol Parameter and Test Condition Units Min. Typ. [2] Max.
- Measurements obtained using production test board described in Figure 5.
- Typical values measured from a sample size of 450 parts from 9 wafers.
50 Ohm
Figure 5. Block diagram of 2 GHz production test board used for Noise Figure, Associated Gain, P1dB, and OIP3 measurements. This circuit represents a
- Gamma out is the refl ection coeffi cient of the matching circuit presented to the output of the device.
- Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based
Fmin is calculated. Refer to the noise parameter application section for more information. Figure 17. P1dB vs. Frequency and Temp Tuned for Max OIP3 and Fmin at 3V, 60 mA. Figure 18. Fmin[1] vs. Frequency and Ids Figure 15. Fmin[2] vs. Frequency and Temp Tuned for Max OIP3 and Fmin at 3V, 60 mA. Figure 16. OIP3 vs. Frequency and Temp Tuned for Max OIP3 and Fmin at 3V, 60 mA.
85 CFREQUENCY (GHz)
- Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based
Fmin is calculated. Refer to the noise parameter application section for more information.
- S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of
via holes are placed within 0.010 inch from each source lead contact point, one via on each side of that point. Figure 19. MSG/MAG and |S21|2 vs.
- Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based
Fmin is calculated. Refer to the noise parameter application section for more information.
- S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of
via holes are placed within 0.010 inch from each source lead contact point, one via on each side of that point. Figure 20. MSG/MAG and |S21|2 vs.
- Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based
Fmin is calculated. Refer to the noise parameter application section for more information.
- S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of
via holes are placed within 0.010 inch from each source lead contact point, one via on each side of that point. Figure 21. MSG/MAG and |S21|2 vs.
- Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based
Fmin is calculated. Refer to the noise parameter application section for more information.
- S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of
via holes are placed within 0.010 inch from each source lead contact point, one via on each side of that point. Figure 22. MSG/MAG and |S21|2 vs.
Figure 23. Typical ATF-54143 LNA with Passive Biasing. the low frequency RF bypass for resistors R3 and R4. gate and source for a nominal drain current of 60 mA. for application notes covering specifi c applications). band rejection at lower frequencies. diff erence mixing products are bypassed by C3 and C6. the desired amount of drain current will be achieved. diff erential between the gate and source terminals. available power supply voltage. VDD is the power supply voltage. Vds is the device drain to source voltage. Ids is the desired drain current.
PHEMT is that a negative power source is not required. bipolar junction transistor. provides a constant current supply for the drain current. amount of extra current consumed by the bias network. Figure 24. Typical ATF-54143 LNA with Active Biasing.
G Num=1 C C=0.13 pF Port Num=2 SOURCE DRAIN Port Num=4 Port D Num=3 L L=0.175 nH R=0.001 C C=0.159 pF L L=0.746 nH R=0.001MSub TLINP TL4 Z=Z1 Ohm L=15 mil K=1 A=0.000 F=1 GHz TanD=0.001 TLINP TL10 Z=Z1 Ohm L=15 mil K=1 A=0.000 F=1 GHz TanD=0.001 TLINP TL3 Z=Z2 Ohm L=25 mil K=K A=0.000 F=1 GHz TanD=0.001 TLINP TL9 Z=Z2 Ohm L=10.0 mil K=K A=0.000 F=1 GHz TanD=0.001 VAR VAR1 K=5 Z2=85 Z1=30 Var Egn TLINP TL1 Z=Z2/2 Ohm L=20 0 mil K=K A=0.0000 F=1 GHz TanD=0.001 TLINP TL2 Z=Z2/2 Ohm L=20 0 mil K=K A=0.0000 F=1 GHz TanD=0.001 TLINP TL8 Z=Z1 Ohm L=15.0 mil K=1 A=0.0000 F=1 GHz TanD=0.001 TLINP TL7 Z=Z2/2 Ohm L=5.0 mil K=K A=0.0000 F=1 GHz TanD=0.001 TLINP TL5 Z=Z2 Ohm L=26.0 mil K=K A=0.0000 F=1 GHz TanD=0.001 TLINP TL6 Z=Z1 Ohm L=15.0 mil K=1 A=0.0000 F=1 GHz TanD=0.001 L L=0.477 nH R=0.001 L L=0.4 nH R=0.001 GaAsFET FET1 Mode1=MESFETM1 Mode=NonlinearMSUB MSub1 H=25.0 mil Er=9.6 Mur=1 Cond=1.0E+50 Hu=3.9e+034 mil T=0.15 mil TanD=0 Rough=0 mil NFET=yes PFET=no Vto=0.3 Beta=0.9 Lambda=82e-3 Alpha=13 Tau= Tnom=16.85 Idstc= Ucrit=-0.72 Vgexp=1.91 Gamds=1e-4 Vtotc= Betatce= Rgs=0.25 Ohm Rf= Gscap=2 Cgs=1.73 pF Cgd=0.255 pF Gdcap=2 Fc=0.65 Rgd=0.25 Ohm Rd=1.0125 Ohm Rg=1.0 Ohm Rs=0.3375 Ohm Ld= Lg=0.18 nH Ls= Cds=0.27 pF Rc=250 Ohm Crf=0.1 F Gsfwd= Gsrev= Gdfwd= Gdrev= R1= R2= Vbi=0.8 Vbr= Vjr= Is= Ir= Imax= Xti= Eg= Fnc=1 MHz R=0.08 P=0.2 C=0.1 Taumdl=no wVgfwd= wBvgs= wBvgd= wBvds= wldsmax= wPmax= AllParams= Advanced_Curtice2_Model MESFETM1 ATF-54143 Die Model ATF-54143 curtice ADS Model
Figure 25. Adding Vias to the ATF-54143 Non-Linear Model for Comparison to Measured S and Noise Parameters. includes both the die and associated package model. comparison. This is shown schematically in Figure 25.
Noise Parameter Applications Information Fmin values at 2 GHz and higher are based on measure- ments while the F mins below 2 GHz have been extrapo- lated. The F min values are based on a set of 16 noise fi gure measurements made at 16 diff erent impedances using an ATN NP5 test system. From these measure- ments, a true F min is calculated. Fmin represents the true minimum noise fi gure of the device when the device is presented with an impedance matching network that transforms the source impedance, typically 50ý, to an impedance represented by the refl ection coeffi cient G The designer must design a matching network that will present G o to the device with minimal associated circuit losses. The noise fi gure of the completed amplifi er is equal to the noise fi gure of the device plus the losses of the matching network preceding the device. The noise fi gure of the device is equal to F min only when the device is presented with G o. If the refl ection coef- fi cient of the matching network is other than G o, then the noise fi gure of the device will be greater than F min based on the following equation. NF = Fmin + 4 Rn |s – o | 2 Where R n/Zo is the normalized noise resistance, G o is the optimum refl ection coeffi cient required to produce Fmin and G s is the refl ection coeffi cient of the source impedance actually presented to the device. The losses of the matching networks are non-zero and they will also add to the noise fi gure of the device creating a higher amplifi er noise fi gure. The losses of the matching networks are related to the Q of the components and associated printed circuit board loss. G o is typically fairly low at higher frequencies and increases as frequency is lowered. Larger gate width devices will typically have a lower G o as compared to narrower gate width devices. Typically for FETs, the higher G o usually infers that an impedance much higher than 50ý is required for the device to produce F min. At VHF frequencies and even lower L Band frequencies, the required impedance can be in the vicinity of several thousand ohms. Matching to such a high impedance requires very hi-Q compo- nents in order to minimize circuit losses. As an example at 900 MHz, when airwwound coils (Q>100) are used for matching networks, the loss can still be up to 0.25 dB which will add directly to the noise fi gure of the device. Using muiltilayer molded inductors with Qs in the 30 to 50 range results in additional loss over the airwound coil. Losses as high as 0.5 dB or greater add to the typical 0.15 dB F min of the device creating an amplifi er noise fi gure of nearly 0.65 dB. A discussion concerning calculated and measured circuit losses and their eff ect on amplifi er noise fi gure is covered in Avago Technolo- gies Application 1085.
Ordering Information
Part Number No. of Devices Container ATF-54143-TR1G 3000 7” Reel ATF-54143-TR2G 10000 13”Reel ATF-54143-BLKG 100 antistatic bag Package Dimensions Outline 43 (SO%-343/SC70 4 lead) HE D A1b E 1.30 (.051) BSC 1.15 (.045) BSC CL A DIMENSIONS (mm) MIN. 1.15 1.85 1.80 0.80 0.80 0.00 0.15 0.55 0.10 0.10 MAX. 1.35 2.25 2.40 1.10 1.00 0.10 0.40 0.70 0.20 0.46 SYMBOL E D HE A b c L NOTES: 1. All dimensions are in mm. 2. Dimensions are inclusive of plating. 3. Dimensions are exclusive of mold flash & metal burr. 4. All specifications comply to EIAJ SC70. 5. Die is facing up for mold and facing down for trim/form, ie: reverse trim/form. 6. Package surface to be mirror finish. Recommended PCB Pad Layout for Avago’ s SC70 4L/SOT-343 Products 1.30 (0.051) 0.60 (0.024) 0.9 (0.035) Dimensions in mm (inches) 1.15 (0.045) 2.00 (0.079) 1.00 (0.039)
For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. Obsoletes AV01-0620EN AV02-0488EN - June 8, 2012 P Po P2 F W C D E Ao 10 MAX. t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS) 10 MAX. Bo Ko DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES) LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER Ao Bo Ko P 2.40 ± 0.10 2.40 ± 0.10 1.20 ± 0.10 4.00 ± 0.10 1.00 + 0.25 0.094 ± 0.004 0.094 ± 0.004 0.047 ± 0.004 0.157 ± 0.004 0.039 + 0.010 CAVITY DIAMETER PITCH POSITION D Po E 1.55 ± 0.10 4.00 ± 0.10 1.75 ± 0.10 0.061 + 0.002 0.157 ± 0.004 0.069 ± 0.004 PERFORATION WIDTH THICKNESS W 8.00 + 0.30 - 0.10 0.254 0.02 0.315 + 0.012 0.0100 ± 0.0008 CARRIER TAPE CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION) F 3.50 ± 0.05 2.00 ± 0.05 0.138 ± 0.002 0.079 ± 0.002 DISTANCE WIDTH TAPE THICKNESS C Tt 5.40 ± 0.10 0.062 ± 0.001 0.205 + 0.004 0.0025 ± 0.0004 COVER TAPE Tape Dimensions For Outline 4T Device Orientation USER FEED DIRECTION COVER TAPE CARRIER TAPE REEL END VIEW 8 mm 4 mm TOP VIEW 4Fx 4Fx4Fx4Fx