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Technical content

Features

 Single voltage operation  High linearity and P1dB  Low noise fi gure  Excellent uniformity in product specifi cations  Small package size: 2.0 x 2.0 x 0.75 mm  Point MTTF > 300 years [2]  MSL-1 and lead-free  Tape-and-reel packaging option available Specifi cations 2 GHz; 4.5V, 200 mA (Typ.)  41.7 dBm output IP3  30 dBm output power at 1 dB gain compression  1.4 dB noise fi gure  14.8 dB gain  12.1 dB LFOM [4]  69% PAE

Applications

 Front-end LNA Q2 and Q3 driver or pre-driver amplifi er for Cellular/PCS and WCDMA wireless infrastructure  Driver amplifi er for WLAN, WLL/RLL and MMDS  General purpose discrete E-pHEMT for other high linearity applications

Description

Avago Technologies’s ATF-511P8 is a single-voltage high linearity, low noise E-pHEMT housed in an 8-lead JEDEC- standard leadless plastic chip carrier (LPCC [3]) package. The device is ideal as a high linearity, low-noise, medium- power amplifi er. Its operating frequency range is from 50 MHz to 6 GHz. The thermally effi cient package measures only 2 mm x 2 mm x 0.75 mm. Its backside metalization provides excellent thermal dissipation as well as visual evidence of solder refl ow. The device has a Point MTTF of over 300 years at a mounting temperature of +85°C. All devices are 100% RF & DC tested. Notes: 1. Enhancement mode technology employs a single positive V gs, eliminating the need of negative gate voltage associated with conventional depletion mode devices. 2. Refer to reliability datasheet for detailed MTTF data. 3. Conforms to JEDEC reference outline MO229 for DRP-N. 4. Linearity Figure of Merit (LFOM) is essentially OIP3 divided by DC bias power.

TA = 25°C, DC bias for RF parameters is Vds = 4.5V and Ids = 200 mA unless otherwise specifi ed. Symbol Parameter and Test Condition Units Min. Typ. Max.

  1. Measurements obtained using production test board described in Figure 6 and PAE tested at P1dB condition.
  2. I ) 2 GHz OIP3 test condition: F1 = 2.0 GHz, F2 = 2.01 GHz and Pin = -5 dBm per tone.

II ) 900 MHz OIP3 test condition: F1 = 900 MHz, F2 = 910 MHz and Pin = -5 dBm per tone.

  1. Use proper bias, board, heatsink and derating designs to ensure maximum channel temperature is not exceeded. See absolute ma ximum

ratings and application note for more details.

50 Ohm

Figure 6. Block diagram of the 2 GHz production test board used for NF , Gain, OIP3 , P1dB and PAE and ACLR measurements. This circuit achieves a trade- off between optimal OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements.

Figure 7. Simplifi ed schematic of production test board. Primary purpose is to show 15 Ohm series resistor placement in gate supply. Transmission line tapers, tee intersections, bias lines and parasitic values are not shown.

110 Ohm

15 Ohm

may increase or decrease depending on amount of RF drive. Figure 8. OIP3 vs. IDS and VDS at 2 GHz.

3 V IDS (mA)

Figure 9. OIP3 vs. IDS and VDS at 900 MHz. Figure 10. P1dB vs. IDS and VDS at 2 GHz. Figure 11. P1dB vs. IDS and VDS at 900 MHz. Figure 12. Gain vs. IDS and VDS at 2 GHz. Figure 13. Gain vs. IDS and VDS at 900 MHz. Figure 14. PAE vs. IDS and VDS at 2 GHz. Figure 15. PAE vs. IDS and VDS at 900 MHz.

3 V FREQUENCY (GHz)

Figure 16. OIP3 vs. Temp and Freq.OIP3 (dBm)

may increase or decrease depending on amount of RF drive. Figure 17. P1dB vs. Temp and Freq.P1dB (dBm) Figure 18. Gain vs. Temp and Freq.GAIN (dB) Figure 19. PAE vs. Temp and Freq.PAE (%) Figure 20. OIP3 vs. IDS and VDS at 2 GHz. Figure 21. OIP3 vs. IDS and VDS at 900 MHz. Figure 22. P1dB vs. IDS and VDS at 2 GHz. Figure 23. P1dB vs. IDS and VDS at 900 MHz. Figure 24. Gain vs. IDS and VDS at 2 GHz. Figure 25. Gain vs. IDS and VDS at 900 MHz.

may increase or decrease depending on amount of RF drive. Figure 26. PAE vs. IDS and VDS at 2 GHz. Figure 27. PAE vs. IDS and VDS at 900 MHz. Figure 28. OIP3 vs. Temp and Freq.OIP3 (dBm) Figure 29. P1dB vs. Temp and Freq.P1dB (dBm) Figure 30. Gain vs. Temp and Freq.GAIN (dB) Figure 31. PAE vs. Temp and Freq.PAE (%)

  1. S parameter is measured on a microstrip

plane is at the end of the drain lead. Figure 32. MSG/MAG & |S21|2

Figure 33. MSG/MAG & |S21|2

  1. S parameter is measured on a microstrip

plane is at the end of the drain lead.

Figure 34. MSG/MAG & |S21|2

  1. S parameter is measured on a microstrip

plane is at the end of the drain lead.

Figure 35. MSG/MAG & |S21|2

  1. S parameter is measured on a microstrip

plane is at the end of the drain lead.

Figure 36. MSG/MAG & |S21|2

  1. S parameter is measured on a microstrip

plane is at the end of the drain lead.

2 x 2 LPCC (JEDEC DFP-N) Package Dimensions

Ordering Information

Part Number No. of Devices Container ATF-511P8-TR1 3000 7” Reel ATF-511P8-TR2 10000 13”Reel ATF-511P8-BLK 100 antistatic bag Device Models Refer to Avago’s Web Site www.Avagotech.com/view/rf D E A P e pin1 R L b DIMENSIONS ARE IN MILLIMETERS DIMENSIONS MIN. 0.70

0.203 REF

0.225 1.9 0.65 1.9 1.45

0.50 BSC

0.20 0.35 NOM. 0.75 0.02 0.25 2.0 0.80 2.0 1.6 0.25 0.40 MAX. 0.80 0.05 0.275 2.1 0.95 2.1 1.75 0.30 0.45 SYMBOL A b D E e P L pin1 1PX Top View End ViewSide View Bottom View A A1

PCB Land Pattern and Stencil Design 2.80 (110.24) 0.70 (27.56) 0.25 (9.84) 0.25 (9.84) 0.50 (19.68) 0.28 (10.83) 0.60 (23.62) φ0.20 (7.87) PIN 1 Soldermask RF transmission line 0.80 (31.50) 0.15 (5.91) 0.55 (21.65) 1.60 (62.99) 2.72 (107.09) 0.63 (24.80) 0.22 (8.86) 0.32 (12.79) 0.50 (19.68) 0.25 (9.74) 0.63 (24.80) Stencil Layout (top view)PCB Land Pattern (top view) Notes: Typical stencil thickness is 5 mils. Measurements are in millimeters (mils). 0.72 (28.35) PIN 1 1.54 (60.61) USER FEED DIRECTION COVER TAPE CARRIER TAPE REEL 8 mm 4 mm 1PX1PX1PX1PX

For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2012 Avago Technologies. All rights reserved. Obsoletes 5989-0003EN AV02-3620EN - June 14, 2012 Tape Dimensions P0P F W E 10° Max DESCRIPTION SYMBOL SIZE (mm) SIZE (inches) LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER P 2.30 ± 0.05 2.30 ± 0.05 1.00 ± 0.05 4.00 ± 0.10 1.00 + 0.25 0.091 ± 0.004 0.091 ± 0.004 0.039 ± 0.002 0.157 ± 0.004 0.039 + 0.002 CAVITY DIAMETER PITCH POSITION D E 1.50 ± 0.10 4.00 ± 0.10 1.75 ± 0.10 0.060 ± 0.004 0.157 ± 0.004 0.069 ± 0.004 PERFORATION WIDTH THICKNESS W 8.00 + 0.30 0.254 ± 0.02 0.315 ± 0.012 8.00 – 0.10 0.315 ± 0.004 0.010 ± 0.0008 CARRIER TAPE CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION) F 3.50 ± 0.05 2.00 ± 0.05 0.138 ± 0.002 0.079 ± 0.002 DISTANCE WIDTH TAPE THICKNESS C Tt 5.4 ± 0.10 0.062 ± 0.001 0.205 ± 0.004 0.0025 ± 0.0004 COVER TAPE D Tt 10° Max