ATF-50189 AVAGO | Alldatasheet
Document overview
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- PDF pages: 22
Technical content
Features
- High Linearity and P1dB
- Low Noise Figure
- Excellent uniformity in product specifications
- SOT 89 standard package
- Point MTTF > 300 years [2]
- MSL-2 and lead-free
- Tape-and-Reel packaging option available Specifications 2 GH, 4.5V, 280 mA (Typ.)
- 45 dBm Output IP3
- 29 dBm Output Power at 1dB gain compression
- 1.1 dB Noise Figure
- 15.5 dB Gain
- 62% PAE at P1dB
- LFOM [4] 14 dB
Applications
- Front-end LNA Q2 and Q3, Driver or Pre-driver Amplifier for Cellular/PCS and WCDMA wireless infrastructure
- Driver Amplifier for WLAN, WLL/RLL and MMDS
- General purpose discrete E-pHEMT for other high linearity applications 0GX Top View RFin GND RFout #1 #2 #3 Bottom View RFout GND RFin #3 #2 #1
Description
Avago Technologies’s ATF-50189 is a high linearity, medi- um power, low noise E-pHEMT FET packaged in a low cost surface mount SOT89[3] package. The combination of low noise figure and high output IP3 at the same bias point makes it ideal for receiver and transmitter application. Its operating frequency range is from 400 MHz to 3.9 GHz. The ATF-50189 is ideally suited for Cellular/PCS and WCD- MA wireless infrastructure, WLAN, WLL and MMDS appli - cation, and general purpose discrete E-pHEMT amplifiers which require high linearity and power. All devices are 100% RF and DC tested. Notes: 1. Enhancement mode technology employs a single positive Vgs, eliminating the need of negative gate voltage associated with conventional depletion mode devices. 2. Refer to reliability datasheet for detailed MTTF data 3. Conform to JEDEC reference outline MO229 for DRP-N 4. Linearity Figure of Merit (LFOM) is OIP3 divided by DC bias power Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model (Class A) ESD Human Body Model (Class 1C) Refer to Avago Application Note A004R: Electrostatic Discharge Damage and Control. Pin Connections and Package Marking
Symbol Parameter Units Maximum VDS Drain–Source Voltage[2] V7 VGS Gate–Source Voltage[2] V -5 to 0.8 VGD Gate Drain Voltage[2] V -5 to 1 IDS Drain Current[2] A1 IGS Gate Current mA 12 Pdiss Total Power Dissipation[3] W 2.25 Pin RF Input Power dBm 30 TCH Channel Temperature °C 150 TSTG Storage Temperature °C -65 to 150 Notes: 1. Operation of this device above any one of these parameters may cause permanent damage. 2. Assumes DC quiescent conditions. 3. Board (package belly) temperature T B is 25°C. Derate 35 mW/°C for TB > 85°C. 4. Channel-to-board thermal resistance measured using 150°C Liquid Crystal Measurement method. TA = 25°C, DC bias for RF parameters is Vds = 4.5V and Ids = 280 mA unless otherwise specified. Symbol Parameter and T est Condition Units Min. Typ. Max. Vgs Operational Gate Voltage Vds = 4.5V, Ids = 280 mA V 0.37 0.53 0.72 Vth Threshold Voltage Vds = 4.5V, Ids = 32 mA V — 0.38 — Idss Saturated Drain Current Vds = 4.5V, Vgs = 0V μA — 4.1 — Gm Transconductance Vds = 4.5V, Gm = ΔIds/ΔVgs; mmho 175 2294 — ΔVgs = Vgs1 – Vgs2 Vgs1 = 0.55V, Vgs2 = 0.5V Igss Gate Leakage Current Vds = 0V, Vgs = -4.5V μA — 13.8 60 NF Noise Figure[1] f = 2 GHz dB — 1.1 — f = 900 MHz dB — 1.0 — G Gain[1] f = 2 GHz dB 14 15.5 17 f = 900 MHz dB — 21.5 — OIP3 Output 3 rd Order Intercept Point[1,2] f = 2 GHz dBm 43 45 — f = 900 MHz dBm — 44 — P1dB Output Power at 1dB Compression Point [1] f = 2 GHz dBm 27 29 — f = 900 MHz dBm — 28.5 — PAE Power Added Efficiency [1] at P1dB f = 2 GHz % 45 62 — f = 900 MHz % — 49 — ACLR Adjacent Channel Leakage Offset BW = 5 MHz dBc — 60.0 — Power Ratio[1,3] Offset BW = 10 MHz dBc — 67.8 — Notes: 1. Measurements at 2 GHz obtained using production test board described in Figure 1 while measurement at 900 MHz obtained from do uble stub tuners. 2. i ) 2 GHz OIP3 test condition: F1 = 2 GHz, F2 = 2.005 GHz and Pin = -5 dBm per tone. ii ) 900 MHz OIP3 test condition: F1 = 900 MHz, F2 = 905 MHz and Pin = -5 dBm per tone. 3. ACLR test spec is based on 3GPP TS 25.141 V5.3.1 (2002-06) - T est Model 1 - Active Channels: PCCPCH + SCH + CPICH + PICH + SCCPCH + 64 DPCH (SF=128) - Freq = 2140 MHz - Pin = -5 dBm - Channel Integrate Bandwidth = 3.84 MHz Thermal Resistance[2,4] θch_b = 29°C/W
- Typical describes additional product performance information that is not covered by the product warranty.
Figure 6. Typical IV curve.
- S parameter is measured on a microstrip line
Figure 31. MSG/MAG & |S21|2 vs Frequency
- S parameter is measured on a microstrip line
Figure 32. MSG/MAG & |S21|2 vs Frequency
- S parameter is measured on a microstrip line
Figure 33. MSG/MAG & |S21|2 vs Frequency
- S parameter is measured on a microstrip line
Figure 34. MSG/MAG & |S21|2 vs Frequency
- S parameter is measured on a microstrip line
Figure 35. MSG/MAG & |S21|2 vs Frequency
- S parameter is measured on a microstrip line
Figure 36. MSG/MAG & |S21|2 vs Frequency
- S parameter is measured on a microstrip line
Figure 37. MSG/MAG & |S21|2 vs Frequency
- S parameter is measured on a microstrip line
Figure 38. MSG/MAG & |S21|2 vs Frequency
- S parameter is measured on a microstrip line
Figure 39. MSG/MAG & |S21|2 vs Frequency
Device Models, PCB Layout and Stencil Device Refer to Avago’s Web Site: www.avagotech.com/view/rf
Ordering Information
Part Number No. of Devices Container ATF-50189-BLK 100 7” Tape/Reel ATF-50189-TR1 3000 13” Tape/Reel Dimensions in mm Dimensions in inches Symbols Minimum Nominal Maximum Minimum Nominal Maximum E 3.94 - 4.25 0.155 - 0.167 MATTE FINISH POLISH POLISH D E L b e e1S C b1 b A OR 1.24 1.23 0.77
0.2 HALF ETCHING
1.625 2.35 DEPTH 0.100 E D E L e e1S OR
NOTES: 1. 10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE ±0.2 2. CAMBER IN COMPLIANCE WITH EIA 481 3. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE 12.0 ± .3 Ao = 4.60 Bo = 4.90 Ko = 1.90 5.50 ± .05 SEE NOTE 3 1.75 ± .10 8.00 Ø 1.5 +0.1/-0.0 2.00 ± .05 SEE NOTE 3
4.00 SEE NOTE 1
Ø 1.50 MIN. Ao Ko R 0.3 TYP . R 0.3 MAX. 0.30 ± .05 A A Bo USER FEED DIRECTION COVER TAPE CARRIER TAPE REEL 0GX 0GX 0GX 0GX
For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. AV02-0049EN - November 11, 2013 Reel Dimensions – 13” Reel Ø 20.2 M IN 2.0 ± 0.5 Ø 13.0 +0.5 -0.2 102.0 REF 330.0 REF 8.4(MEASURED AT HUB) (MEASURED AT HUB) "A" ATTENTION Electrostatic Sensitive Devices Safe Handling Required MINNEAPOLIS USA U.S PAT 4726534 R LOKREEL R 11.1 MAX. Detail "A" Detail "B" PS PS 1.5
88 REF
96.5 +0.3 - 0.2 Dimensions in mm