ATA6561_14 ATMEL | Alldatasheet
Document overview
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Technical content
Features
- Fully ISO 11898-2,-5, SAE J2284 compliant
- CAN FD ready
- Communication speed up to 5Mbit/s
- Low electromagnetic emission (EME) and high electromagnetic immunity (EMI)
- Differential receiver with wide common mode range
- Atmel ATA6560: Silent mode (receive only)
- Remote wake-up capability via CAN bus
- Functional behavior predictable under all supply conditions
- Transceiver disengages from the bus when not powered up
- RXD recessive clamping detection
- High electrostatic discharge (ESD) handling capability on the bus pins
- Bus pins protected against transients in automotive environments
- Transmit data (TXD) dominant time-out function
- Undervoltage detection on VCC and VIO pins
- CANH/CANL short-circuit and overtemperature protected
- Qualified according to AEC-Q100
- Packages: SO8, DFN8 with wettable flanks (Moisture Sensitivity Level 1)
Description
The Atmel® ATA6560/ATA6561 is a high-speed CAN transceiver that provides an interface between a controller area network (CAN) protocol controller and the physical two-wire CAN bus. The transceiver is designed for high-speed (up to 5Mbit/s) CAN applications in the automotive industry, providing differential transmit and receive capability to (a microcon- troller with) a CAN protocol controller. It offers improved electromagnetic compatibility (EMC) and electrostatic discharge (ESD) performance, as well as features such as:
- Ideal passive behavior to the CAN bus when the supply voltage is off
- Direct interfacing to microcontrollers with supply voltages from 3V to 5V (ATA6561) ATA6560/ATA6561 High-speed CAN Transceiver with Standby Mode CAN FD Ready DATASHEET
Figure 1. Block Diagram
- HSC: High-speed comparator
3ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 1. Pin Configuration Figure 1-1. SO8 Pinning Figure 1-2. DFN8 Pinning Table 1-1. Pin Description Pin Symbol Function
1 TXD Transmit data input
2 GND Ground supply
3 VCC Supply voltage
4 RXD Receive data output; reads out data from the bus lines
5(1) VIO Supply voltage for I/O level adapter; only in the Atmel ATA6561 5(1) NSIL Silent mode control input (low active); only in the Atmel ATA6560
6 CANL Low-level CAN bus line
7 CANH High-level CAN bus line
8 STBY Standby mode control input
Backside(2) - Heat slug, internally connected to the GND pin Notes: 1. The function of pin 5 depends on the version: Atmel ATA6561: VIO; Atmel ATA6560: NSIL (the VIO line and the VCC line are internally connected) 2. Only for the DFN8 package TXD GND VCC ATA6561 RXD STBY CANH CANL VIO TXD GND VCC ATA6560 RXD STBY CANH CANL NSIL STBY CANL CANH VIO TXD VCC GND RXD ATA6561 STBY CANL CANH NSIL TXD VCC GND RXD ATA6560
ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 2. Functional Description The Atmel® ATA6560/ATA6561 is a stand-alone high-speed CAN transceiver compliant with the ISO 11898-2 and 11898-5 CAN standard. It provides a very low current consumption in standby mode and wake-up capability via the CAN bus. There are two versions available, only differing in the function of pin 5:
- Atmel ATA6561: The pin 5 is the VIO pin and should be connected to the microcontroller supply voltage. This allows direct interfacing to microcontrollers with supply voltages down to 3V and adjusts the signal levels of the TXD, RXD, and STBY pins to the I/O levels of the microcontroller. The I/O ports are supplied by the VIO pin.
- Atmel ATA6560: The pin 5 is the control input for silent mode NSIL allowing the ATA6560 to only receive data but not send data via the bus. The output driver stage is disabled. The VIO line and the VCC line are internally connected, this sets the signal levels of the TXD, RXD, STBY, and NSIL pins to levels compatible with 5V microcontrollers.
2.1 Operating Modes
The Atmel ATA6561 supports three operating modes: unpowered, standby and normal. The Atmel ATA6560 additionally has the silent mode. These modes can be selected via the STBY and NSIL pins. See Figure 2-1 and Table 2-1 for a description of the operating modes. Figure 2-1. Operating Modes Note: For the Atmel ATA6561 NSIL is internally set to “1”. Table 2-1. Operating Modes Mode Inputs Outputs STBY NSIL Pin TXD CAN Driver Pin RXD Unpowered x(3) x(3) x(3) Recessive Recessive Standby HIGH x(3) x(3) Recessive Active(4) Silent (ATA6560) LOW LOW x(3) Recessive Active(1) Normal LOW HIGH(2) LOW Dominant LOW LOW HIGH(2) HIGH Recessive HIGH Notes: 1. LOW if the CAN bus is dominant, HIGH if the CAN bus is recessive. 2. Internally pulled up if not bonded out. 3. Irrelevant 4. Reflects the bus only for wake-up VCC < Vuvd(VCC) VCC < Vuvd(VCC) STBY = 1 STBY = 1 STBY = 0 and NSIL = 1 and STBY = 0 and (NSIL = 0 or TXD = 0) STBY = 0 and TXD = 0 NSIL = 1 and TXD = 1 and Error = 0 NSIL = 0 or Error = 1 TXD = 1 and Error = 0 VCC > V uvd(VCC) VCC < Vuvd(VCC)Unpowered Mode Standby Mode Silent Mode Normal Mode VCC < Vuvd(VCC) or STBY = 1 STBY = 0 and TXD = 1 and Error = 0 and TXD = 1 * Silent Mode is externally not accessible Error = 1 Error = 0 VCC < Vuvd(VCC) or VIO < Vuvd(VIO) VIO < Vuvd(VIO) VCC < Vuvd(VCC) or VCC > V uvd(VCC) and VIO < Vuvd(VIO) VIO > Vuvd(VIO) Unpowered Mode Standby Mode Silent Mode Normal Mode ATA6560 ATA6561 STBY = 1
5ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14
2.1.1 Normal Mode
A low level on the STBY pin together with a high level on pins TXD and NSIL selects the normal mode. In this mode the transceiver is able to transmit and receive data via the CANH and CANL bus lines (see Figure 1 on page 2). The output driver stage is active and drives data from the TXD input to the CAN bus. The high-speed comparator (HSC) converts the analog data on the bus lines into digital data which is output to pin RXD. The bus biasing is set to VCC/2 and the undervoltage monitoring of VCC is active. The slope of the output signals on the bus lines is controlled and optimized in a way that guarantees the lowest possible electromagnetic emission (EME). To switch the device in normal operating mode, set the STBY pin to low and the TXD pin and the NSIL pin (if applicable) to high (see Table 2-1 on page 4, Figure 2-2 and Figure 2-3). The STBY and the NSIL pins each provide a pull-up resistor to VIO, thus ensuring defined levels if the pins are open. Please note that the device cannot enter Normal Mode as long as TXD is at ground level. Atmel® ATA6560 will only switch to normal mode when all inputs are set accordingly. The switching into normal mode is depicted in the following two figures. Figure 2-2. Switching from Standby Mode to Normal Mode (NSIL = High) Figure 2-3. Switching from Silent Mode to Normal Mode STBY TXD Standby Mode tdel(stby-norm) = 47µs max Normal Mode t t t Operation Mode STBY NSIL TXD Silent Mode tdel(sil-norm) = 10µs max Normal Mode t t t t Operation Mode
ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14
2.1.2 Silent Mode (Only with the Atmel ATA6560)
A low level on the NSIL pin (available on pin 5) and on the STBY pin selects silent mode. This receive-only mode can be used to test the connection of the bus medium. In silent mode the Atmel ATA6560 can still receive data from the bus, but the transmitter is disabled and therefore no data can be sent to the CAN bus. The bus pins are released to recessive state. All other IC functions, including the high-speed comparator (HSC), continue to operate as they do in normal mode. Silent mode can be used to prevent a faulty CAN controller from disrupting all network communications.
2.1.3 Standby Mode
A high level on the STBY pin selects standby mode. In this mode the transceiver is not able to transmit or correctly receive data via the bus lines. The transmitter and the high-speed comparator (HSC) are switched off to reduce current consumption and only the low- power wake-up comparator (WUC) monitors the bus lines for a valid wake-up signal. A signal change on the bus from “Recessive” to “Dominant” followed by a dominant state longer than t wake switches the RXD pin to low to signal a wake-up request to the microcontroller. In standby mode the bus lines are biased to ground to reduce current consumption to a minimum. The wake-up comparator (WUC) monitors the bus lines for a valid wake-up signal. When the RXD pin switches to low to signal a wake-up request, a transition to normal mode is not triggered until the STBY pin is forced back to low by the microcontroller. A bus dominant time-out timer prevents the device from generating a permanent wake-up request by switching the RXD pin to high. For Atmel® ATA6560 only: In the event the NSIL input pin is set to low in standby mode, the internal pull-up resistor causes an additional quiescent current from VIO to GND. Atmel therefore recommends setting the NSIL pin to high in standby mode.
2.2 Fail-safe Features
2.2.1 TXD Dominant Time-Out Function
A TXD dominant time-out timer is started when the TXD pin is set to LOW. If the LOW state on the TXD pin persists for longer than tto(dom)TXD, the transmitter is disabled, releasing the bus lines to recessive state. This function prevents a hardware and/or software application failure from driving the bus lines to a permanent dominant state (blocking all network communications). The TXD dominant time-out timer is reset when the TXD pin is set to HIGH (≥ 4µs).
2.2.2 Internal Pull-Up Structure at the TXD, NSIL, and STBY Input Pins
The TXD, STBY, and NSIL pins have an internal pull-up to VIO. This ensures a safe, defined state in case one or all of these pins are left floating. Pull-up currents flow in these pins in all states, meaning all pins should be in high state during standby mode to minimize the current consumption.
2.2.3 Undervoltage Detection on Pins VCC and VIO
If VVCC or VVIO drop below their respective undervoltage detection levels (Vuvd(VCC) and Vuvd(VIO) (see Section 6. “Electrical Characteristics” on page 9), the transceiver switches off and disengages from the bus until VVCC and VVIO have recovered. The low-power wake-up comparator is only switched off during a VCC or VIO undervoltage. The logic state of the STBY pin is ignored until the VCC voltage or the VIO voltage has recovered.
2.2.4 Bus Wake-up Time-out Function
In standby mode a bus wake-up time-out timer is started when the CAN bus changes from recessive to dominant state. If the dominant state on the bus persists for longer than tto_bus, the RXD pin is switched to HIGH. this function prevents a clamped dominant bus (due to a bus short-circuit or a failure in one of the other nodes on the network) from generating a permanent wake-up request. The bus wake-up time-out timer is reset when the CAN bus changes from dominant to recessive state.
2.2.5 Overtemperature Protection
The output drivers are protected against overtemperature conditions. If the junction temperature exceeds the shutdown junction temperature, TJsd, the output drivers are disabled until the junction temperature drops below TJsd and pin TXD is at high level again. The TXD condition ensures that output driver oscillations due to temperature drift are avoided.
7ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 Figure 2-4. Release of Transmission after Overtemperature Condition
2.2.6 Short-Circuit Protection of the Bus Pins
The CANH and CANL bus outputs are short-circuit protected, either against GND or a positive supply voltage. A current- limiting circuit protects the transceiver against damage. If the device is heating up due to a continuous short on CANH or CANL, the internal overtemperature protection switches the bus transmitter off.
2.2.7 RXD Recessive Clamping
This fail-safe feature prevents the controller from sending data on the bus if it’s RXD line is clamped to HIGH (e.g., recessive). That is, if the RXD pin cannot signalize a dominant bus condition because it is e.g, shorted to VCC, the transmitter within ATA6560/ATA6561 is disabled to avoid possible data collisions on the bus. In normal and silent mode (only ATA6560), the device permanently compares the state of the high-speed comparator (HSC) with the state of the RXD pin. If the HSC indicates a dominant bus state for more than tRC_det without the RXD pin doing the same, a recessive clamping situation is detected and the device is forced into silent mode. This fail-safe mode is released by either entering standby or unpowered mode or if the RXD pin is showing a dominant (e.g., LOW) level again. Figure 2-5. RXD Recessi ve Clamping Detection Failure Overtemp GND TXD Overtemperature RD R t t t OT BUS VDIFF (CANH-CANL) VIO RDD t t RXD VIO GND CAN TXD RXD Operation Mode Normal Normal Silent If the clamping condition is removed and a dominant bus is detected, the transceiver goes back to normal mode.
ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 3. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Condition Symbol Min. Max. Unit CANH, CANL DC voltage Transient voltage, according to ISO 7637 part 2 VCANH, VCANL –27 –150 +42 +100 V V DC voltage on all other pins VX –0.3 +5,5 V ESD according to IBEE LIN EMC Test spec. 1.0 following IEC 61000-4-2 - Pin CANH, CANL ±8 kV ESD (HBM following STM5.1 with 1.5kΩ/100pF) - Pin CANH, CANL to GND ±6 kV Component Level ESD (HBM acc. ANSI/ESD STM5.1) JESD22-A114 AEC-Q100 (002) ±4 kV CDM ESD STM 5.3.1 ±750 V ESD machine model AEC-Q100-RevF(003) ±200 V Operating range for junction temperature Tj –40 +150 °C Storage temperature Tstg –55 +150 °C 4. Thermal Characteristics SO8 Parameters Symbol Min. Typ. Max. Unit Thermal resistance junction to ambient RthJA 145 K/W Thermal shutdown of the bus drivers TJsd 150 175 195 °C 5. Thermal Characteristics DFN8 Parameters Symbol Min. Typ. Max. Unit Thermal resistance junction to heat slug RthJC 10 K/W Thermal resistance junction to ambient, where heat slug is soldered to PCB according to JEDEC RthJA 50 K/W Thermal shutdown of the bus drivers TJsd 150 175 195 °C
9ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 6. Electrical Characteristics Tj = –40°C to +150°C; VCC = 4.5V to 5.5V; VIO = 2.8V to 5.5V; RL = 60Ω, CL = 100pF unless specified otherwise; all voltages are defined in relation to ground; positive currents flow into the IC. No. Parameters Test Conditions Symbol Min. Typ. Max. Unit Type*
1 Supply, Pin VCC
1.1 Supply voltage VCC 4.5 5.5 V A 1.2 Supply current in silent mode Silent mode, VTXD = VVIO IVCC_sil 1.9 2.5 3.0 mA A
1.3 Supply current in normal
- recessive, VTXD = VVIO - dominant, VTXD = 0V IVCC_rec IVCC_dom 20 50 mA mA A
1.4 Supply current in STBY
VCC = VIO, VTXD = VNSIL = VIO Ta = 25°C IVCC_STBY IVCC_STBY 7 12 µA µA A D
1.5 Undervoltage detection
threshold on pin VCC Vuvd(VCC) 2.75 4.5 V A 2. I/O Level Adapter Supply, Pin VIO(1) (only with the Atmel ATA6561) 2.1 Supply voltage on pin VIO VVIO 2.8 5.5 V A
2.2 Supply current on pin VIO
- recessive, VTXD = VVIO - dominant, VTXD = 0V STBY mode IIO_rec IIO_rdom IIO_STBY 350 250 500 µA µA µA A A A
2.3 Undervoltage detection
Vuvd(VIO) 1.3 2.7 V A
3 Mode Control Input, Pin NSIL and STBY
3.1 High-level input voltage VIH 0.7 × VVIO VVIO + 0.3 V A 3.2 Low-level input voltage VIL –0.3 0.3 × VVIO V A
3.3 Pull- up resistor to VIO VSTBY = 0V
VNSIL=0V Rpu 75 125 175 kΩ A
3.4 High-level leakage current VSTBY = VVIO
VNSIL = VVIO IL –2 +2 µA A
4 CAN Transmit Data Input, Pin TXD
4.1 High-level input voltage VIH 0.7 × VVIO VVIO + 0.3 V A 4.2 Low-level input voltage VIL –0.3 0.3 × VVIO V A
4.3 Pull-up resistor to VIO VTXD = 0V RTXD 20 35 50 kΩ A
4.4 High-level leakage current Normal mode, VTXD = VVIO ITXD –2 +2 µA A
4.5 Input capacitance CTXD 5 10 pF D
5 CAN Receive Data Output, Pin RXD
5.1 High-level output current Normal mode, VRXD = VVIO – 0.4V, VVIO = VVCC IOH –8 –1 mA A 5.2 Low-level output current Normal mode, VRXD = 0.4V, bus dominant IOL 2 12 mA A
6 Bus Lines, Pins CANH and CANL
6.1 Dominant output voltage
VTXD = 0V, T < tto(dom)TXD - pin CANH - pin CANL IIO 2.75 0.5 3.5 1.5 4.5 2.25 V V A
6.2 Transmitter dominant
voltage symmetry Vdom(TX)sym = VVCC – VCANH – VCANL Vdom(TX)sym –400 +400 mV A *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Only for Atmel ATA6560; otherwise the va lues are part of the VCC pin specification.
ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14
6.3 Bus differential output
VTXD = 0V, T < tto(dom)TXD RL = 45Ω to 65Ω VVCC=4.75V to 5.25V VTXD = VVIO, receive, no load VO(dif)bus 1.5 –50 +50 V mV A
6.4 Recessive output voltage Normal and silent modes,
VTXD =V VIO, no load VO(rec) 2 0.5 x VVCC 3 V A
6.5 Differential receiver
threshold voltage (HSC) Normal and silent modes, V cm(CAN) = –27V to +27V Vth(RX)dif 0.5 0.7 0.9 V A
6.6 Differential receiver
hysteresis voltage (HSC) Normal and silent modes, V cm(CAN) = –27V to +27V Vhys(RX)dif 50 120 200 mV A
6.7 Dominant output current
VTXD = 0V, T < tto(dom)TXD, VVCC = 5V - pin CANH, VCANH = 0V - pin CANL, VCANL = 5V/40V IIO(dom) –100 –35 100 mA mA A
6.8 Recessive output current
Normal and silent modes, VTXD =V VIO, no load, VCANH =V CANL = –27V to +32V IIO(rec) –5 +5 mA A
6.9 Leakage current VVCC =V VIO = 0V,
VCANH =V CANL = 5V IIO(rec) –5 0 +5 µA A
6.10 Input resistance Ri 9 15 28 kΩ A
6.11 Input resistance deviation Between VCANH and VCANL ΔRi –1 0 +1 % A
6.12 Differential input resistance
Ri(dif) 19 30 52 kΩ A Tj < 125°C Ri(dif) 20 30 52 kΩ B
6.13 Common-mode input
capacitance Ci(cm) 20 pF D
6.14 Differential input capacitance Ci(dif) 10 pF D
8 Transceiver Timing, Pins CANH, CANL, TXD, and RXD, see Figure 6-1 and Figure 6-2
8.1 Delay time from TXD to bus
dominant Normal mode td(TXD-busdom) 40 130 ns C
8.2 Delay time from TXD to bus
recessive Normal mode td(TXD-busrec) 40 130 ns C
8.3 Delay time from bus
Normal and silent modes td(busdom- RXD) 20 100 ns C
8.4 Delay time from bus
recessive to RXD Normal and silent modes td(busrec-RXD) 20 100 ns C
8.5 Propagation delay from TXD
tPD(TXD-RXD) 40 200 200 ns ns A A Normal mode RL = 120Ω, CL = 200pF Rising edge at pin TXD Falling edge at pin TXD tPD(TXD-RXD) 300 300 ns ns D D 8.6 TXD dominant time-out time VTXD = 0V, normal mode tto(dom)TXD 0.8 3 ms A 8.7 Bus wake-up time-out time Standby Mode tto_bus 0.8 3 ms A 6. Electrical Characteristics (Continued) Tj = –40°C to +150°C; VCC = 4.5V to 5.5V; VIO = 2.8V to 5.5V; RL = 60Ω, CL = 100pF unless specified otherwise; all voltages are defined in relation to ground; positive currents flow into the IC. No. Parameters Test Conditions Symbol Min. Typ. Max. Unit Type* *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Only for Atmel ATA6560; otherwise the va lues are part of the VCC pin specification.
11ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 Figure 6-1. Timing Test Circuit for the Atmel ATA6560/ATA6561 CAN Transceiver 8.8 Min. dominant time for bus wake-up Standby mode twake 0.75 3 5 µs A
8.9 Delay time for standby to
NSIL = HIGH tdel((stby-norm) 47 µs A
8.10 Delay time for normal mode
to standby mode transition Rising edge at pin STBY NSIL = HIGH tdel(norm-stby) 5 µs D
8.11 Delay time for normal mode
STBY = LOW tdel(norm-sil) 10 µs D
8.12 Delay time for silent mode to
STBY = LOW tdel(sil-norm) 10 µs D
8.13 Delay time for silent mode to
NSIL = LOW tdel(sil-stby) 5 µs D
8.14 Delay time for standby mode
NSIL = LOW tdel(stby-sil) 47 µs D 8.15 Debouncing time for recessive clamping state detection V(CANH-CANL) > 900mV RXD = HIGH tRC_det 90 ns D Transceiver Timing for higher Bit Rates, Pins CANH, CANL, TXD, and RXD, see Figure 6-1 and Figure 6-3 on page 12
8.16 Recessive bit time on pin
Normal mode, tBit(TXD) = 500ns tBit(RXD) 400 550 ns D Normal mode, tBit(TXD) = 200ns tBit(RXD) 120 220 ns A 6. Electrical Characteristics (Continued) Tj = –40°C to +150°C; VCC = 4.5V to 5.5V; VIO = 2.8V to 5.5V; RL = 60Ω, CL = 100pF unless specified otherwise; all voltages are defined in relation to ground; positive currents flow into the IC. No. Parameters Test Conditions Symbol Min. Typ. Max. Unit Type* *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Only for Atmel ATA6560; otherwise the va lues are part of the VCC pin specification. TXD1 +5V 22µF 100nF 15pF RXD CANH GND STBY CANL VIO/NSIL VCC RL CL
13ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 7. Application Circuits Figure 7-1. Typical Applicat ion Circuit Atmel ATA6561 Figure 7-2. Typical Applicat ion Circuit Atmel ATA6560 Note: For DFN8 package: Heat slug must always be connected to GND. CANH 100nF 22µF(1) VIO VCC VDD Microcontroller GND ATA6561 CANHSTBY TXD RXD CANL BAT 12V
6 CANL
3.3V 12V (1) The size of this capacitor depends on the used external voltage regulator. 100nF 4 2
3 CANH
(1) The size of this capacitor depends on the used external voltage regulator. GND 22µF(1) +
ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 8. Ordering Information Extended Type Number Package Remarks ATA6560-GBQW DFN8 CAN transceiver, Pb-free, 6k, taped and reeled ATA6560-GAQW SO8 CAN transceiver, Pb-free, 4k, taped and reeled ATA6561-GBQW DFN8 CAN transceiver, Pb-free, 6k, taped and reeled ATA6561-GAQW SO8 CAN transceiver, Pb-free, 4k, taped and reeled
15ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 9. Package Information Figure 9-1. SO8 Package Drawing Contact: packagedrawings@atmel.com GPC DRAWING NO. REV. TITLE 6.543-5185.01-4 1 05/08/14 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM NOTE MAXSymbol Dimensions in mm specifications according to DIN technical drawings 0.15 0.250.1A1 3.9 43.8E1 0.4 0.50.3b
1.27 BSCe
0.2 0.250.15C 0.65 0.90.4L 66 . 25.8E 4.9 54.8D 1.47 1.551.4A2 1.65 1.81.5A D b e A C E L Pin 1 identity
ATA6560/ATA6561 [DATASHEET] 9288I–AUTO–09/14 Figure 9-2. DFN8 Package Drawing Contact: packagedrawings@atmel.com GPC DRAWING NO. REV. TITLE 6.543-5165.03-4 1 10/11/13 Package: VDFN_3x3_8L Exposed pad 2.4x1.6 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM NOTE MAXSymbol Dimensions in mm specifications according to DIN technical drawings 0.035 0.050A1 33 . 12.9E 0.3 0.350.25b 0.65e 0.4 0.450.35L 1.6 1.71.5E2 2.4 2.52.3D2 33 . 12.9D 0.21 0.260.16A3 0.85 0.90.8A D PIN 1 ID Partially Plated Surface E A b L Z 10:1 Top View Side View Bottom View e Z
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