AT90CAN32 ATMEL | Alldatasheet

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Technical content

Note: This is a summary document. A complete document is available on our web site at www.atmel.com. 1.Features

  • High-performance, Low-power AVR® 8-bit Microcontroller
  • Advanced RISC Architecture – 133 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers – Fully Static Operation – Up to 16 MIPS Throughput at 16 MHz – On-chip 2-cycle Multiplier
  • Non volatile Program and Data Memories – 32K/64K Bytes of In-System Reprogrammable Flash (AT90CAN32/64)
  • Endurance: 10,000 Write/Erase Cycles – Optional Boot Code Section with Independent Lock Bits
  • Selectable Boot Size: 1K Bytes, 2K Bytes, 4K Bytes or 8K Bytes
  • In-System Programming by On-Chip Boot Program (CAN, UART)
  • True Read-While-Write Operation – 1K/2K Bytes EEPROM (Endurance: 100,000 Write/Erase Cycles ) (AT90CAN32/64) – 2K/4K Bytes Internal SRAM (AT90CAN32/64) – Up to 64K Bytes Optional External Memory Space – Programming Lock for Software Security
  • JTAG (IEEE std. 1149.1 Compliant) Interface – Boundary-scan Capabilities According to the JTAG Standard – Programming Flash (Hardware ISP), EEPROM, Lock & Fuse Bits – Extensive On-chip Debug Support
  • CAN Controller 2.0A & 2.0B – 15 Full Message Objects with Separate Identifier Tags and Masks – Transmit, Receive, Automatic Reply and Frame Buffer Receive Modes – 1Mbits/s Maximum Transfer Rate at 8 MHz – Time stamping, TTC & Listening Mode (Spying or Autobaud)
  • Peripheral Features – Programmable Watchdog Timer with On-chip Oscillator – 8-bit Synchronous Timer/Counter-0
  • 10-bit Prescaler
  • External Event Counter
  • Output Compare or 8-bit PWM Output – 8-bit Asynchronous Timer/Counter-2
  • 10-bit Prescaler
  • External Event Counter
  • Output Compare or 8-Bit PWM Output
  • 32Khz Oscillator for RTC Operation – Dual 16-bit Synchronous Timer/Counters-1 & 3
  • 10-bit Prescaler
  • Input Capture with Noise Canceler
  • External Event Counter
  • 3-Output Compare or 16-Bit PWM Output
  • Output Compare Modulation – 8-channel, 10-bit SAR ADC
  • 8 Single-ended Channels
  • 7 Differential Channels
  • 2 Differential Channels With Programmable Gain at 1x, 10x, or 200x – On-chip Analog Comparator – Byte-oriented Two-wire Serial Interface – Dual Programmable Serial USART – Master/Slave SPI Serial Interface
  • Programming Flash (Hardware ISP)
  • Special Microcontroller Features – Power-on Reset and Programmable Brown-out Detection – Internal Calibrated RC Oscillator – 8 External Interrupt Sources – 5 Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down & Standby – Software Selectable Clock Frequency – Global Pull-up Disable
  • I/O and Packages – 53 Programmable I/O Lines – 64-lead TQFP and 64-lead QFN
  • Operating Voltages – 2.7 - 5.5V
  • Operating temperature – Industrial (-40°C to +85°C)
  • Maximum Frequency – 8 MHz at 2.7V - Industrial range – 16 MHz at 4.5V - Industrial range Rev. 7538AS–CAN–09/05 8-bit Microcontroller with 32/64K Bytes of ISP Flash and CAN Controller AT90CAN32 AT90CAN64 Summary

7538AS–CAN–09/05 AT90CAN32/64 2.Description 2.1Comparison Between AT90CAN32/64 and AT90CAN128 AT90CAN32/64 is hardware and software compatible with AT90CAN128, the only difference is the memory size. 2.2Part Desription The AT90CAN32/64 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90CAN32/64 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than con- ventional CISC microcontrollers. The AT90CAN32/64 provides the following features: 32K/64K bytes of In-System Programmable Flash with Read-While-Write capabilities, 1K/2K bytes EEPROM, 2K/4K bytes SRAM, 53 gen- eral purpose I/O lines, 32 general purpose working registers, a CAN controller, Real Time Counter (RTC), four flexible Timer/Counters with compare modes and PWM, 2 USARTs, a byte oriented Two-wire Serial Interface, an 8-channel 10-bit ADC with optional differential input stage with programmable gain, a programmable Watchdog Timer with Internal Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for accessing the On-chip Debug system and programming and five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI/CAN ports and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to main- tain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the Crystal/Resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low power consumption. The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On- chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The boot program can use any interface to download the application program in the application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, Table 2-1. Memory Size Summary DeviceFlashEEPROMRAM AT90CAN3232K Bytes1K Byte2K Bytes AT90CAN6464K Bytes2K Bytes4K Bytes AT90CAN128128K Bytes4K Byte4K Bytes

7538AS–CAN–09/05 AT90CAN32/64 the Atmel AT90CAN32/64 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The AT90CAN32/64 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emula- tors, and evaluation kits.

7538AS–CAN–09/05 AT90CAN32/64 2.3Block Diagram Figure 2-1. Block Diagram PROGRAM COUNTER STACK POINTER PROGRAM FLASH MCU CONTROL REGISTER SRAM GENERAL PURPOSE REGISTERS INSTRUCTION REGISTER TIMER/ COUNTERS INSTRUCTION DECODER DATADIR. REG.PORTB DATADIR. REG.PORTE DATADIR. REG.PORTA DATADIR. REG.PORTD DATAREGISTER PORTB DATAREGISTER PORTE DATAREGISTER PORTA DATAREGISTER PORTD INTERRUPT UNIT EEPROM SPIUSART0 STATUS REGISTER Z Y X ALU PORTB DRIVERS PORTE DRIVERS PORTA DRIVERSPORTF DRIVERS PORTD DRIVERS PORTC DRIVERS PB7 - PB0PE7 - PE0 PA7 - PA0PF7 - PF0 VCC AGND GND AREF CONTROL LINES PC7 - PC0 INTERNAL OSCILLATOR WATCHDOG TIMER 8-BIT DATA BUS AVCC USART1 TIMING AND CONTROL OSCILLATOR OSCILLATOR CALIB. OSC DATADIR. REG.PORTC DATAREGISTER PORTC ON-CHIP DEBUG JTAG TAP PROGRAMMING LOGIC BOUNDARY- SCAN DATADIR. REG.PORTF DATAREGISTER PORTF ADC POR - BOD RESET PD7 - PD0 DATADIR. REG.PORTG DATAREG. PORTG PORTG DRIVERS PG4 - PG0 TWO-WIRE SERIAL INTERFACE CONTROLLER

7538AS–CAN–09/05 AT90CAN32/64 2.4Pin Configurations Figure 2-2. Pinout AT90CAN32/64 - TQFP PC0 (A8) (RXD0 / PDI) PE0 (TXD0 / PDO) PE1 (XCK0 / AIN0) PE2 (OC3A / AIN1) PE3 (OC3B / INT4) PE4 (OC3C / INT5) PE5 (T3 / INT6) PE6 (ICP3 / INT7) PE7 (SS) PB0 (SCK) PB1 (MOSI) PB2 (MISO) PB3 (OC2A) PB4 (OC1B) PB6 (OC1A) PB5 PC1 (A9) PC2 (A10) PC3 (A11) PC4 (A12) PC5 (A13) PC6 (A14) PC7 (A15 / CLKO) PA7 (AD7) PG2 (ALE) PA6 (AD6) PA5 (AD5) PA4 (AD4) PA3 (AD3) PG1 (RD) PG0 (WR) NC = Do not connect (May be used in future devices) (1) Timer2 Oscillator (2) NC (1) (64-lead TQFP top view) INDEX CORNER

7538AS–CAN–09/05 AT90CAN32/64 Figure 2-3. Pinout AT90CAN32/64 - QFN NC = Do not connect (May be used in future devices) (1) Timer2 Oscillator (2) PC0 (A8) VCC GND PF0 (ADC0) PF7 (ADC7 / TDI) PF1 (ADC1) PF2 (ADC2) PF3 (ADC3) PF4 (ADC4 / TCK) PF5 (ADC5 / TMS) PF6 (ADC6 / TDO) AREF GND AVCC (RXD0 / PDI) PE0 (TXD0 / PDO) PE1 (XCK0 / AIN0) PE2 (OC3A / AIN1) PE3 (OC3B / INT4) PE4 (OC3C / INT5) PE5 (T3 / INT6) PE6 (ICP3 / INT7) PE7 (SS) PB0 (SCK) PB1 (MOSI) PB2 (MISO) PB3 (OC2A) PB4 (OC0A / OC1C) PB7 (TOSC2 ) PG3 (OC1B) PB6 (TOSC1 ) PG4 (OC1A) PB5 PC1 (A9) (T0) PD7 PC2 (A10) PC3 (A11) PC4 (A12) PC5 (A13) PC6 (A14) PC7 (A15 / CLKO) PA7 (AD7) PG2 (ALE) PA6 (AD6) PA5 (AD5) PA4 (AD4) PA3 (AD3) PA0 (AD0) PA1 (AD1) PA2 (AD2) (RXCAN / T1) PD6 (TXCAN / XCK1) PD5 (ICP1) PD4 (TXD1 / INT3) PD3 (RXD1 / INT2) PD2 (SDA / INT1) PD1 (SCL / INT0) PD0 XTAL1 XTAL2 RESET GND VCC PG1 (RD) PG0 (WR) 16 33 (2) (2) NC (1) (64-lead QFN top view) INDEX CORNER

7538AS–CAN–09/05 AT90CAN32/64 2.5Pin Descriptions 2.5.1VCC Digital supply voltage. 2.5.2GND Ground. 2.5.3Port A (PA7..PA0) Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the AT90CAN32/64 as listed on I/O-Ports paragraph of the complete Datasheet. 2.5.4Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the AT90CAN32/64 as listed on I/O-Ports paragraph of the complete Datasheet. 2.5.5Port C (PC7..PC0) Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port C also serves the functions of special features of the AT90CAN32/64 as listed on I/O-Ports paragraph of the complete Datasheet. 2.5.6Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D also serves the functions of various special features of the AT90CAN32/64 as listed on I/O-Ports paragraph of the complete Datasheet. 2.5.7Port E (PE7..PE0) Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up

7538AS–CAN–09/05 AT90CAN32/64 resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port E also serves the functions of various special features of the AT90CAN32/64 as listed on I/O-Ports paragraph of the complete Datasheet. 2.5.8Port F (PF7..PF0) Port F serves as the analog inputs to the A/D Converter. Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide internal pull-up resistors (selected for each bit). The Port F output buffers have sym- metrical drive characteristics with both high sink and source capability. As inputs, Port F pins that are externally pulled low will source current if the pull-up resistors are activated. The Port F pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port F also serves the functions of the JTAG interface. If the JTAG interface is enabled, the pull- up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even if a reset occurs. 2.5.9Port G (PG4..PG0) Port G is a 5-bit I/O port with internal pull-up resistors (selected for each bit). The Port G output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port G pins that are externally pulled low will source current if the pull-up resistors are activated. The Port G pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port G also serves the functions of various special features of the AT90CAN32/64 as listed on I/O-Ports paragraph of the complete Datasheet. 2.5.10RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset. The minimum pulse length is given in characteristics. Shorter pulses are not guaranteed to generate a reset. The I/O ports of the AVR are immediately reset to their initial state even if the clock is not running. The clock is needed to reset the rest of the AT90CAN32/64. 2.5.11XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. 2.5.12XTAL2 Output from the inverting Oscillator amplifier. 2.5.13AVCC AVCC is the supply voltage pin for the A/D Converter on Port F. It should be externally con- nected to V CC, even if the ADC is not used. If the ADC is used, it should be connected to V CC through a low-pass filter. 2.5.14AREF This is the analog reference pin for the A/D Converter.

7538AS–CAN–09/05 AT90CAN32/64 3.Register Summary AddressNameBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Comment (0xFF) Reserved (0xFE) Reserved (0xFD) Reserved (0xFC) Reserved (0xFB) Reserved (0xFA) CANMSG MSG 7MSG 6MSG 5MSG 4MSG 3MSG 2MSG 1MSG 0 (0xF9) CANSTMH TIMSTM15TIMSTM14TIMSTM13TIMSTM12 TIMSTM11TIMSTM10TIMSTM9TIMSTM8 (0xF8) CANSTML TIMSTM7TIMSTM6TIMSTM5TIMSTM4TIMSTM3TIMSTM2TIMSTM1TIMSTM0 (0xF7) CANIDM1 IDMSK

28 IDMSK

27 IDMSK

26 IDMSK

25 IDMSK

24 IDMSK

23 IDMSK

22 IDMSK

(0xF6) CANIDM2 IDMSK

20 IDMSK

19 IDMSK

18 IDMSK

17 IDMSK

16 IDMSK

15 IDMSK

14 IDMSK

(0xF5) CANIDM3 IDMSK

12 IDMSK

11 IDMSK

10 IDMSK

9 IDMSK

8 IDMSK

7 IDMSK

6 IDMSK

(0xF4) CANIDM4 IDMSK

4 IDMSK

3 IDMSK

2 IDMSK

1 IDMSK

0RTRMSK – IDEMSK (0xF3) CANIDT1 IDT

28 IDT

27 IDT

26 IDT

25 IDT

24 IDT

23 IDT

22 IDT

(0xF2) CANIDT2 IDT

20 IDT

19 IDT

18 IDT

17 IDT

16 IDT

15 IDT

14 IDT

(0xF1) CANIDT3 IDT

12 IDT

11 IDT

10 IDT

9 IDT

8 IDT

7 IDT

6 IDT

(0xF0) CANIDT4 IDT

4 IDT

3 IDT

2 IDT

1 IDT

(0xEF) CANCDMOB CONMOB1CONMOB0RPLVIDEDLC3DLC2DLC1DLC0 (0xEE) CANSTMOB DLCWTXOKRXOKBERRSERRCERRFERRAERR (0xED) CANPAGE MOBNB3MOBNB2MOBNB1MOBNB0AINC INDX2INDX1INDX0 (0xEC) CANHPMOB HPMOB3HPMOB2HPMOB1HPMOB0CGP3 CGP2CGP 1CGP 0 (0xEB) CANREC REC7REC6REC5REC4REC3REC2REC1REC0 (0xEA) CANTEC TEC7TEC6TEC5TEC4TEC3TEC2TEC1TEC0 (0xE9) CANTTCH TIMTTC15TIMTTC14TIMTTC13TIMTTC12 TIMTTC11TIMTTC10TIMTTC9TIMTTC8 (0xE8) CANTTCL TIMTTC7TIMTTC6TIMTTC5TIMTTC4TIMTTC3TIMTTC2TIMTTC1TIMTTC0 (0xE7) CANTIMH CANTIM15CANTIM14CANTIM13CANTIM12CANTIM11CANTIM10CANTIM9CANTIM8 (0xE6) CANTIML CANTIM7CANTIM6CANTIM5CANTIM4CANTIM3CANTIM2CANTIM1CANTIM0 (0xE5) CANTCON TPRSC7TPRSC6TPRSC5TPRSC4TPRSC3TPRSC2TRPSC1TPRSC0 (0xE4) CANBT3 – PHS22PHS21PHS20PHS12PHS11PHS10SMP (0xE3) CANBT2 – SJW1SJW0 – PRS2PRS1PRS0 – (0xE2) CANBT1 – BRP5BRP4BRP3BRP2BRP1BRP0 – (0xE1) CANSIT1 – SIT14SIT13SIT12SIT11SIT10SIT9SIT8 (0xE0) CANSIT2 SIT7SIT6SIT5SIT4SIT3SIT2SIT1SIT0 (0xDF) CANIE1 – IEMOB14IEMOB13IEMOB12IEMOB11IEMOB10IEMOB9IEMOB8 (0xDE) CANIE2 IEMOB7IEMOB6IEMOB5IEMOB4IEMOB3IEMOB2IEMOB1IEMOB0 (0xDD) CANEN1 – ENMOB14ENMOB13ENMOB12ENMOB11ENMOB10ENMOB9ENMOB8 (0xDC) CANEN2 ENMOB7ENMOB6ENMOB5ENMOB4ENMOB3ENMOB2ENMOB1ENMOB0 (0xDB) CANGIE ENITENBOFFENRXENTXENERRENBXENERGENOVRT (0xDA) CANGIT CANITBOFFITOVRTIMBXOKSERGCERGFERGAERG (0xD9) CANGSTA – OVRG – TXBSYRXBSYENFGBOFFERRP (0xD8) CANGCON ABRQOVRQTTCSYNTTCLISTENTESTENA/STB SWRES (0xD7) Reserved (0xD6) Reserved (0xD5) Reserved (0xD4) Reserved (0xD3) Reserved (0xD2) Reserved (0xD1) Reserved (0xD0) Reserved (0xCF) Reserved (0xCE) UDR1 UDR17UDR16UDR15UDR14UDR13UDR12UDR11UDR10 (0xCD) UBRR1H – – – – UBRR111UBRR110UBRR19UBRR18 (0xCC) UBRR1L UBRR17UBRR16UBRR15UBRR14UBRR13UBRR12UBRR11UBRR10 (0xCB) Reserved (0xCA) UCSR1C – UMSEL1UPM11UPM10USBS1UCSZ11UCSZ10UCPOL1 (0xC9) UCSR1B RXCIE1TXCIE1UDRIE1RXEN1TXEN1UCSZ12RXB81TXB81 (0xC8) UCSR1A RXC1TXC1UDRE1FE1DOR1UPE1U2X1MPCM1 (0xC7) Reserved (0xC6) UDR0 UDR07UDR06UDR05UDR04UDR03UDR02UDR01UDR00 (0xC5) UBRR0H – – – – UBRR011UBRR010UBRR09UBRR08 (0xC4) UBRR0L UBRR07UBRR06UBRR05UBRR04UBRR03UBRR02UBRR01UBRR00 (0xC3) Reserved (0xC2) UCSR0C – UMSEL0UPM01UPM00USBS0UCSZ01UCSZ00UCPOL0 (0xC1) UCSR0B RXCIE0TXCIE0UDRIE0RXEN0TXEN0UCSZ02RXB80TXB80 (0xC0) UCSR0A RXC0TXC0UDRE0FE0DOR0UPE0U2X0MPCM0 (0xBF) Reserved

7538AS–CAN–09/05 AT90CAN32/64 (0xBE) Reserved (0xBD) Reserved (0xBC) TWCR TWINTTWEATWSTATWSTOTWWCTWEN – TWIE (0xBB) TWDR TWDR7TWDR6TWDR5TWDR4TWDR3TWDR2TWDR1TWDR0 (0xBA) TWAR TWAR6TWAR5TWAR4TWAR3TWAR2TWAR1TWAR0TWGCE (0xB9) TWSR TWS7TWS6TWS5TWS4TWS3 – TWPS1TWPS0 (0xB8) TWBR TWBR7TWBR6TWBR5TWBR4TWBR3TWBR2TWBR1TWBR0 (0xB7) Reserved (0xB6) ASSR – – – EXCLKAS2TCN2UBOCR2UBTCR2UB (0xB5) Reserved (0xB4) Reserved (0xB3) OCR2A OCR2A7OCR2A6OCR2A5OCR2A4 OCR2A3OCR2A2OCR2A1OCR2A0 (0xB2) TCNT2 TCNT27TCNT26TCNT25TCNT24TCNT23TCNT22TCNT21TCNT20 (0xB1) Reserved (0xB0) TCCR2A FOC2AWGM20COM2A1COM2A0WGM21CS22CS21CS20 (0xAF) Reserved (0xAE) Reserved (0xAD) Reserved (0xAC) Reserved (0xAB) Reserved (0xAA) Reserved (0xA9) Reserved (0xA8) Reserved (0xA7) Reserved (0xA6) Reserved (0xA5) Reserved (0xA4) Reserved (0xA3) Reserved (0xA2) Reserved (0xA1) Reserved (0xA0) Reserved (0x9F) Reserved (0x9E) Reserved (0x9D) OCR3CH OCR3C15OCR3C14OCR3C13OCR3C12OCR3C11OCR3C10OCR3C9OCR3C8 (0x9C) OCR3CL OCR3C7OCR3C6OCR3C5OCR3C4OCR3C3OCR3C2OCR3C1OCR3C0 (0x9B) OCR3BH OCR3B15OCR3B14OCR3B13OCR3B12OCR3B11OCR3B10OCR3B9OCR3B8 (0x9A) OCR3BL OCR3B7OCR3B6OCR3B5OCR3B4 OCR3B3OCR3B2OCR3B1OCR3B0 (0x99) OCR3AH OCR3A15OCR3A14OCR3A13OCR3A12OCR3A11OCR3A10OCR3A9OCR3A8 (0x98) OCR3AL OCR3A7OCR3A6OCR3A5OCR3A4 OCR3A3OCR3A2OCR3A1OCR3A0 (0x97) ICR3H ICR315ICR314ICR313ICR312 ICR311ICR310ICR39ICR38 (0x96) ICR3L ICR37ICR36ICR35ICR34ICR33ICR32ICR31ICR30 (0x95) TCNT3H TCNT315TCNT314TCNT313TCNT312TCNT311TCNT310TCNT39TCNT38 (0x94) TCNT3L TCNT37TCNT36TCNT35TCNT34TCNT33TCNT32TCNT31TCNT30 (0x93) Reserved (0x92) TCCR3C FOC3AFOC3BFOC3C – – – – (0x91) TCCR3B ICNC3ICES3 – WGM33WGM32CS32CS31CS30 (0x90) TCCR3A COM3A1COM3A0COM3B1COM3B0 COM3C1COM3C0WGM31WGM30 (0x8F) Reserved (0x8E) Reserved (0x8D) OCR1CH OCR1C15OCR1C14OCR1C13OCR1C12OCR1C11OCR1C10OCR1C9OCR1C8 (0x8C) OCR1CL OCR1C7OCR1C6OCR1C5OCR1C4OCR1C3OCR1C2OCR1C1OCR1C0 (0x8B) OCR1BH OCR1B15OCR1B14OCR1B13OCR1B12OCR1B11OCR1B10OCR1B9OCR1B8 (0x8A) OCR1BL OCR1B7OCR1B6OCR1B5OCR1B4 OCR1B3OCR1B2OCR1B1OCR1B0 (0x89) OCR1AH OCR1A15OCR1A14OCR1A13OCR1A12OCR1A11OCR1A10OCR1A9OCR1A8 (0x88) OCR1AL OCR1A7OCR1A6OCR1A5OCR1A4 OCR1A3OCR1A2OCR1A1OCR1A0 (0x87) ICR1H ICR115ICR114ICR113ICR112 ICR111ICR110ICR19ICR18 (0x86) ICR1L ICR17ICR16ICR15ICR14ICR13ICR12ICR11ICR10 (0x85) TCNT1H TCNT115TCNT114TCNT113TCNT112TCNT111TCNT110TCNT19TCNT18 (0x84) TCNT1L TCNT17TCNT16TCNT15TCNT14TCNT13TCNT12TCNT11TCNT10 (0x83) Reserved (0x82) TCCR1C FOC1AFOC1BFOC1C – – – – – (0x81) TCCR1B ICNC1ICES1 – WGM13WGM12CS12CS11CS10 (0x80) TCCR1A COM1A1COM1A0COM1B1COM1B0 COM1C1COM1C0WGM11WGM10 (0x7F) DIDR1 – – – – – – AIN1DAIN0D (0x7E) DIDR0 ADC7DADC6DADC5DADC4DADC3DADC2DADC1DADC0D (0x7D) Reserved AddressNameBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Comment

7538AS–CAN–09/05 AT90CAN32/64 (0x7C) ADMUX REFS1REFS0ADLARMUX4MUX3MUX2MUX1MUX0 (0x7B) ADCSRB – ACME – – – ADTS2ADTS1ADTS0 (0x7A) ADCSRA ADENADSCADATEADIFADIEADPS2ADPS1ADPS0 (0x79) ADCH - / ADC9- / ADC8- / ADC7- / ADC6- / ADC5- / ADC4ADC9 / ADC3ADC8 / ADC2 (0x78) ADCL ADC7 / ADC1ADC6 / ADC0ADC5 / -ADC4 / -ADC3 / -ADC2 / -ADC1 / -ADC0 / (0x77) Reserved (0x76) Reserved (0x75) XMCRB XMBK – – – – XMM2XMM1XMM0 (0x74) XMCRA SRESRL2SRL1SRL0SRW11SRW10SRW01SRW00 (0x73) Reserved (0x72) Reserved (0x71) TIMSK3 – – ICIE3 – OCIE3COCIE3BOCIE3ATOIE3 (0x70) TIMSK2 – – – – – – OCIE2ATOIE2 (0x6F) TIMSK1 – – ICIE1 – OCIE1COCIE1BOCIE1ATOIE1 (0x6E) TIMSK0 – – – – – – OCIE0ATOIE0 (0x6D) Reserved (0x6C) Reserved (0x6B) Reserved (0x6A) EICRB ISC71ISC70ISC61ISC60ISC51ISC50ISC41ISC40 (0x69) EICRA ISC31ISC30ISC21ISC20ISC11ISC10ISC01ISC00 (0x68) Reserved (0x67) Reserved (0x66) OSCCAL – CAL6CAL5CAL4CAL3CAL2CAL1CAL0 (0x65) Reserved (0x64) Reserved (0x63) Reserved (0x62) Reserved (0x61) CLKPR CLKPCE – – – CLKPS3CLKPS2CLKPS1CLKPS0 (0x60) WDTCR – – – WDCEWDEWDP2WDP1WDP0 0x3F (0x5F) SREG ITHSVNZC 0x3E (0x5E) SPH SP15SP14SP13SP12SP11SP10SP9SP8 0x3D (0x5D) SPL SP7SP6SP5SP4SP3SP2SP1SP0 0x3C (0x5C) Reserved 0x3B (0x5B) RAMPZ – – – – – – – RAMPZ0 (1) 0x3A (0x5A) Reserved 0x39 (0x59) Reserved 0x38 (0x58) Reserved 0x37 (0x57) SPMCSR SPMIERWWSB – RWWSREBLBSETPGWRTPGERSSPMEN 0x35 (0x55) MCUCR JTD – – PUD – – IVSELIVCE 0x34 (0x54) MCUSR – – – JTRFWDRFBORFEXTRFPORF 0x33 (0x53) SMCR – – – – SM2SM1SM0SE 0x32 (0x52) Reserved 0x31 (0x51) OCDR IDRD/OCDR7 OCDR6 OCDR5OCDR4OCDR3OCDR2OCDR1OCDR0 0x30 (0x50) ACSR ACDACBGACOACIACIEACICACIS1ACIS0 0x2F (0x4F) Reserved 0x2E (0x4E) SPDR SPD7SPD6SPD5SPD4SPD3SPD2SPD1SPD0 0x2D (0x4D) SPSR SPIFWCOL – – – – – SPI2X 0x2C (0x4C) SPCR SPIESPEDORDMSTRCPOLCPHASPR1SPR0 0x2B (0x4B) GPIOR2 GPIOR27GPIOR26GPIOR25GPIOR24 GPIOR23GPIOR22GPIOR21GPIOR20 0x2A (0x4A) GPIOR1 GPIOR17GPIOR16GPIOR15GPIOR14 GPIOR13GPIOR12GPIOR11GPIOR10 0x29 (0x49) Reserved 0x28 (0x48) Reserved 0x27 (0x47) OCR0A OCR0A7OCR0A6OCR0A5OCR0A4 OCR0A3OCR0A2OCR0A1OCR0A0 0x26 (0x46) TCNT0 TCNT07TCNT06TCNT05TCNT04TCNT03TCNT02TCNT01TCNT00 0x25 (0x45) Reserved 0x24 (0x44) TCCR0A FOC0AWGM00COM0A1COM0A0WGM01CS02CS01CS00 0x23 (0x43) GTCCR TSM – – – – – PSR2PSR310 0x22 (0x42) EEARH – – – – EEAR11EEAR10EEAR9EEAR8 (2) 0x21 (0x41) EEARL EEAR7EEAR6EEAR5EEAR4EEAR3EEAR2EEAR1EEAR0 0x20 (0x40) EEDR EEDR7EEDR6EEDR5EEDR4EEDR3EEDR2EEDR1EEDR0 0x1F (0x3F) EECR – – – – EERIEEEMWEEEWEEERE 0x1E (0x3E) GPIOR0 GPIOR07GPIOR06GPIOR05GPIOR04 GPIOR03GPIOR02GPIOR01GPIOR00 0x1D (0x3D) EIMSK INT7INT6INT5INT4INT3INT2INT1INT0 0x1C (0x3C) EIFR INTF7 INTF6 INTF5 INTF4 INTF3 INTF2 INTF1 INTF0 0x1B (0x3B) Reserved AddressNameBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Comment

7538AS–CAN–09/05 AT90CAN32/64 Notes:1.Address bits exceeding PCMSB (c.f complete Datasheet) are don ’t care. 2.Address bits exceeding EEAMSB (c.f complete Datasheet) are don ’t care. 3.For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 4.I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. 5.Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such status flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. 6.When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The AT90CAN32/64 is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used. 0x1A (0x3A) Reserved 0x19 (0x39) Reserved 0x18 (0x38) TIFR3 – – ICF3 – OCF3COCF3BOCF3ATOV3 0x17 (0x37) TIFR2 – – – – – – OCF2ATOV2 0x16 (0x36) TIFR1 – – ICF1 – OCF1COCF1BOCF1ATOV1 0x15 (0x35) TIFR0 – – – – – – OCF0ATOV0 0x14 (0x34) PORTG – – – PORTG4PORTG3PORTG2PORTG1PORTG0 0x13 (0x33) DDRG – – – DDG4DDG3DDG2DDG1DDG0 0x12 (0x32) PING – – – PING4PING3PING2PING1PING0 0x11 (0x31) PORTF PORTF7PORTF6PORTF5PORTF4PORTF3PORTF2PORTF1PORTF0 0x10 (0x30) DDRF DDF7DDF6DDF5DDF4DDF3DDF2DDF1DDF0 0x0F (0x2F) PINF PINF7PINF6PINF5PINF4PINF3PINF2PINF1PINF0 0x0E (0x2E) PORTE PORTE7PORTE6PORTE5PORTE4PORTE3PORTE2PORTE1PORTE0 0x0D (0x2D) DDRE DDE7DDE6DDE5DDE4DDE3DDE2DDE1DDE0 0x0C (0x2C) PINE PINE7PINE6PINE5PINE4PINE3PINE2PINE1PINE0 0x0B (0x2B) PORTD PORTD7PORTD6PORTD5PORTD4PORTD3PORTD2PORTD1PORTD0 0x0A (0x2A) DDRD DDD7DDD6DDD5DDD4DDD3DDD2DDD1DDD0 0x09 (0x29) PIND PIND7PIND6PIND5PIND4PIND3PIND2PIND1PIND0 0x08 (0x28) PORTC PORTC7PORTC6PORTC5PORTC4PORTC3PORTC2PORTC1PORTC0 0x07 (0x27) DDRC DDC7DDC6DDC5DDC4DDC3DDC2DDC1DDC0 0x06 (0x26) PINC PINC7PINC6PINC5PINC4PINC3PINC2PINC1PINC0 0x05 (0x25) PORTB PORTB7PORTB6PORTB5PORTB4PORTB3PORTB2PORTB1PORTB0 0x04 (0x24) DDRB DDB7DDB6DDB5DDB4DDB3DDB2DDB1DDB0 0x03 (0x23) PINB PINB7PINB6PINB5PINB4PINB3PINB2PINB1PINB0 0x02 (0x22) PORTA PORTA7PORTA6PORTA5PORTA4PORTA3PORTA2PORTA1PORTA0 0x01 (0x21) DDRA DDA7DDA6DDA5DDA4DDA3DDA2DDA1DDA0 0x00 (0x20) PINA PINA7PINA6PINA5PINA4PINA3PINA2PINA1PINA0 AddressNameBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Comment

7538A–CAN–09/05 AT90CAN32/64 4.Ordering Information Notes:1.These devices can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering informa- tion and minimum quantities. 2.For information only. 3.Check for Availability. 5.Packaging Information Ordering Code (1) Speed (MHz)Power Supply (V)PackageOperation RangeProduct Marking AT90CAN32-16AI162.7 - 5.564AIndustrial (-40 ° to +85°C)AT90CAN32-IL AT90CAN32-16MI162.7 - 5.564M1Industrial (-40 ° to +85°C)AT90CAN32-IL AT90CAN32-16AU162.7 - 5.564A Industrial (-40° to +85°C) Green AT90CAN32-UL AT90CAN32-16MU162.7 - 5.564M1 Industrial (-40° to +85°C) Green AT90CAN32-UL AT90CAN64-16AI(3) 162.7 - 5.564AIndustrial (-40 ° to +85°C)AT90CAN64-IL AT90CAN64-16MI(3) 162.7 - 5.564M1Industrial (-40 ° to +85°C)AT90CAN64-IL AT90CAN64-16AU(3) 162.7 - 5.564A Industrial (-40° to +85°C) Green AT90CAN64-UL AT90CAN64-16MU(3) 162.7 - 5.564M1 Industrial (-40° to +85°C) Green AT90CAN64-UL AT90CAN128-16AI(2) 16 2.7 - 5.5 64A Industrial (-40° to +85°C) AT90CAN128-IL AT90CAN128-16MI(2) 16 2.7 - 5.5 64M1 Industrial (-40° to +85°C) AT90CAN128-IL AT90CAN128-16AU(2) 16 2.7 - 5.5 64A Industrial (-40° to +85°C) Green AT90CAN128-UL AT90CAN128-16MU(2) 16 2.7 - 5.5 64M1 Industrial (-40° to +85°C) Green AT90CAN128-UL Package Type 64A 64-Lead, Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 64M1 64-Lead, Quad Flat No lead (QFN)

7538A–CAN–09/05 AT90CAN32/64 5.1TQFP64 INDEX CORNER PIN 1 L C A1 A2A D e E1E B PIN 64

64 LEADS Thin Quad Flat Package

(2) (2) MIN NOM INCH MAX

7538A–CAN–09/05 AT90CAN32/64 5.2QFN64 INDEX CORNER 64636264x b J K 64x L e EXPOSED DIE ATTACH PADBOTTOM VIEW TOP VIEW D E INDEX CORNER 0.08 A C SEATING PLANE SIDE VIEW b L e N D / E J / K A 6.47 0.80 MIN 6.57 NOM MM

9.00 BSC

6.67 1.00 0.00 0.05 MAX . 255 . 031 MIN . 259 NOM INCH . 354 BSC 0.50 BSC . 020 BSC . 263 . 039 . 000 . 002 0.75 1.00 . 029 . 039 MAX

64 LEADS Quad Flat No lead

Note: Compliant JEDEC MO-220

Printed on recycled paper. 7538A–CAN–09/05 © Atmel Corporation 2005 . All rights reserved. Atmel ®, logo and combinations thereof, are registered trademarks, and Everywhere You Are ® are the trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL ’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL ’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDEN- TAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically providedot- herwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel ’sAtmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. Atmel CorporationAtmel Operations

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