AT88SC0104C-MPTG

AT88SC0104C_09 ATMEL | Alldatasheet

Document overview

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Technical content

Features

• One of a Family of 9 Devices with User Memories from 1 Kbit to 256-Kbit
• 1-Kbit (128-byte) EEPROM User Memory ⎯ Four 32 byte (256 bit) Zones ⎯ Self-timed Write Cycle ⎯ Single Byte or 16-byte Page Write Mode ⎯ Programmable Access Rights for Each Zone
• 2-Kbit Configuration Zone ⎯ 37-byte OTP Area for User-defined Codes ⎯ 160-byte Area for User-defined Keys and Passwords
• High Security Features ⎯ 64-bit Mutual Authentication Protocol (Under License of ELVA) ⎯ Encrypted Checksum ⎯ Stream Encryption ⎯ Four Key Sets for Authentication and Encryption ⎯ Eight Sets of Two 24-bit Passwords ⎯ Anti-tearing Function ⎯ Voltage and Frequency Monitor
• Smart Card Features ⎯ ISO 7816 Class A (5V) or Class B (3V) Operation ⎯ ISO 7816-3 Asynchronous T = 0 Protocol (Gemplus® Patent) * ⎯ Multiple Zones, Key Sets and Passwords for Multi-application Use ⎯ Synchronous 2-wire Serial Interface for Faster Device Initialization * ⎯ Programmable 8-byte Answer-To-Reset Register ⎯ ISO 7816-2 Compliant Modules
• Embedded Application Features ⎯ Low Voltage Operation: 2.7V to 5.5V ⎯ Secure Nonvolatile Storage for Sensitive System or User Information ⎯ 2-wire Serial Interface ⎯ 1.0 MHz Compatibility for Fast Operation ⎯ Standard 8-lead Plastic Packages, Green Compliant (exceeds RoHS) ⎯ Same Pinout as 2-wire Serial EEPROM's
• High Reliability ⎯ Endurance: 100,000 Cycles ⎯ Data Retention: 10 years ⎯ ESD Protection: 4,000V min * Note: Modules available with either T=0 / 2-wire modes or 2-wire mode only. CryptoMemory®

1 Kbit

2021KS–SMEM–10/09

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Table 1. Pin Assignment Figure 1. Pin Configuration provide space for 1 to 4 data files. in industry standard 8-lead packages with the same familiar pinout as 2-wire serial EEPROMs.

Figure 2. Block Diagram The VCC input is a 2.7V to 5.5V positive voltage supplied by the host. clock data out of the device. AT88SC0104C does not support the synchronous answer-to-reset sequence. other open drain or open collector devices. An external pull-up resistor should be connected between SDA and V CC. negative edge clock data out of the device.

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1. *Absolute Maximum Ratings

Table 2. DC Characteristics Notes: 1. V IL min and VIH max are reference only and are not tested.

1. To prevent Latch Up Conditions from occurring during Power Up of the AT88SCxxxxC, VCC must be turned

on before applying VIH. For Powering Down, VIH must be removed before turning VCC off.

Table 3. AC Characteristics

1. Device Operation for Synchronous Protocols

during SCL high periods will indicate a start or stop condition as defined below. other command (see Figure 6 on page 7). stop command will place the EEPROM in a standby power mode (see Figure 6 on page 7). happens during the ninth clock cycle.

1. Look for SDA high in each cycle while SCL is high.
2. Create a start condition.

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Figure 3. Bus Timing for 2 wire communications: SCL: Serial Clock, SDA – Serial Data I/O Figure 4. Write Cycle Timing: SCL: Se rial Clock, SDA – Serial Data I/O

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accessed as one larger zone. Figure 8. User Zones access registers, key registers and keys programmed into the configuration memory dur ing device personalization.

control logic and may not be altered by the user. Figure 9. Configuration Memory

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the fuses may be performed at one final step. The AT88SC0104C supports two different communication protocols.

• Smart Card Applications: The asynchronous T = 0 protocol defined by ISO 7816-3 is used for compatibility with the industry’s standard smart card readers.
• Embedded Applications: A 2-wire serial interface is used for fast and efficient communication with logic or controllers. The power-up sequence determines which of the two communication protocols will be used. 9.1. Asynchronous T = 0 Protocol This power-up sequence complies with ISO 7816-3 for a cold reset in smart card applications.
• V CC goes high; RST, I/O-SDA and CLK-SCL are low.
• Set I/O-SDA in receive mode.
• Provide a clock signal to CLK-SCL.
• RST goes high after 400 clock cycles. The device will respo nd with a 64-bit ATR code, including historical byte s to indicate the memo ry density within the CryptoMemory family. Once the asynchronous mode has been selected, it is not possible to switch to the synchronous mode without powering off the device.

Figure 10. Asynchronous T = 0 Protocol (Gemplus Patent)

applications using CryptoMemory in standard plastic packages, this is the only communication protocol.

• Power-up V CC, RST goes high also.
• After stable V CC, CLK-SCL and I/O-SDA may be driven.

Figure 11. Synchronous 2-wire Protocol Note: Five clock pulses must be sent before the first command is issued.

1. Communication Security Modes

is activated by a successful encryption activation following a successful authentication. Table 4. Communication Security Modes (1) MAC: Message Authentication Code.

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function is optional: the host may choose to activate the an ti-tearing function, depending on application requirements. them, and data are limited to eight bytes. power loss, the device will automatically recover the data from the system buffer zone at the next power-up. device needs to carry out the data recovery process. byte for the bytes of that page. The write lock byte at $080 controls the bytes from $080 to $087. Figure 12. Write Lock Example mode is activated, the write lock byte can only be programmed — that is, bits written to “0” cannot return to “1”. byte will be taken into account by the device.

passwords give read access also. authentication and it should be presented again. Only the last request is memorized. Figure 13. Password and Aut hentication Operations

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2021KS–SMEM–10/09 12.2. Checksum The AT88SC0104C implements a data validity check functi on in the form of a checksum, which may function in standard, authentication or encryption modes. In the standard mode, the checksum is implemented as a Modification Detect ion Code (MDC), in which the host may read an MDC from the device in order to verify that the data sent was received correctly. In the authentication and encryption modes, the checksum becomes more powerful since it provides a bidirectional data integrity check and data origin authentication capability in the form of a Message Authentication Code (MAC). Only the host/device that carried out a valid authentication is capable of computing a valid MAC. While operati ng in the authentication or encryption modes, the use of a MAC is required. For an ingoing command, if the device calculates a MAC different from the MAC transmitted by the host, not only is the command abandoned but the mode is also reset. A new authentication and/or encryption activation will be required to reactivate the MAC. 12.3. Encryption The data exchanged between the device and the host during read, write and verify password commands may be encrypted to ensure data confidentiality. The issuer may choose to require encryption for a user zo ne by settings made in the configuration memory. Any one of four keys may be selected for use with a user zone. In this case, activation of the encryption mode is required in order to read/write data in the zone and only encrypted data will be transmitted. Even if not required, the host may elect to activate encryption provided the proper keys are known. 12.4. Supervisor Mode Enabling this feature allows the holder of one specific password to gain full access to all eight password sets, including the ability to change passwords. 12.5. Modify Forbidden No write access is allowed in a user zone protected with th is feature at any time. The user zone must be written during device personalization prior to blowing the security fuses. 12.6. Program Only For a user zone protected by this feature, data within the zone may be changed from a “1” to a “0”, but never from a “0” to a “1”. 13. Initial Device Programming To enable the security features of CryptoMemory, the device mu st first be personalized to set up several registers and load in the appropriate passwords and keys. This is acco mplished through programming the configuration memory of CryptoMemory using simple write and read commands. To gain access to the configuration memory, the secure code must first be successfully presented. Fo r the AT88SC0104C device, the secure code is $DD 42 97. After writing and verifying data in the configuration memory, the security fuse s must be blown to lock this information in the device. For additional information on personalizing Crypto Memory, please see the application notes Programming CryptoMemory for Embedded Applications and Initializing CryptoMemory for Smart Card Applications (at www.Atmel.com).

2021KS–SMEM–10/09 14. Ordering Information Ordering Code Package Voltage Range Temperature Range AT88SC0104C-MJ AT88SC0104C-MP AT88SC0104C-MJTG AT88SC0104C-MPTG M2 – J Module - ISO M2 – P Module - ISO M2 – J Module - TWI M2 – P Module - TWI 2.7V–5.5V Commercial (0°C–70°C) AT88SC0104C-PU AT88SC0104C-SU 8P3 8S1 2.7V–5.5V Green compliant (exceeds RoHS)/Industrial (−40°C–85°C) AT88SC0104C-WI 7 mil wafer 2.7V–5.5V Industrial ( −40°C–85°C) Package Type(1) (2) Description M2 – J Module : ISO or TWI M2 ISO 7816 Smart Card Module M2 – P Module : ISO or TWI M2 ISO 7816 Smart Card Module with Atmel ® Logo 8P3 8-lead, 0.300” Wide, Plas tic Dual Inline Package (PDIP) 8S1 8-lead, 0.150” Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) Note: 1. Formal drawings may be obtained from an Atmel sales office. 2 . Both the J and P Module Packages are used for either ISO (T=0 / 2-wire mode) or TWI (2-wire mode only).

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2021KS–SMEM–10/09 15. Packaging Information Ordering Code: MJ or MJTG Ordering Code: MP or MPTG Module Size: M2 Dimension*: 12.6 x 11.4 [mm] Glob Top: Round - ∅ 8.5 [mm] Thickness: 0.58 [mm] Pitch: 14.25 mm Module Size: M2 Dimension*: 12.6 x 11.4 [mm] Glob Top: Square - 8.8 x 8.8 [mm] Thickness: 0.58 [mm] Pitch: 14.25 mm *Note: The module dimensions listed refer to the dimens ions of the exposed metal contact area. The actual dimensions of the module after excise or punching from the carrier tape are generally 0.4 mm greater in both

2021KS–SMEM–10/09 15.1. Ordering Code: SU 8S1 – JEDEC SOIC Note: COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A1 0.10 – 0.25 These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. A 1.35 – 1.75 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e1 . 2 7 B S C L 0.40 – 1.27 0˚ –8 ˚ Top View End View Side View e D A N E C L DRAWING NO.1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 REV. 8S1 C 3/17/05 TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) b

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2021KS–SMEM–10/09 15.2. Ordering Code: PU 8P3 – PDIP COMMON DIMENSIONS (Unit of Measure = inches) SYMBOL MIN NOM MAX NOTE D E e Lb2 b A2 A N eA c

4 PLCS

DRAWING NO.2325 Orchard Parkway San Jose, CA 95131R REV. 8P3 B 01/09/02 TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) A b c D E e eA L 0.115 0.014 0.045 0.030 0.008 0.355 0.005 0.300 0.240 0.115 0.130 0.018 0.060 0.039 0.010 0.365 0.310 0.250 0.130 0.210 0.195 0.022 0.070 0.045 0.014 0.400 0.325 0.280 0.150

0.100 BSC

0.300 BSC

Notes: 1. This drawing is for general information only; refer to JEDEC D rawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. 3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch. 4. E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are pre ferred to ease insertion. 6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm).

2021KS–SMEM–10/09 Appendix A. Revision History Doc. Rev. Date Comments 2021KS 08/2009 SB - TWI Package update 2021JS 03/2009 Features Section – add ‘Green compliant (exceeds RoHS) to end of ‘Standard 8-lead Plastic Packages’ bullet added Note to DC Characteristics table and applied to VCC and all 3 instances of VIH symbols in table. Ordering Information page: Add ‘Green compliant (exceeds RoHS) to middle row of Temperature Range Replace ‘Lead-free/Halogen-free. Keep industrial Updated to 2009 Copyright. 2021IS 11/2008 Updated timing diagrams. 2021HS 04/14/2007 Final release version. 2021HS 01/25/2007 Replaced User Zone, Configuration Memory, and Write Locks Example tables with new information. 2021HS 01/2007 Implemented revision history. Removed Industrial package offerings. Removed 8Y4 package offering.

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