AT86RF210 ATMEL | Alldatasheet
Document overview
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Technical content
Features
850–930 MHz Output Frequency Rx Current: 14.5 mA Low Sleep Mode Current: 1 uA DSSS Processing and BPSK M odulation/Demodulation Battery Voltage Monitoring Circuitry 4 mW (6 dBm) Min. Transmit Power @ Vdd = 1.8V Serial Peripheral Interface (SPI) Control Power Supply Voltage Operating Range: 1.8V to 3.6V Low External Component Count 48QFN Package
Applications
Low Band IEEE 802.15.4/ZigBee™ -based Systems Industrial, Commercial, Home Lighting Control, Security, and HVAC Inventory Management Health Monitoring Wireless PC Peripherals such as Mouse, Keyboard, and Joystick Consumer Electronics Remote Controls and Toys
Description
The Atmel AT86RF210 Z-Link™ Transceiver is a fully integated, low-cost ZigBee™ transceiver capable of transmitting and receiving BPSK modulated digital data over a frequency range of 868 MHz and 902–928 MHz using a minimum number of external components. It combines excellent RF performance with low cost, small size and low current consumption. The AT86RF210 includes a crystal stabilized Fractional-N syn- thesizer, BPSK transmitter and receiver, and full Direct Sequence Spread Spectrum Signal (DSSS) processing, including spreading and despreading. The device is fully compatable with IEEE 802.15.4 and ZigBee standards. It includes internal voltage regulation and battery monitoring circuitry and requires a minimum number of external support components. Figure 1. Block Diagram
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Figure 1. Functional Block Diagram Note: Unit operation is guaranteed by design when operating within these ranges. Table 1. Absolute Maximum Ratings* tional sections of the specification is not implied. extended periods may affect device reliability. Table 2. Operating Conditions
1.2 MHz
1.200 MHz
Table 3. DC Characteristics Table 4. Receiver AC Characteristics
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Table 5. Transmitter AC Characteristics Table 6. Synthesizer AC Characteristics Table 7. Serial Configuration Register*
Table 8. Low Battery Detector Characteristics **Table 7. Serial Configuration Register* (Continued)** Table 9. Preliminary PIN Description QFN48 VSS 5 RF_I/O NA Transmit-receive switch isolation ground 1. switch. Routes signal to the LNA or from the PA. VSS 7 RF_I/O NA Transmit-receive switch isolation ground 2. P AOUT 9 RF_I/O NA PA signal routed into the T/R switch from the PA. large external capacitor during battery operation. LO frequency. The control voltage should be referenced to LOGND.
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SYSCLK 31 D_O HIGH Clock output to controller. Can be divided by 1 to 16. VSSDIG 35 V_I/O NA Digital power supply ground. START 36 D_I HIGH Oscillator start. A transition on this pin will start the internal oscillator. A low on this pin allows the part to run from an external clock. CHPRDY 37 D_O LOW Chip ready. Handshake signal between the controller and the chip. Also acts as fault interrupt. XT ALMODE 44 D_IO TBD Test pin. Enables nand tree test or scan test. activity is above a programmable threshold. Table 9. Preliminary PIN Description QFN48 (Continued)
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Figure 2. Typical ZigBee Application Schematic
1 SUB
2 LNARFIN
3 LNAVSS
4 RSWOUT
5 VSS
6 ANT
7 VSS
8 TSWIN
9 PAOUT
10 VSS
11 VDDA
12 PAREG
13 VCO
14 VCO
15 No connect16 No connect17 VCO
18 VCO
19 CPO
21 CPVDD22 XTAL123 XTAL224 XTALVSS
36 START
35 VSSDIG
34 VDDDIG
31 SYSCLK
30 SELl
29 SCLK
28 SDO
27 SDI
26 No connect
25 TXDAT
48 LNAO
47 VSSA46 VDDA45 CCA
44 XTALM
43 RSSI
42 PPFREG
41 No Connect40 No C
38 RXDO
5033AS –WIRE –10/03 Package Drawing 48QFN
2325 Orchard Parkway
San Jose, CA 95131 TITLE DRAWING NO. R REV. 48QN1 , 48-lead 7.0 x 7.0 mm Body, 0.50 mm Pitch, Quad Flat No Lead Package (QFN) A48QN1 12/10/02 Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-220, Variation VKKD-2, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE D 7.00 BSC E 7.00 BSC D2 2.25 4.70 5.25 E2 2.25 4.70 5.25 A 0.80 0.90 1.00 A1 0.0 0.02 0.05 A2 0.0 0.65 1.00 A3 0.20 REF L 0.30 0.40 0.50 e 0.50 BSC b 0.18 0.23 0.30 2 Bottom View Top View Side View Pin 1 Index Area L e b A A1A2 E D A3
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www.atmel.com/literature 5033AS –WIRE –10/03 © Atmel Corporation 2003. All rights reserved. Atmel® and combinations thereof are registered trademarks and Z-Link™ is a trademark of Atmel Corporation or its subsidiaries. ZigBee™ is a trademark of the ZigBee Alliance. Other terms and product names may be the trademarks of others.