AT27BV1024 ATMEL | Alldatasheet

Document overview

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Technical content

Features

  • Fast Read Access Time - 90 ns
  • Dual Voltage Range Operation Unregulated Battery Power Supply Range, 2.7V to 3.6V or Standard 5V ± 10% Supply Range
  • Pin Compatible with JEDEC Standard AT27C1024
  • Low Power CMOS Operation 20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V 29 mW max. Active at 5 MHz for VCC = 3.6V
  • JEDEC Standard Surface Mount Packages 44-Lead PLCC 40-Lead TSOP (10 x 14mm)
  • High Reliability CMOS Technology 2,000V ESD Protection 200 mA Latchup Immunity
  • Rapid Programming Algorithm - 100 µs/word (typical)
  • CMOS and TTL Compatible Inputs and Outputs JEDEC Standard for LVTTL and LVBO
  • Integrated Product Identification Code
  • Commercial and Industrial Temperature Ranges TSOP Top View Type 1 0631A AT27BV1024 3-33

Atmel’s innovative design techniques provide fast speeds that rival 5V parts while keeping the low power consump- tion of a 3V supply. At V CC = 2.7V, any word can be ac- cessed in less than 120 ns. With a typical power dissipa- tion of only 18 mW at 5 MHz and V CC = 3V, the AT27BV1024 consumes less than one fifth the power of a standard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3V. The AT27BV1024 simplifies system design and stretches battery lifetime even further by eliminating the need for power supply regulation. The AT27BV1024 is available in industry standard JEDEC-approved one-time programmable (OTP) plastic PLCC and TSOP packages. All devices feature two-line control ( CE, OE) to give designers the flexibility to prevent bus contention. The AT27BV1024 operating with VCC at 3.0V produces TTL level outputs that are compatible with standard TTL logic devices operating at V CC = 5.0V. At VCC = 2.7V, the part is compatible with JEDEC approved low voltage bat- tery operation (LVBO) interface specifications. The device is also capable of standard 5-volt operation making it ide- ally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts. Atmel’s AT27BV1024 has additional features to ensure high quality and efficient production use. The Rapid  Pro- gramming Algorithm reduces the time required to program the part and guarantees reliable programming. Program- ming time is typically only 100 µs/word. The Integrated Product Identification Code electronically identifies the de- vice and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. The AT27BV1024 programs exactly the same way as a standard 5V AT27C1024 and uses the same programming equipment. Description (Continued) Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excur- sions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in de- vice non-conformance. At a minimum, a 0.1 µF high fre- quency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the V CC and Ground terminals. This capacitor should be posi- tioned as close as possible to the point where the power supply is connected to the array. System Considerations 3-34 AT27BV1024

Mode \\ Pin CE OE PGM Ai V PP VCC Outputs Read (2) VIL VIL X (1) Ai X V CC (2) D OUT Output Disable (2) XV IH XXX V CC (2) High Z Standby (2) VIH XX X X (5) VCC (2) High Z Rapid Program (3) VIL VIH VIL Ai V PP VCC (3) D IN PGM Verify (3) VIL VIL VIH Ai V PP VCC (3) D OUT PGM Inhibit (3) VIH XX X V PP VCC (3) High Z Product Identification (3, 5) VIL VIL X A9 = VH (4) A0 = VIH or VIL A1 - A15 = VIL VCC VCC (3) Identification Code Notes: 1. X can be VIL or VIH. 2. Read, output disable, and standby modes require, 3. Refer to Programming Characteristics. Programming modes require VCC = 6.5V. 5. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identi- fication word and high (VIH) to select the Device Code word. Voltage on Any Pin with Voltage on A9 with (1) VPP Supply Voltage with *NOTICE: Stresses beyond those listed under “Absolute Maxi- mum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indi- cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: 1. Minimum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is V CC + 0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns. Absolute Maximum Ratings*Block Diagram AT27BV1024 3-35

DC and AC Operating Conditions for Read Operation AT27BV1024 -90 -12 -15 Operating Temperature (Case) 5V ± 10% 5V ± 10% 5V ± 10% DC and Operating Characteristics for Read Operation Symbol Parameter Condition Min Max Units VCC = 2.7V to 3.6V ILI Input Load Current V IN = 0V to VCC ±1 µA ILO Output Leakage Current V OUT = 0V to VCC ±5 µA IPP1 (2) VPP (1) Read/Standby Current VPP = VCC 10 µA ISB VCC (1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 20 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 100 µA ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL, VCC = 3.6V 8m A VIL Input Low Voltage VCC = 3.0 to 3.6V -0.6 0.8 V VCC = 2.7 to 3.6V -0.6 0.2 x V CC V VIH Input High Voltage VCC = 3.0 to 3.6V 2.0 V CC + 0.5 V VCC = 2.7 to 3.6V 0.7 x V CC VCC + 0.5 V VOL Output Low Voltage IOL = 2.0 mA 0.4 V IOL = 100 µA 0.2 V IOL = 20 µA 0.1 V VOH Output High Voltage IOH = -2.0 mA 2.4 V IOH = -100 µAV CC - 0.2 V IOH = -20 µAV CC - 0.1 V VCC = 4.5V to 5.5V ILI Input Load Current V IN = 0V to VCC ±1 µA ILO Output Leakage Current V OUT = 0V to VCC ±5 µA IPP1 (2) VPP (1) Read/Standby Current VPP = VCC 10 µA ISB VCC (1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 100 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA ICC VCC Active Current f = 5 MHz, I OUT = 0 mA, CE = VIL 30 mA VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 V CC + 0.5 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA 2.4 V Notes: 1. VCC must be applied simultaneously with or before VPP , and removed simultaneously with or after VPP . 2. VPP may be connected directly to VCC , except during pro- gramming. The supply current would then be the sum of ICC and IPP . = Preliminary Information 3-36 AT27BV1024

AC Characteristics for Read Operation (VCC = 2.7V to 3.6V and 4.5V to 5.5V) AT27BV1024 -90 -12 -15 Symbol Parameter Condition Min Max Min Max Min Max Units tACC (3) Address to Output Delay CE = OE = VIL 90 120 150 ns tCE (2) CE to Output DelayOE = VIL 90 120 150 ns tOE (2, 3) OE to Output DelayCE = VIL 30 35 50 ns tDF (4, 5) OE or CE High to Output Float, whichever occurred first 30 30 40 ns tOH Output Hold from Address, CE or OE, whichever occurred first 0 0 0 n s Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation. = Preliminary Information AC Waveforms for Read Operation (1) Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless oth- erwise specified. 2.OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE . 3.OE may be delayed up to tACC - tOE after the address is valid without impact on tACC . 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. 6. When reading a 27BV1024, a 0.1 µF capacitor is required across VCC and ground to supress spurious voltage tran- sients. AT27BV1024 3-37

Pin Capacitance (f = 1 MHz T = 25°C) (1) Typ Max Units Conditions C IN 41 0 p F V IN = 0V C OUT 81 2 p F V OUT = 0V Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Output Test Load Note: CL = 100 pF including jig capacitance. tR , tF < 20 ns (10% to 90%) Input Test Waveforms and Measurement Levels 3-38 AT27BV1024

Programming Waveforms (1) Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27BV1024 a 0.1 µF capacitor is required across VPP and ground to suppress spurious volt- age transients. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Symbol Parameter Test Conditions Limits UnitsMin Max ILI Input Load Current V IN = VIL, VIH ±10 µA VIL Input Low Level -0.6 0.8 V VIH Input High Level 2.0 V CC + 0.1 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA2 . 4 V ICC2 VCC Supply Current (Program and Verify) 50 mA IPP2 VPP Supply Current CE = PGM = V IL 30 mA VID A9 Product Identification Voltage 11.5 12.5 V AT27BV1024 3-39

AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Sym- bol Parameter Test Conditions* (1) Limits UnitsMin Max tAS Address Setup Time 2 µs tCES CE Setup Time 2 µs tOES OE Setup Time 2 µs tDS Data Setup Time 2 µs tAH Address Hold Time 0 µs tDH Data Hold Time 2 µs tDFP OE High to Out- put Float Delay (2) 01 3 0 n s tVPS VPP Setup Time 2 µs tVCS VCC Setup Time 2 µs tPW PGM Program Pulse Width (3) 95 105 µs tOE Data Valid from OE 150 ns tPRT VPP Pulse Rise Time During Programming 50 ns *AC Conditions of Test: Notes: 1. V CC must be applied simultaneously or before VPP and removed simultaneously or after VPP . 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven — see timing diagram. 3. Program Pulse width tolerance is 100 µsec ± 5%. Atmel’s 27BV1024 Integrated Product Identification Code (1) Codes Pins Hex DataA0 015-08 O7 O6 O5 O4 O3 O2 O1 O0 M a n u f a c t u r e r0 0 000111100 0 1 E D e v i c e T y p e 1 0 111100010 0 F 1 Note: 1. The AT27BV1024 has the same Product Identification Code as the AT27C1024. Both are programming compatible. Rapid Programming Algorithm A 100 µs PGM pulse width is used to program. The ad- dress is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs PGM pulse without verification. Then a verification / reprogramming loop is executed for each ad- dress. In the event a word fails to pass verification, up to 10 successive 100 µs pulses are applied with a verifica- tion after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is se- lected until all have been checked. V PP is then lowered to 5.0V and VCC to 5.0V. All words are read again and com- pared with the original data to determine if the device passes or fails. 3-40 AT27BV1024

(ns) ICC (mA) Ordering Code Package Operation Range Active Standby 90 8 0.02 AT27BV1024-90JC 44J Commercial AT27BV1024-90VC 40V (0 °C to 70°C) 8 0.02 AT27BV1024-90JI 44J Industrial AT27BV1024-90VI 40V (-40 °C to 85°C) 120 8 0.02 AT27BV1024-12JC 44J Commercial AT27BV1024-12VC 40V (0 °C to 70°C) 8 0.02 AT27BV1024-12JI 44J Industrial AT27BV1024-12VI 40V (-40 °C to 85°C) 150 8 0.02 AT27BV1024-15JC 44J Commercial AT27BV1024-15VC 40V (0 °C to 70°C) 8 0.02 AT27BV1024-15JI 44J Industrial AT27BV1024-15VI 40V (-40 °C to 85°C)

Ordering Information

44J 44 Lead, Plastic J-Leaded Chip Carrier (PLCC) 40V 40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm = Preliminary Information AT27BV1024 3-41