AT25080

AT25080 ATMEL | Alldatasheet

Document overview

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Technical content

Features

• Serial Peripheral Interface (SPI) Compatible
• Supports SPI Modes 0 (0,0) and 3 (1,1)
• Low Voltage and Standard Voltage Operation – 5.0 (VCC = 4.5V to 5.5V) – 2.7 (VCC = 2.7V to 5.5V) – 1.8 (VCC = 1.8V to 3.6V)
• 2.1 MHz Clock Rate
• 32-Byte Page Mode
• Block Write Protection – Protect 1/4, 1/2, or Entire Array
• Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection
• Self-Timed Write Cycle (5 ms Typical)
• High Reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years – ESD Protection: >4000V
• Automotive Grade and Extended Temperature Devices Available
• 8-Pin PDIP , JEDEC SOIC, and 14-Pin and 20-Pin TSSOP Packages

Description

The AT25080/160/320/640 provides 8192/16384/32768/65536 bits of serial electri- cally erasable programmable read only memory (EEPROM) organized as 1024/2048/4096/8192 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation SPI Serial EEPROMs 8K (1024 x 8) 16K (2048 x 8) 32K (4096 x 8) 64K (8192 x 8) AT25080 AT25160 AT25320 AT25640 Rev. 0675C–08/98 (continued) Pin Configuration Pin Name Function CS Chip Select SCK Serial Data Clock SI Serial Data Input SO Serial Data Output GND Ground V CC Power Supply WP Write Protect HOLD Suspends Serial Input NC No Connect DC Don’t Connect 8-Pin PDIP CS SO WP GND VCC HOLD SCK SI 8-Pin SOIC CS SO WP GND VCC HOLD SCK SI 14-Lead TSSOP CS SO NC NC NC WP GND VCC HOLD NC NC NC SCK SI 20-Lead TSSOP* NC CS SO SO NC NC WP GND DC NC NC VCC HOLD HOLD NC NC SCK SI DC NC *Pins 3, 4 and 17, 18 are internally connected for 14-lead TSSOP socket compatibility.

are essential. The AT25080/160/320/640 is available in space saving 8-pin PDIP, JEDEC SOIC, and 14-pin and 20-pin TSSOP packages. The AT25080/160/320/640 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface con- sisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are com- pletely self-timed, and no separate ERASE cycle is required before WRITE. BLOCK WRITE protection is enabled by programming the status register with one of four blocks of write protection. Separate program enable and program disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. Block Diagram Absolute Maximum Ratings* Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Voltage on Any Pin

Note: 1. This parameter is characterized and is not 100% tested. Note: 1. V IL min and VIH max are reference only and are not tested. Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted). Test Conditions Max Units Conditions C OUT Output Capacitance (SO) 8 pF V OUT = 0V C IN Input Capacitance(CS, SCK, SI, WP, HOLD)6 p F V IN = 0V DC Characteristics Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units VCC1 Supply Voltage 1.8 3.6 V VCC2 Supply Voltage 2.7 5.5 V VCC3 Supply Voltage 4.5 5.5 V ICC1 Supply Current VCC = 5.0V at 1 MHz, SO = Open 3.0 mA ICC2 Supply Current VCC = 5.0V at 2 MHz, SO = Open 5.0 mA ISB1 Standby Current VCC = 1.8V , CS = VCC 0.1 µA ISB2 Standby Current VCC = 2.7V , CS = VCC 0.2 0.5 µA ISB3 Standby Current VCC = 5.0V , CS = VCC 0.5 2.0 µA IIL Input Leakage VIN = 0V to VCC -3.0 3.0 µA IOL Output Leakage VIN = 0V to VCC , TAC = 0°C to 70°C -3.0 3.0 µA VIL (1) Input Low Voltage -0.6 VCC x 0.3 V VIH (1) Input High Voltage VCC x 0.7 V CC + 0.5 V VOL1 Output Low Voltage 4.5V ≤ VCC ≤ 5.5V IOL = 3.0 mA 0.4 V VOH1 Output High Voltage IOH = -1.6 mA V CC - 0.8 V VOL2 Output Low Voltage 1.8V ≤ VCC ≤ 3.6V IOL = 0.15 mA 0.2 V VOH2 Output High Voltage I OH = -100 µAV CC - 0.2 V

Applicable over recommended operating range from TA = -40°C to +85°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter Voltage Min Max Units fSCK SCK Clock Frequency 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 2.1 2.1 0.5 MHz tRI Input Rise Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 µs tFI Input Fall Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 µs tWH SCK High Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 200 200 800 ns tWL SCK Low Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 200 200 800 ns tCS CS High Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 250 250 1000 ns tCSS CS Setup Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 250 250 1000 ns tCSH CS Hold Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 250 250 1000 ns tSU Data In Setup Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 100 ns tH Data In Hold Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 100 ns tHD Hold Setup Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 100 100 400 tCD Hold Hold Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 200 200 400 ns tV Output Valid 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 200 200 800 ns tHO Output Hold Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 ns

Note: 1. This parameter is characterized and is not 100% tested. tLZ Hold to Output Low Z 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 100 100 100 ns t HZ Hold to Output High Z 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 100 100 100 ns t DIS Output Disable Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 250 250 1000 ns t WC Write Cycle Time 4.5 - 5.5 2.7 - 5.5 1.8 - 3.6 ms Endurance (1) 5.0V , 25°C, Page Mode 1M Write Cycles AC Characteristics (Continued) Applicable over recommended operating range from TA = -40°C to +85°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter Voltage Min Max Units

Serial Interface Description MASTER: The device that generates the serial clock. SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25080/160/320/640 always operates as a slave. TRANSMITTER/RECEIVER: The AT25080/160/320/640 has separate pins designated for data transmission (SO) and reception (SI). MSB: The Most Significant Bit (MSB) is the first bit trans- mitted and received. SERIAL OP-CODE: After the device is selected with CS going low, the first byte will be received. This byte contains the op-code that defines the operations to be performed. INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the AT25080/160/320/640, and the serial output pin (SO) will remain in a high impedance state until the falling edge of CS is detected again. This will reini- tialize the serial communication. CHIP SELECT: The AT25080/160/320/640 is selected when the CS pin is low. When the device is not selected, data will not be accepted via the SI pin, and the serial out- put pin (SO) will remain in a high impedance state. HOLD: The HOLD pin is used in conjunction with the CS pin to select the AT25080/160/320/640. When the device is selected and a serial sequence is underway, HOLD can be used to pause the serial communication with the master device without resetting the serial sequence. To pause, the HOLD pin must be brought low while the SCK pin is low. To resume serial communication, the HOLD pin is brought high while the SCK pin is low (SCK may still toggle during HOLD ). Inputs to the SI pin will be ignored while the SO pin is in the high impedance state. WRITE PROTECT: The write protect pin (WP) will allow normal read/write operations when held high. When the WP pin is brought low and WPEN bit is “1”, all write opera- tions to the status register are inhibited. WP going low while CS is still low will interrupt a write to the status regis- ter. If the internal write cycle has already been initiated, WP going low will have no effect on any write operation to the status register. The WP pin function is blocked when the WPEN bit in the status register is "0". This will allow the user to install the AT25080/160/320/640 in a system with the WP pin tied to ground and still be able to write to the status register. All WP pin functions are enabled when the WPEN bit is set to “1”. SPI Serial Interface

6805 and 68HC11 series of microcontrollers. Register instruction provides access to the status register. ister control bits are shown in Table 4. block-protected sections in the memory array are disabled. Table 1. Instruction Set for the AT25080/160/320/640 Table 2. Status Register Format Table 3. Read Status Register Bit Definition 0 = 1 indicates the write cycle is in progress. Bits 4-6 are 0s when device is not in an internal write cycle. Bits 0-7 are 1s during an internal write cycle. Table 4. Block Write Protect Bits

mands will be ignored except the RDSR instruction. clocking in the D0 (LSB) data bit. one; the high order bits of the address will remain constant. edge is required to re-initiate the serial communication. Table 5. WPEN Operation

0 X 0 Protected Protected Protected

0 X 1 Protected Writable Writable

1 Low 0 Protected Protected Protected

1 Low 1 Protected Writable Protected

Table 6. Address Key

Synchronous Data Timing (for Mode 0) WREN Timing WRDI Timing SO VOH V OL HI-Z HI-Z tV VALID INSI VIH V IL tHtSU tDIS SCK V IH V IL tWH tCSH CS VIH V IL tCSS tCS tWL tHO

0123456789 1 0 1 1 1 2 1 3 1 4 SI INSTRUCTION SO 76543210 DATA OUT MSB HIGH IMPEDANCE HIGH IMPEDANCE INSTRUCTION DATA IN 8 9 10 11 12 13 14 15 CS SCK SI SO CS SCK SI SO ... 89 1 0 15 14 13 11 20 21 22 23 24 25 26 27 28 29 30 HIGH IMPEDANCE INSTRUCTION BYTE ADDRESS MSB DATA OUT

3 3... 89 1 0 15 14 13 11 20 21 22 23 24 25 26 27 28 29 30 31 HIGH IMPEDANCE CS SCK SI SO INSTRUCTION BYTE ADDRESS DATA IN SO SCK HO LD tCD tHD tHZ tLZ tCD tHD CS

tWC (max) (ms) ICC (max) (µµµµA) ISB (max) (µµµµA) fMAX (kHz) Ordering Code Package Operation Range 5 5000 2.0 2100 A T25080-10PC A T25080N-10SC A T25080T1-10TC 8P3 8S1 14T Commercial (0°C to 70°C) 10 3000 0.5 2100 A T25080-10PC-2.7 A T25080N-10SC-2.7 A T25080T1-10TC-2.7 8P3 8S1 14T Commercial (0°C to 70°C) 20 3000 0.2 500 A T25080-10PC-1.8 A T25080N-10SC-1.8 A T25080T1-10TC-1.8 8P3 8S1 14T Commercial (0°C to 70°C) 5 5000 2.0 2100 A T25080-10PI A T25080N-10SI A T25080T1-10TI 8P3 8S1 14T Industrial (-40°C to 85°C) 10 3000 0.5 2100 A T25080-10PI-2.7 A T25080N-10SI-2.7 A T25080T1-10TI-2.7 8P3 8S1 14T Industrial (-40°C to 85°C) 20 3000 0.2 500 A T25080-10PI-1.8 A T25080N-10SI-1.8 A T25080T1-10TI-1.8 8P3 8S1 14T Industrial (-40°C to 85°C) Package Type 8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 14T 14-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -1.8 Low Voltage (1.8V to 3.6V)

tWC (max) (ms) ICC (max) (µµµµA) ISB (max) (µµµµA) fMAX (kHz) Ordering Code Package Operation Range 5 5000 2.0 2100 A T25160-10PC A T25160N-10SC A T25160T1-10TC 8P3 8S1 14T Commercial (0°C to 70°C) 10 3000 0.5 2100 A T25160-10PC-2.7 A T25160N-10SC-2.7 A T25160T1-10TC-2.7 8P3 8S1 14T Commercial (0°C to 70°C) 20 3000 0.2 500 A T25160-10PC-1.8 A T25160N-10SC-1.8 A T25160T1-10TC-1.8 8P3 8S1 14T Commercial (0°C to 70°C) 5 5000 2.0 2100 A T25160-10PI A T25160N-10SI A T25160T1-10TI 8P3 8S1 14T Industrial (-40°C to 85°C) 10 3000 0.5 2100 A T25160-10PI-2.7 A T25160N-10SI-2.7 A T25160T1-10TI-2.7 8P3 8S1 14T Industrial (-40°C to 85°C) 20 3000 0.2 500 A T25160-10PI-1.8 A T25160N-10SI-1.8 A T25160T1-10TI-1.8 8P3 8S1 14T Industrial (-40°C to 85°C) Package Type 8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 14T 14-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -1.8 Low Voltage (1.8V to 3.6V)

tWC (max) (ms) ICC (max) (µµµµA) ISB (max) (µµµµA) fMAX (kHz) Ordering Code Package Operation Range 5 5000 2.0 2100 A T25320-10PC A T25320N-10SC A T25320T1-10TC A T25320T2-10TC 8P3 8S1 14T 20T Commercial (0°C to 70°C) 10 3000 0.5 2100 A T25320-10PC-2.7 A T25320N-10SC-2.7 A T25320T1-10TC-2.7 A T25320T2-10TC-2.7 8P3 8S1 14T 20T Commercial (0°C to 70°C) 20 3000 0.2 500 A T25320-10PC-1.8 A T25320N-10SC-1.8 A T25320T1-10TC-1.8 A T25320T2-10TC-1.8 8P3 8S1 14T 20T Commercial (0°C to 70°C) 5 5000 2.0 2100 A T25320-10PI A T25320N-10SI A T25320T1-10TI A T25320T2-10TI 8P3 8S1 14T 20T Industrial (-40°C to 85°C) 10 3000 0.5 2100 A T25320-10PI-2.7 A T25320N-10SI-2.7 A T25320T1-10TI-2.7 A T25320T2-10TI-2.7 8P3 14T 20T Industrial (-40°C to 85°C) 20 3000 0.2 500 A T25320-10PI-1.8 A T25320N-10SI-1.8 A T25320T1-10TI-1.8 A T25320T2-10TI-1.8 8P3 8S1 14T 20T Industrial (-40°C to 85°C) Package Type 8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 14T 14-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 20T 20-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -1.8 Low Voltage (1.8V to 3.6V)

tWC (max) (ms) ICC (max) (µµµµA) ISB (max) (µµµµA) fMAX (kHz) Ordering Code Package Operation Range 5 5000 2.0 2100 A T25640-10PC A T25640N-10SC A T25640T1-10TC A T25640T2-10TC 8P3 8S1 14T 20T Commercial (0°C to 70°C) 10 3000 0.5 2100 A T25640-10PC-2.7 A T25640N-10SC-2.7 A T25640T1-10TC-2.7 A T25640T2-10TC-2.7 8P3 8S1 14T 20T Commercial (0°C to 70°C) 20 3000 0.2 500 A T25640-10PC-1.8 A T25640N-10SC-1.8 A T25640T1-10TC-1.8 A T25640T2-10TC-1.8 8P3 8S1 14T 20T Commercial (0°C to 70°C) 5 5000 2.0 2100 A T25640-10PI A T25640N-10SI A T25640T1-10TI A T25640T2-10TI 8P3 8S1 14T 20T Industrial (-40°C to 85°C) 10 3000 0.5 2100 A T25640-10PI-2.7 A T25640N-10SI-2.7 A T25640T1-10TI-2.7 A T25640T2-10TI-2.7 8P3 8S1 14T 20T Industrial (-40°C to 85°C) 20 3000 0.2 500 A T25640-10PI-1.8 A T25640N-10SI-1.8 A T25640T1-10TI-1.8 A T25640T2-10TI-1.8 8P3 8S1 14T 20T Industrial (-40°C to 85°C) Package Type 8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 14T 14-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 20T 20-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -1.8 Low Voltage (1.8V to 3.6V)

.400 (10.16) .355 (9.02) PIN .280 (7.11) .240 (6.10) .037 (.940) .210 (5.33) MAX SEATING PLANE .100 (2.54) BSC .015 (.380) MIN .022 (.559) .014 (.356) .150 (3.81) .115 (2.92) .070 (1.78) .045 (1.14) .325 (8.26) .300 (7.62)

15 REF

.430 (10.9) MAX .012 (.305) .008 (.203) .020 (.508) .013 (.330) PIN 1 .157 (3.99) .150 (3.81) .244 (6.20) .228 (5.79) .050 (1.27) BSC .196 (4.98) .189 (4.80) .068 (1.73) .053 (1.35) .010 (.254) .004 (.102) 8 REF .010 (.254) .007 (.203) .050 (1.27) .016 (.406) 5.10 (.201) .650 (.026) BSC 0.20 (.008) 0.09 (.004) 0.15 (.006) 0.05 (.002) INDEX MARK 6.50 (.256) 6.25 (.246) SEATING PLANE 4.50 (.177) 4.30 (.169) PIN 0.75 (.030) 0.45 (.018)

8 REF

0.30 (.012) 0.19 (.007) 6.60 (.260) .650 (.026) BSC 0.20 (.008) 0.09 (.004) 0.15 (.006) 0.05 (.002) INDEX MARK 6.50 (.256) 6.25 (.246) SEATING PLANE 4.50 (.177) 4.30 (.169) PIN 0.75 (.030) 0.45 (.018) 0.30 (.012) 0.19 (.007) 8P3, 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 BA 8S1, 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Dimensions in Inches and (Millimeters) 14T, 14-Lead, 0.170" Wide, Thin Super Small Outline Package (TSSOP) Dimensions in Inches and (Millimeters) 20T, 20-Lead, 0.170" Wide, Thin Super Small Outline Package (TSSOP) Dimensions in Inches and (Millimeters)