ASDL-3007 AVAGO | Alldatasheet

Document overview

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Technical content

Features

  • Operating temperature from -25°C to +85°C - Critical parameters are guaranteed over temperature and supply voltage
  • Vcc Supply 2.4 to 3.6V
  • Miniature Package - Height : 1.60 mm - Width : 7.00 mm - Depth : 2.80 mm
  • Moisture Level 3
  • Integrated remote control LED driver
  • LED Stuck-High Protection
  • High EMI performance without shield
  • Designed to Accommodate Light Loss with Cosmetic Windows
  • IEC 825-Class 1 Eye Safe
  • Lead Free and ROHS Compliant IrDA Features
  • Fully Compliant to IrDA 1.4 Physical Layer Low Power Specifications from 9.6 kbit/s to 115.2 kbit/s
  • Link distance up to 50cm typically
  • Complete shutdown
  • Low Power Consumption - Low shutdown current - Low idle current Remote Control Features
  • Wide angle and high radiant intensity
  • Spectrally suited to remote control transmission function
  • Typical link distance up to 8 meter

Application Support Information The Application Engineering Group is available to assist you with the application design associated with ASDL- 3007 infrared transceiver module. You can contact them through your local sales representatives for additional details. Order Information Part Number Packaging Type Package Quantity ASDL-007-021 Tape and Reel Front Option 2500 I/O Pins Configuration Table Pin Symbol Description I/O Type Notes

1 LEDA LED Anode Note 1

2 SD Shutdown Input. Active High Note 2 TxD_IR IrDA transmitter data input. Input. Active High Note 4 RxD IrDA receive data Output. Active Low Note 4

5 Vcc Supply Voltage Note 5

6 TxD_RC RC transmitter data input. Input. Active High Note 6

7 NC Note 7

8 GND Ground Note 8

Notes: 1. Tied through external resistor, R1, to Vled. Refer to the table below for recommended series resistor value. 2. Complete shutdown of IC and PIN diode. The pin is used for setting receiver bandwidth and RC drive programming mode. Refer to section on “Bandwidth Selection Timing” and “Remote Control Drive Modes” for more information. Do NOT float this pin. 3. This pin is used to transmit serial data when SD pin is low. If held high for longer than 50 ms, the LED is turned off. Do NOT float this pin. 4. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required. The pin is in tri-state when the transceiver is in shutdown mode. 5. Regulated, 2.4V to 3.6V 6. Logic high turns on the RC LED. If held high longer than 50 ms, the RC LED is turned off. Do NOT float the pin. 7. NC. 8. Connect to system ground. CAUTIONS: The CMOS inherent to the design of this component increases the component’s susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD Marking Information The unit is marked with ‘PYWWLL ’ on the back of the PCB for front option without shield. P = Product Code Y = Year WW = Work Week LL = Lot Number

Recommended Application Circuit Components Component Recommended Value Note R1 2.7 ohm ±5%, 0.25W for 2.4V≤ Vled≤2.7V .9 ohm ±5%, 0.25W for 2.7V≤ Vled≤.0V 5.6 ohm ±5%, 0.25W for .0V≤ Vled≤.V 9.1 ohm ±5%, 0.25W for .V≤ Vled≤4.2V R2 4.7 ohm ±5% 2 CX1 100 nF , ± 20%, X7R Ceramic 1 CX2,CX 4.7mF , ± 20%, Tantalum 1 Notes : 1. CX1, CX2 must be placed within 0.7cm of ASDL-3007 to obtain optimum noise immunity 2. To reduce noise at VCC. Absolute Maximum Ratings For implementations where case to ambient thermal resistance is ≤ 50°C/W. Parameter Symbol Min. Max. Units Conditions Notes Storage Temperature TS -40 +100 °C Operating Temperature TA -25 +85 °C LED Anode Voltage VLEDA 0 6.5 V VledA < Vcc + 4V Supply Voltage VCC 0 6.5 V Input Voltage : TXD VTXD 0 Vcc V Input Voltage : SD/Mode VSD 0 Vcc V Output Voltage : RXD VO 0 Vcc V DC LED Transmit Current ILED (DC) 2 mA Peak Transmit Current (RC) ILED (PK)_RC 1 A ≤ 8% duty cycle, ≤ 90 ms pulse width 1 Peak Transmit Current (IrDA) ILED (PK)_IR 0.5 A ≤ 20% duty cycle, ≤ 90 ms pulse width 2 Notes: 1. This peak current is specified for RC mode 2. This peak current is specified for IrDA mode

Recommended Operating Conditions Parameter Symbol Min. Typ. Max. Units Conditions Operating Temperature TA -25 +85 °C Supply Voltage VCC 2.4 .6 V LED Anode Voltage VLEDA 5.5 V VledA < Vcc + 4V Logic Input Voltage for TXD IR Logic High VIH-IR Vcc-0.5 Vcc V Logic Low VIL-IR 0 0.4 V Logic Input Voltage for TXD RC Logic High VIH-RC Vcc-0.5 Vcc V Logic Low VIL-RC 0 0.4 V Logic Input Voltage for SD Logic High VIH-SD Vcc-0.5 Vcc V Logic Low VIL-SD 0 0.4 V Receiver Input Irradiance Logic High EIH 0.0090 500 mW/cm2 For in-band signals ≤ 115.2kbit/s [] Logic Low EIL 0. mW/cm2 For in-band signals [] LED (Logic High) Current Pulse Amplitude (IR) ILEDA 40 mA LED (Logic High) Current Pulse Amplitude (RC) ILEDA 150 mA Receiver Data Rate 9.6 115.2 kbit/s Ambient Light See IrDA Serial Infrared Physical Layer Link Specification, Appendix A for ambient levels Note : [1] An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 ≤ lp ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.

Electrical and Optical Specifications Specifications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25 °C, Vcc set to 3.0V unless otherwise noted. Parameter Symbol Min. Typ. Max. Units Conditions Receiver Viewing Angle 2q1/2 0 ° Peak Sensitivity Wavelength lP 875 nm RxD_IrDA Output Voltage Logic High VOH Vcc-0.5 Vcc V IOH = -200 mA, EI ≤ 0. mW/cm2 Logic Low VOL 0 0.4 V RxD_IrDA Pulse Width (SIR) [2] tRPW(SIR) 1 4 ms q1/2 ≤ 15°, CL=9pF RxD_IrDA Rise & Fall Times tr, tf 60 ns CL=9pF Receiver Latency Time [] tL 200 ms EI = 4.0 mW/cm2 Receiver Wake Up Time [4] tRW 200 ms EI = 10 mW/cm2 Transmitter (IrDA Mode) IR Radiant Intensity IEH 4 19 mW/sr ILEDA =40mA, TxD_IR ≥ VIH, TA = 25°C IR Viewing Angle 2q1/2 0 60 ° IR Peak Wavelength lP 885 nm TxD_IrDA Logic Levels High VIH-IR Vcc-0.5 Vcc V Low VIL-IR 0 0.5 V TxD_IrDA Input Current High IH-IR 0.01 1 mA VI ≥ VIH Low IL-IR 2 10 mA 0 ≤ VI ≤ VIL LED Current Shutdown IVLED 0.01 10 mA VSD ≥ VH-SD, Wake Up Time [5] tTW 0.2 10 ms Maximum Optical Pulse Width [6] tPW(Max) 50 120 ms TXD Pulse Width (SIR) tPW(SIR) 1.6 ms tPW(TXD_IR)=1.6ms at 115.2 kbit/s TxD Rise & Fall Times (Optical) tr, tf 600 ns tPW(TXD_IR)=1.6ms at 115.2 kbit/s LED Anode On-State Voltage VON (LEDA) 2.8 V ILEDA=40mA, VI(TxD) ≥ VIH Transmitter (Remote Control Mode) RC Radiant Intensity IEH 70 mW/sr ILEDA = 150mA, q1/2 ≤ 15°, TxD_RC ≥ VIH, TA = 25 °C RC Viewing Angle 2q1/2 0 60 ° RC Peak Wavelength lP 885 nm TxD_RC Logic Levels High VIH Vcc-0.5 VCC V Low VIL 0 0.5 V TxD_RC Input Current High IH 0.01 1 mA VI ≥ VIH Low IL 2 10 mA 0 ≤ VI ≤ VIL Maximum Optical Pulse Width [8] tPW(Max) 60 ms LED Anode On-State Voltage VON (LEDA) 1.9 V ILEDA=150mA, VI(TxD) ≥ VIH

Parameters Symbol Min. Typ. Max. Units Conditions Logic Input Voltage for SD Logic High VIH-SD Vcc-0.5 Vcc V Logic Low VIL-SD 0 0.4 V Supply Current Shutdown ICC1 0.0 1 mA Vsd ≥ 1.5V Idle (Standby) ICC2 60 80 mA VI(TxD) ≤ VIL, EI=0 Active ICC 50 mA VI(TxD) ≥ VIL, EI=10mW/cm2 Note: [2] For in-band signals 9.6 kbit/s to 115.2 kbit/s where 3.6 μW/cm2 ≤ EI ≤ 500 mW/cm2. [3] Latency is defined as the time from the last TxD_IrDA light output pulse until the receiver has recovered full sensitivity. [4] Receiver Wake Up Time is measured from Vcc power ON to valid RxD_IrDA output. [5] Transmitter Wake Up Time is measured from Vcc power ON to valid light output in response to a TxD_IrDA pulse. [6] The Optical PW is defined as the maximum time which the LED will turn on. This is to prevent the long turn on time for the LED. SIR Mode Typical ILED vs VLEDA at VCC=3.6V and Temp=25C 0.036288 0.038304 0.04032 0.042336 0.044352 VLEDA (V) ILED (A) SIR Mode Typical LOP vs ILED at VCC=3.6V and Temp=25C ILED (A) LOP (mW/Sr) RC Mode Typical ILED vs VLEDA at VCC=3.6V and Temp=25C 0.05 0.1 0.15 0.2 0.25 0.3 0.35 VLEDA (V) ILED (A) RC Mode Typical LOP vs ILED at VCC=3.6V and Temp=25C 100 110 120 130 140 ILED (A) LOP (mW/Sr)

TXD “Stuck ON” Protection LED Optical Waveform RXD Output Waveform Receiver wakeup time waveform TXD wakeup time waveform

Tape and Reel Dimensions (Cont.)

ASDL-3007 Moisture Proof Packaging All ASDL-3007 options are shipped in moisture proof package. Once opened, moisture absorption begins. This part is compliant to JEDEC Level 3. NO UNITS IN A SEALED MOISTURE-PROOF PACKAGE ENVIRONMENT LESS THAN 30 oC AND LESS THAN 60% RH PACKAGE IS OPENED (UNSEALED) PACKAGE IS OPENED LESS THAN 168 HOURS NO BAKING IS NECESSARY YES YES NO NO PARTS ARE NOT RECOMMENDED TO BE USED PERFORM RECOMMENDED BAKING CONDITIONS PACKAGE IS OPENED LESS THAN 15 DAYS YES

Recommended Storage Conditions Storage Temperature 10 °C to 0 °C Relative Humidity Below 60% RH Time from unsealing to soldering After removal from the bag, the parts should be soldered within 7 days if stored at the recommended storage con - ditions. When MBB (Moisture Barrier Bag) is opened and the parts are exposed to the recommended storage con - ditions more than 7 days but less than 15 days the parts must be baked before reflow to prevent damage to the parts. Note: To use the parts that exposed for more than 15 days is not recommended. Baking Conditions If the parts are not stored per the recommended storage conditions they must be baked before reflow to prevent damage to the parts. Package Temp Time In reels 60 °C ≥ 48hours In bulk 100 °C ≥ 4hours Note: Baking should only be done once.

Recommended Reflow Profile Process Zones Symbol DT Maximum DT/Dtime or Duration Heat Up P1, R1 25°C to 150°C °C/s Solder Paste Dry P2, R2 150°C to 200°C 100s to 180s Solder Reflow P, R P, R4 200°C to 260°C 260°C to 200°C °C/s -6°C/s Cool Down P4, R5 200°C to 25°C -6°C/s Time maintained above liquidus point , 217°C > 217°C 60s to 90s Peak Temperature 260°C - Time within 5°C of actual Peak Temperature - 20s to 40s Time 25°C to Peak Temperature 25°C to 260°C 8mins The reflow profile is a straight-line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different DT/Dtime temperature change rates or duration. The DT/Dtime rates or duration are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and ASDL-3007 pins are heated to a temperature of 150°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 3°C per second to allow for even heating of both the PC board and ASDL-3007 pins. Process zone P2 should be of sufficient time duration (100 to 180 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder. Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 260°C (500°F) for optimum results. The dwell time above the liquidus point of solder should be between 60 and 90 seconds. This is to assure proper coalescing of the solder paste into liquid solder and the formation of good solder connections. Beyond the recommended dwell time the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 6°C per second maximum. This limitation is necessary to allow the PC board and ASDL- 3007 pins to change dimensions evenly, putting minimal stresses on the ASDL-3007. It is recommended to perform reflow soldering no more than twice. 50 100 150 200 250 300 t-TIME (SECONDS) 120 150 180 200 230 255 T - TEMPERATURE (°C) R3 R4 217 MAX 260°C 60 sec to 90 sec Above 217°C HEAT UP SOLDER PASTE DRY SOLDER REFLOW COOL DOWN

Appendix A: ASDL-3007 SMT Assembly Application Note Solder Pad, Mask and Metal Stencil Adjacent Land Keepout and Solder Mask Areas Adjacent land keepout is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.25mm.It is recommended that two fi - ducially crosses be placed at mid length of the pads for unit alignment. Note: Wet/Liquid Photo-imaginable solder resist/mask is recommended Dimension mm h 0.25 l 1.5 k .0 j 8.0 Figure A1. Stencil and PCBA Recommended land pattern Figure A2. Recommended Land Pattern Recommended Metal solder Stencil Aperture It is recommended that a 0.127 mm (0.005 inch) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the Table 1 below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. Figure A3. Solder stencil aperture Table 1 Stencil thickness, t (mm) Aperture size (mm) Length, l Width, w Figure A4. Adjacent Land Keepout and Solder Mask Area Metal Stencil For Solder Paste Printing Stencil Aperture Solder Mask Land Pattern PCBA 0.75 FIDUCIAL 1.7 0.425 0.85 0.350.50 0.10 MOUNTING CENTER w l Apertures As Per Land Dimensions t l kh j SOLDER MASK UNITS: mm

Appendix B: PCB Layout Suggestion The ASDL-3007 is a shieldless part and hence does not contain a shield trace unlike the other transceivers. The effects of EMI and power supply noise can potentially reduce the sensitivity of the receiver, resulting in reduced link distance. The following PCB layout guidelines should be followed to obtain a good PSRR and EM immunity resulting in good electrical performance. Things to note: 1. The ground plane should be continuous under the part. 2. VLED and Vcc can be connected to either unfiltered or unregulated power supply. If VLED and Vcc share the same power supply, CX3 need not be used. The connections for CX1 and CX2 should be connected before the current limiting resistor R1. Top Layer Bottom Layer Top layer Connect the module ground pin to bottom ground layer Layer 2 Critical ground plane zone. Do not connect directly to the module ground pin Layer 3 Keep data bus away from critical ground plane zone Bottom layer (GND) 3. CX1 is generally a ceramic capacitor of low inductance providing a wide frequency response while CX2 and CX3 are tantalum capacitor of big volume and fast frequency response. The use of a tantalum capacitor is more critical on the VLED line, which carries a high current. 4. Preferably a multi-layered board should be used to provide sufficient ground plane. Use the layer underneath and near the transceiver module as Vcc, and sandwich that layer between ground connected board layers. The diagrams below demonstrate an example of a 4-layer board : The area underneath the module at the second layer, and 3cm in all direction around the module is defined as the critical ground plane zone. The ground plane should be maximized in this zone. The layout below is based on a 2-layer PCB.

Appendix C: General Application Guide for the ASDL-3007 Infrared IrDA® Compliant 115.2kb/s Transceiver Figure C1. Mobile Application Platform

Description

The ASDL-3007, a wide-voltage operating range infrared transceiver, is a low-cost and ultra small form factor device that is designed to address the mobile computing market such as PDAs, as well as small embedded mobile products such as digital cameras and cellular phones. It is spectrally suited to universal remote control transmis - sion function. It is fully compliant to IrDA 1.4 low power specification from 9.6kb/s to 115.2kb/s, and support most remote control codes. The design of ASDL-3007 also includes the following unique features:

  • Spectrally suited to universal remote control transmission function;
  • Low passive component count;
  • Shutdown mode for low power consumption requirement; Figure C2. PDA Platform Selection of Resistor R1 Resistor R1 should be selected to provide the appropri - ate peak pulse LED current at different ranges of Vcc as shown on page 4 under “Recommended Application circuit components” . Interface to the Recommended I/O chip The ASDL-3007’s TXD data input is buffered to allow for CMOS drive levels. No peaking circuit or capacitor is required. Data rate from 9.6kb/s up to 115.2kb/s is available at RXD pin. The TXD_RC, pin6, is used to select the remote control transmit mode. Alternatively, the TXD_IR, pin3, is used for infrared transmit selection. Figures C1 and C2 show how ASDL-3007 fits into a mobile phone and PDA platform respectively. ASIC Controller DSP Core Microcontroller Audio Interface RF Interface Transceiver Mod/De-modulator User Interface Speaker Microphone IR RC RAM ROM PCMCIA Controller RS232C Driver COM Port LCD Panel Touch Panel CPU for embedded application RC IR

Figure C3. Reference design circuit for IrDA+RC transceiver Remote Control Operation The ASDL-3007 is spectrally suited to universal remote control transmission function. Remote control applica - tions are not governed by any standards, owing to which there are numerous remote codes in market. Each of those standards results in receiver modules with different sensitivities, depending on the carries frequencies and responsively to the incident light wavelength. Figure C3 illustrate a reference interfacing circuit to implement both IrDA and RC functionality using ASDL- 3007. The transceiver is directly interface with the micro - processor provided it has support for infrared commu - GND GND A SDL - 3007 GPIO (6) TXD_RC (4) RXD (2) SD IR_RXD GPIO IR_TXD 100Kohm (3) TXD_IR VLED CX3 (1) LEDA 100Kohm GND GND CX1 CX2 (5) V CC (8) GND VCC (7) NC nication commonly known as Infrared Communications Port (ICP). The remote control commands can be sent through one of the available General Purpose IO pins (GPIO). It is not recommended to turn on both IrDA data transmission and Remote control transmission simulta - neously to prevent mixing and corruption of data. During IrDA data transmission, TxD_RC pin should be pull-down but not letting it floating. Same condition applied for Remote control transmission, which TxD_IR pin should not be left floating.

Appendix D: Window Design for ASDL-3007 Window Dimension To ensure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions ensure that the IrDA cones angles are met without vignetting. The maximum dimensions minimize the effects of stray light. The minimum size corresponds to a cone angle of 300 and the maximum size corre - sponds to a cone angle of 600. Module Depth (z) mm Aperture Width (x, mm) Aperture Height (y, mm) Max min Max Min 0 10.09 7.42 4.99 2.2 1 11.24 7.95 6.14 2.85 2 12.40 8.49 7.0 .9 1.55 9.02 8.45 .92 4 14.71 9.56 9.61 4.46 5 15.86 10.09 10.76 4.99 6 17.02 10.6 11.92 5.5 7 18.17 11.17 1.07 6.07 8 19. 11.70 14.2 6.60 9 20.48 12.24 15.8 7.14 Figure D2. Aperture Height (x) vs. Module Depth (z)Figure D1. Window Design for ASDL-3007 In figure D1, X is the width of the window, Y is the height of the window and Z is the distance from the ASDL-3007 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens, K, is 5.1mm. The equations for computing the window dimen- sions are as follows: X = K + 2*(Z+D)*tanA Y = 2*(Z+D)*tanA The above equations assume that the thickness of the window is negligible compared to the distance of the module from the back of the window (Z). If they are com - parable, Z’ replaces Z in the above equation. Z’ is defined as Z’=Z+t/n where ‘t’ is the thickness of the window and ‘n’ is the re - fractive index of the window material. The depth of the LED image inside the ASDL-3007, D, is 4.32mm. ‘A’ is the required half angle for viewing. For IrDA compliance, the minimum is 150 and the maximum is 300. Assuming the thickness of the window to be neg - ligible, the equations result in the following table and figures: K Z X Y D IR Transparent WindowOPAQUE MATERIAL IR Transparent Window OPAQUE MATERIAL A 0 1 2 3 4 5 6 7 8 9 Module Depth (z) mm Aperture Width (x) mm Xmax Xmin Figure D3. Aperture Height (y) vs. Module Depth (z) 0 1 2 3 4 5 6 7 8 9 Module Depth (z) mm Aperture Height (Y) mm Ymax Ymin The recommended minimum aperture width and height is based on the assumption that the center of the window and the center of the module are the same. It is recom - mended that the tolerance for assembly be considered as well. The minimum window size which will take into acount of the assembly tolerance is defined as: X (min + assembly tolerance) = Xmin + 2*(assembly tolerance) (Dimensions are in mm) Y (min + assembly tolerance) = Ymin + 2*(assembly tolerance) (Dimensions are in mm)

Almost any plastic material will work as a window material. Polycarbonate is recommended. The surface finish of the plastic should be smooth, without any texture. An IR filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10% or less for best optical performance. Light loss should be measured at 885 nm. The recommended plastic materials for use as a cosmetic window are available from General Electric Plastics. Recommended Plastic Materials: Material # Light Transmission Haze Refractive Index Lexan 141 88% 1% 1.586 Lexan 920A 85% 1% 1.586 Lexan 940A 85% 1% 1.586 Note: 920A and 940A are more flame retardant than 141. Recommended Dye: Violet #21051 (IR transmissant above 625mm) Shape of the Window From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. If the window must be curved for mechani - cal or industrial design reasons, place the same curve on the backside of the window that has an identical radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. The amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycar - bonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. Flat Window (First Choice) Curved Front and Back (Second Choice) Curved Front, Flat Back (Do not use) For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. AV02-0454EN - June 21, 2007