AS7262 AMSOSRAM | Alldatasheet
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Datasheet, Public Page 1 [v4-00] 2022-Nov-30 Document Feedback AS7262 6-Channel Visible Spectral_ID Device with Electronic Shutter and Smart Interface The AS7262 is a cost-effective multi-spectral sensor-on-chip solution designed to address sp ectral ID applications. This highly integrated device delivers 6-channel multi-spectral sensing in the visible wavelengths from approximately 430nm to 670nm with full-width half-max (FWHM) of 40nm. An integrated LED driver with programmable current is provided for electronic shutter applications. The AS7262 integrates Gaussian filters into standard CMOS silicon via nano-optic deposited interference filter technology and is packaged in an LGA package that provides a built in aperture to control the ligh t entering the sensor array. Control and spectral data access is implemented through either the I²C register set, or with a high level AT Spectral Command set via a serial UART. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS7262, 6-Channel Visible Spectral_ID Device with Electronic Shutter and Smart Interface are listed below: Figure 1: Added Value of Using AS7262 Benefits Features
- Compact 6-channel spectrometry solution • 6 visible channels: 450nm, 500nm, 550nm, 570nm, 60 0nm and 650nm, each with 40nm FWHM
- Simple text-based command interface via UART, or direct register read and write with interrupt on sensor ready option on I²C
- UART or I²C slave digital Interface
- Lifetime-calibrated sensing with minimal drif t ov er time or temperature • Visible filter set realized by silicon interference filters
- No additional signal conditioning required • 16-bit ADC with digital access
- Electronic shutter control/synchronization • Programmable LED drivers
- Low voltage operation • 2.7V to 3.6V with I²C interface
- Small, robust package, with built-in aperture • 20-pin LGA package 4.5mm x 4.7mm x 2.5mm -40°C to 85°C temperature range General Description
Page 2 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − General Description
Applications
The AS7262 applications include:
- Portable spectrometry
- Horticulture
- Color matching and identification
- Authentication and brand protection
- Precision color tuning/calibration Block Diagram The system blocks of this device are shown below. Figure 2: AS7262 Visible Spectral_ID System 100nF RX / SCL_S GND LED_DRV SCK CSN_EE MISO MOSI VDD1 VDD2 AS7262 μP 10μF TX / SDA_S LED_IND Flash Memory 6-channel Visible Sensor Light Source Light in Reflective Surface INT
Page 4 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Pin Assignments 15 LED_DRV LED Driver Output for Driving LED, Current Sink. 16 GND Ground. 17 VDD1 Voltage Supply. 18 LED_IND LED Driver Output for Indicator LED, Current Sink. 19 NF Not Functional. Do not connect. 20 NF Not Functional. Do not connect. Pin Number Pin Name Description
Datasheet, Public Page 5 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The device is not designed for high energy UV (ultraviolet) environments, including upward looking outdoor applications, which could affect long term optical performance. Figure 5: Symbol Parameter Min Max Units Comments Electrical Parameters VDD1_MAX Supply voltage VDD1 -0.3 5 V Pin VDD1 to GND VDD2_MAX Supply voltage VDD2 -0.3 5 V Pin VDD2 to GND VDD_IO Input/Output pin voltage -0.3 VDD+0.3 V Input/Output Pin to GND ISCR Input current (latch-up immunity) ± 100 mA JESD78D Electrostatic Discharge ESDHBM Electrostatic discharge HBM ± 1000 V JS-001-2014 ESDCDM Electrostatic discharge CDM ± 500 V JSD22-C101F Temperature Ranges and Storage Conditions TSTRG Storage temperature range -40 85 °C IPC/JEDEC J-STD-020 The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State Surface Mount Devices.” RH NC Relative humidity (non-condensing) 58 5 % MSL Moisture sensitivity level 3 Maximum floor life time of 168 hours Absolute Maximum Ratings
Page 6 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Electrical Characteristics All limits are guaranteed with VDD = VDD1 = VDD2 = 3.3V, TAMB = 25 °C. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Figure 6: Symbol Parameter Conditions Min Typ Max Unit General Operating Conditions VDD1 /VDD2 Voltage operating supply UART interface 2.97 3.3 3.6 V VDD1 /VDD2 Voltage operating supply I²C Interface 2.7 3.3 3.6 V TAMB Operating temperature -40 25 85 °C IVDD Operating current 5 mA Internal RC Oscillator FOSC Internal RC oscillator frequency 15.7 16 16.3 MHz tJITTER (1) Internal clock jitter @25°C 1.2 ns Temperature Sensor DTEMP Absolute accuracy of the internal temperature measurement -8.5 8.5 °C Indicator LED I IND LED current 1 4 8 mA IACC Accuracy of current -30 30 % VLED Voltage range of connected LED Vds of current sink 0.3 VDD V LED_DRV ILED1 LED current 12.5, 25, 50 or 100 12.5 100 mA IACC Accuracy of current -10 10 % VLED Voltage range of connected LED Vds of current sink 0.3 VDD V
Electrical Characteristics
Datasheet, Public Page 7 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Electrical Characteristics Note(s): 1. Guaranteed, not tested in production Digital Inputs and Outputs IIH, IIL Logic input current Vin=0V or VDD -1 1 μA IIL RESN Logic input current (RESN pin) Vin=0V -1 -0.2 mA VIH CMOS logic high input 0.7* VDD VDD V VIL CMOS logic low input 0 0.3* VDD V VOH CMOS logic high output I=1mA VDD-0.4 V VOL CMOS logic low output I=1mA 0.4 V tRISE (1) Current rise time C(Pad)=30pF 5 ns tFALL (1) Current fall time C(Pad)=30pF 5 ns Symbol Parameter Conditions Min Typ Max Unit
Page 10 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Timing Characteristics Figure 11: SPI Master Read Timing Diagram tDI _ V CSN_xx MOSI MISO SCK LSB tSCK _H tSCK_L Dont care MSB
Datasheet, Public Page 11 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Optical Characteristics Figure 12: Optical Characteristics of AS7262 (Pass Band) (1) Note(s): 1. Calibration and measurements are made using diffused light 2. Each channel is tested with GAIN = 16x, Integration Time (INT_T) = 16 6ms and VDD = VDD1 = VDD2 = 3.3V, T AMB=25°C 3. The accuracy of the channel counts/μW/cm 2 is ±12% 4. The light source is either a 5700K wh ite LED with an irra diance of ~600μW/cm 2, or an incandescent ligh t with an irradiance of ~1500 μW/cm 2 (300-1000nm). The energy at each channel (V, B, G, Y, O, R) is calculated with a ±40nm bandwidth around the center wavelengths (450nm, 500nm, 550nm, 570nm, 600nm, 650nm). Symbol Parameter Test Conditions Channel (nm) Min Typ Max Unit V Channel V 5700K White LED (2), (4) 450 45 (3), (4) counts/ (μW/cm2) B Channel B 5700K White LED (2), (4) 500 45 (3), (4) counts/ (μW/cm2) G Channel G 5700K White LED (2), (4) 550 45 (3), (4) counts/ (μW/cm2) Y Channel Y 5700K White LED (2), (4) 570 45 (3), (4) counts/ (μW/cm2) O Channel O 5700K White LED (2), (4) 600 45 (3), (4) counts/ (μW/cm2) R Channel R Incandescent (2), (4) 650 45 (3), (4) counts/ (μW/cm2) FWHM Full Width Half Max 40 40 nm Wacc Wavelength accuracy ±5 nm Dark Dark channel counts GAIN=64, TAMB=25°C 5 counts Optical Characteristics
Page 12 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Typical Optical Characteristics Figure 13: Spectral Responsivity Typical Optical Characteristics 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.1 350 400 450 500 550 600 650 700 750
Datasheet, Public Page 13 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description Figure 14: AS7262 Functional Block Diagram 6-Channel Visible Spectral_ID Detector The AS7262 6-channel Spectral_ID is a next-generation digital spectral sensor device. Each channel has a Gaussian filter characteristic with a full width half maximum (FWHM) bandwidth of 40nm. The sensor contains analog-to-digital converters (16-bit resolution ADC), which integrate the current from each channel’s photodiode. Upon completion of the conversion cycle, the integrated result is transferred to the corresponding data registers. The transfers are double-buffered to ensure that the integrity of the data is maintained. Interference filters enable high temperature stability and minimal lifetime drift. Filter accuracy will be affected by the angle of incidence which itself is limited by integrated aperture and internal micro-lens structure. The aperture-limited field of view is ±20.0° to deliver specified accuracy. Detailed Description RC Osc Spectral_ID Engine VDD1 VDD2 GND 16MHz MISO SCK MOSI CSN_SD RESN SPI Master TX / SDA_S RX / SCL_S UART / I2C LED_DRV V BG Multi Spectral Sensor Y LED_IND O R I2C_ENB INT
Page 14 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Detailed Description Data Conversion Description AS7262 spectral conversion is implemented via two photodiode banks per device. Bank 1 consists of data from the V, G, B, Y photodiodes. Bank 2 consists of data from the G, Y, O, R photodiodes. Spectral conversion requires the integration time (IT in ms) set to complete. If both photodiode banks are required to complete the conversion, the 2 nd bank requires an additional IT ms. Minimum IT for a single bank conversion is 2 . 8 m s. I f d a t a i s r e q u i re d f ro m all 6 photodiodes then the device must perform 2 full conversi ons (2 x Integration Time). The spectral conversion process is controlled with BANK Mode settings as follows: BANK Mode 0: Data will be available in registers V, B, G & Y (O and R registers will be zero) with conversions occurring continuously. BANK Mode 1: Data will be available in registers G, Y, O & R (V and B registers will be zero) with conversions occurring continuously. BANK Mode 2: Data will be available in registers V, B, G, Y, O & R with conversions occurring continuously. When the bank setting is Mode 0, Mode 1, or Mode 2, the spectral data conversion process operates continuously, with new data available after each IT ms period. In the continuous modes, care should be taken to assure prompt interrupt servicing so that integration values from both banks are all derived from the same spectral conversion cycle. BANK Mode 3: Data will be available in registers V, B, G, Y, O & R in One-Shot mode. When the bank setting is set to Mode 3 the device initiates One-Shot operation. The DATA_RDY bit is set to 1 once data is available, indicating spectral conversion is complete. One-Shot mode is intended for use when it is critical to ensure spectral conversion results are obtained contemporaneously. An example use for one-shot mode is when a digitally controlled illumination source is briefly turned on for the purpose of taking a set of filter readings.
Page 16 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Detailed Description RC Oscillator The timing generation circuit consists of an on-chip 16MHz, temperature compensated oscillator, which provides the master clock for the AS7262. Temperature Sensor The temperature sensor is constantly measuring the on-chip temperature and enables temperature compensation procedures. Reset Pulling down the RESN pin for longer than 100ms resets the AS7262. Figure 17: Reset Circuit Indicator LED The LED, connected to pin LED_IND, can be used to indicate programming progress of the device. While programming the AS7262 via the external SD card the indicator LED starts flashing (500ms pulses). When programming is completed the indicator LED is switched off. The LED (LED0) can be turned ON/OFF via AT commands or via I²C register control. The LED sink current is programmable from 1mA, 2mA, 4mA and 8mA. Reset AS7262 Spectral_ID Engine RESN Push > 100ms
Datasheet, Public Page 17 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description Electronic Shutter with LED_DRV Driver Control There are two LED driver outputs that can be used to control up to 2 LEDs. This will allow different wavelength light sources to be used in the same system. The LED output sink currents are programmable and can drive exte rnal LED sources: LED_IND from 1mA, 2mA, 4mA and 8mA and LED_DRV from 12.5mA, 25mA, 50mA and 100mA. The sources can be turned off and on via I²C registers control or AT commands and provides the device with an electronic shutter. Interrupt Operation If BANK is set to Mode 0 or Mode 1 then the data is ready after the 1st integration time. If BANK is set to Mode 2 or Mode 3 then the data is ready after two integration times. If the interrupt is enabled (INT = 1) then when the data is ready, the INT line is pulled low and DATA_RDY is set to 1. The INT line is released (returns high) when the control register is read. DATA_RDY is cleared to 0 when any of the sensor registers V, B, G, Y, O & R are read. For multi-byte sensor data (2 or 4 bytes), after the 1st byte is read the remaining get shadow buffer protected in case an integration cycle completes just after the 1st byte is read. In continuous spectral conversion mode (BANK setting of Mode 0, 1, or 2), the sensors continue to gather information at the rate of the integration time, hence if the sensor registers are not read when the interrupt line goes low, it will stay low and the next cycle’s sensor data will be available in the registers at the end of the next integration cycle. When the control register BANK bits are written with a value of Mode 3, One-Shot Spectral Conversion mode is entered. When a single set of contemporaneous sensor readings is desired, writing BANK Mode 3 to the control register immediately triggers exactly two spectral data conversion cycles. At the end of these two conversion cycles, the DATA_RDY bit is set as for the other BANK modes. To perform a new One-Shot sequence, the control register BANK bits should be written with a value of Mode 3 again. This process may continue until the user writes a different value into the BANK bits. I²C Slave Interface If selected by the I²C_ENB pin setting, interface and control can be accomplished through an I²C compatible slave interface to a set of registers that provide access to device control functions and output data. These registers on the AS7262 are, in reality, implemented as virtual registers in software. The actual I²C slave hardware registers number only three and are described in the table below. The steps necessary to access the virtual registers defined in the following are explained in ps eudocode for external I²C master writes and reads below.
Page 18 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Detailed Description I²C Feature List
- Fast mode (400kHz) and stan dard mode (100kHz) support.
- 7+1-bit addressing mode.
- Write format: Byte.
- Read format: Byte.
- SDA input delay and SCL spike filtering by integrated RC-components. Figure 18: I²C Slave Device Address and Physical Registers I²C Virtual Register Write Access I²C Virtual Register Byte Write shows the pseudocode necessary to write virtual registers on the AS7262. Note that, because the actual registers of interest are realized as virtual registers, a means of indicating whether ther e is a pending read or write operation of a given virtual register is needed. To convey this information, the most significan t bit of the virtual register address is used as a marker. If it is 1, then a write is pending, otherwise the slave is expecting a virtual read operation. The pseudocode illustrates the proper technique for polling of the I²C slave status register to ensure the slave is ready for each transaction. Entity Description Note Device Slave Address 8-bit Slave Address Byte = 1001001x (device address = 49 hex) x= 1 for Master Read (byte = 93 hex) x= 0 for Master Write (byte = 92 hex) STATUS Register I²C slave interface STATUS register Read-only Register Address = 0x00 Bit 1: TX_VALID 0 → New data may be written to WRITE register 1 → WRITE register occupied. Do NOT write. Bit 0: RX_VALID 0 → No data is ready to be read in READ register. 1 → Data byte available in READ register. WRITE Register I²C slave interface WRITE register Write-only Register Address = 0x01 8-Bits of data written by the I²C Master intended for receipt by the I²C slave. Used for both virtual register addresses and write data. READ Register I²C slave interface READ register Read-only Register Address = 0x02 8-Bits of data to be read by the I²C Master.
Datasheet, Public Page 19 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description I²C Virtual Register Byte Write Pseudocode Poll I²C slave STATUS register; If TX_VALID bit is 0, a write can be performed on the interface; Send a virtual register address and set the MSB of the register address to 1 to indicate the pending write; Poll I²C slave STATUS register; If TX_VALID bit is 0, the vi rtual register address for the write has been received and the data may now be written; Write the data. Sample Code: #define I2C_AS72XX_SLAVE_STATUS_REG 0x00 #define I2C_AS72XX_SLAVE_WRITE_REG 0x01 #define I2C_AS72XX_SLAVE_READ_REG 0x02 #define I2C_AS72XX_SLAVE_TX_VALID 0x02 #define I2C_AS72XX_SLAVE_RX_VALID 0x01 void i2cm_AS72xx_write(uint 8_t virtualReg, uint8_t d) volatile uint8_t status; while (1) // Read slave I²C status to see if the write buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave. Okay to write now. break; // Send the virtual register address (setti ng bit 7 to indicate a pending write). i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, (virtualReg | 0x80)); while (1) // Read the slave I²C status to see if the write buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave. Okay to write data now. break; // Send the data to co mplete the operation. i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, d);
Page 20 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Detailed Description I²C Virtual Register Read Access I²C Virtual Register Byte Read shows the pseudocode necessary to read virtual registers on the AS7262. Note that in this case, reading a virtual register, the register address is not modified. I²C Virtual Register Byte Read Pseudocode Poll I²C slave STATUS register; If TX_VALID bit is 0, the virtual register address for the read may be written; Send a virtual register address; Poll I²C slave STATUS register; If RX_VALID bit is 1, the read data is ready; Read the data. Sample Code: uint8_t i2cm_AS72xx_read(uint8_t virtualReg) volatile uint8_t status, d; while (1) // Read slave I²C status to see if the read buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave. Okay to write now. break; // Send the virtual register address (setti ng bit 7 to indicate a pending write). i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, virtualReg); while (1) // Read the slave I²C status to se e if our read data is available. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_RX_VALID) != 0) // Read data is ready. break; // Read the data to co mplete the operation. d = i2cm_read(I2C_AS72XX_SLAVE_READ_REG); return d; s The details of the i2cm_read() and i2cm_write() functions in previous Figures are dependent upon the nature and implementation of the external I²C master device.
Datasheet, Public Page 21 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description 4-Byte Floating-Point (FP) Registers Several 4-byte registers (hex) are used by the AS7262. Here is an example of how these registers are used to represent floating point data (based on the IEEE 754 standard): Figure 19: Example of the IEEE 754 Standard The floating point (FP) value assumed by 32 bit binary32 data with a biased exponent e (the 8 bit unsigned integer) and a 23 bit fraction is (for the above example): 0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3E (hex) 20 (hex) 00 (hex) 00 (hex) byte 3 byte 2 byte 1 byte 0 0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 exponent (8 bits) fraction (23 bits) 24 23 16 15 8 7 0 31 2330 22 0 sign = 0.15625 FP value 1 –() sign 1b 23 i– 2 i– i1= 2 e 127–()×⋅= FP value 1 –() 0 1b 23 i– 2 i– i1= 2 124 127–()×⋅=
Datasheet, Public Page 23 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description Sensor Calibrated Data Registers 0x14:0x17 V_Cal Channel V Calibrated Data (floating point) 0x18:0x1B B_Cal Channel B Calibrated Data (floating point) 0x1C:0x1F G_Cal Channel G Calibr ated Data (floating point) 0x20:0x23 Y_Cal Channel Y Calibrated Data (floating point) 0x24:0x27 O_Cal Channel O Calibrated Data (floating point) 0x28:0x2B R_Cal Channel R Calibrated Data (floating point)
Datasheet, Public Page 25 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description Figure 23: Control Setup Register Figure 24: Integration Time Register Figure 25: Device Temperature Register Addr: 0x04/0x84 Control_Setup Bit Bit Name Default Access Bit Description 7R S T 0 R / W Soft Reset, Set to 1 for soft reset, goes to 0 automatically after the reset. 6I N T 0 R / W Enable interrupt pin output (INT), 1: Enable, 0: Disable. 5:4 GAIN 0 R/W Sensor Channel Gain Setting (all channels) 3:2 BANK 10 R/W Data Conversion Type (continuous) ‘b00=Mode 0; ‘b01=Mode 1; ‘b10=Mode 2; ‘b11=Mode 3 One-Shot
1 DATA_RDY 0 R/W
1: Data Ready to Read, sets INT active if interrupt is enabled. Can be polled if not using INT. 0 RSVD 0 R Reserved; Unused. Addr: 0x05/0x85 INT_T Bit Bit Name Default Access Bit Description 7:0 INT_T 0xFF R/W Integration time = <value> * 2.8ms. Addr: 0x06 Device_Temp Bit Bit Name Default Access Bit Description 7:0 Device_Temp R Device temperature data byte ( °C).
Page 26 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Detailed Description Figure 26: LED Control Register Addr: 0x07/0x87 LED Control Bit Bit Name Default Access Bit Description 7:6 RSVD 0 R Reserved 5:4 ICL_DRV 00 R/W LED_DRV current limit ‘b00=12.5mA; ‘b01=25mA; ‘b10=50mA; ‘b11=100mA 3L E D _ D R V 0 R / W Enable LED_DRV 1: Enabled; 0: Disabled 2:1 ICL_IND 00 R/W LED_IND current limit ‘b00=1mA; ‘b01=2mA; ‘b10=4mA; ‘b11=8mA 0L E D _ I N D 0 R / W Enable LED_IND 1: Enabled; 0: Disabled
Datasheet, Public Page 27 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description Figure 27: Sensor Raw Data Registers Addr: 0x08 V_High Bit Bit Name Default Access Bit Description 7:0 V_High R Channel V High Data Byte. Addr: 0x09 V_Low Bit Bit Name Default Access Bit Description 7:0 V_Low R Channel V Low Data Byte. Addr: 0x0A B_High Bit Bit Name Default Access Bit Description 7:0 B_High R Channel B High Data Byte. Addr: 0x0B B_Low Bit Bit Name Default Access Bit Description 7:0 B_Low R Channel B Low Data Byte. Addr: 0x0C G_High Bit Bit Name Default Access Bit Description 7:0 G_High R Channel G High Data Byte. Addr: 0x0D G_Low Bit Bit Name Default Access Bit Description 7:0 G_Low R Channel G Low Data Byte. Addr: 0x0E Y_High Bit Bit Name Default Access Bit Description 7:0 Y_High R Channel Y High Data Byte. Addr: 0x0F Y_Low Bit Bit Name Default Access Bit Description 7:0 Y_Low R Channel Y Low Data Byte.
Page 28 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Detailed Description Addr: 0x10 O_High Bit Bit Name Default Access Bit Description 7:0 O_High R Channel O High Data Byte. Addr: 0x11 O_Low Bit Bit Name Default Access Bit Description 7:0 O_Low R Channel O Low Data Byte. Addr: 0x12 R_High Bit Bit Name Default Access Bit Description 7:0 R_High R Channel R High Data Byte. Addr: 0x13 R_Low Bit Bit Name Default Access Bit Description 7:0 R_Low R Channel R Low Data Byte.
Datasheet, Public Page 29 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description Figure 28: Sensor Calibrated Data Registers Addr: 0x14:0x17 V_Cal Bit Bit Name Default Access Bit Description 31:0 V_Cal R Channel V Calibrated Data (floating point). Addr: 0x18:0x1B B_Cal Bit Bit Name Default Access Bit Description 31:0 B_Cal R Channel B Calibrated Data (floating point). Addr: 0x1C:0x1F G_Cal Bit Bit Name Default Access Bit Description 31:0 G_Cal R Channel G Calibrated Data (floating point). Addr: 0x20:0x23 Y_Cal Bit Bit Name Default Access Bit Description 31:0 Y_Cal R Channel Y Calibrated Data (floating point). Addr: 0x24:0x27 O_Cal Bit Bit Name Default Access Bit Description 31:0 O_Cal R Channel O Calibrated Data (floating point). Addr: 0x28:0x2B R_Cal Bit Bit Name Default Access Bit Description 31:0 R_Cal R Channel R Calibrated Data (floating point).
Page 30 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Detailed Description UART Interface If selected by the I²C_ENB pin setting, the UART module implements the TX and RX signals as defined in the RS-232 / V.24 standard communication protocol. It has on both, receive and transmit path, a 16 entry deep FIFO. It can generate interrupts as required. UART Feature List 1
- Full Duplex Operation (Indep endent Serial Receive and Transmit Registers) with FIFO buffer of 8 byte for each.
- At a clock rate of 16MHz it supports communication at 115200 Baud.
- Supports Serial Frames with 8 Data Bits, no Parity and 1 Stop Bit. Theory of Operation Transmission If data is available in the transmit FIFO, it will be moved into the output shift register and the data will be transmitted at the configured Baud Rate, starting with a Start Bit (logic zero) and followed by a Stop Bit (logic one). Reception At any time, with the receiver be ing idle, if a falling edge of a start bit is detected on the input, a byte will be received and stored in the receive FIFO. The following Stop Bit will be checked to be logic one. Figure 29: UART Protocol 1. With UART operation, min VDD of 2.97V is required as shown in Electrical Characteristics Figures. Start Bit TX D0 D1 D2 D3 D4 D5 D6 D7 D0 D0 D1 D2 D3 D4 D5 D6 D7 D0 Tbit=1/Baude Rate Stop Bit Next Start Sample Points Start Bit detected After Tbit/2: Sampling of Start Bit After Tbit: Sampling of Data RX Always Low Always High Data Bits
Datasheet, Public Page 31 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description AT Command Interface The microprocessor interface to control the Visible Spectral_ID sensor is via the UART, using the AT Commands across the UART interface. The 6-channel Spectral _ID sensor provides a text-based serial command interface borrowed from the “AT Command” model used in early Hayes modems. For example:
- Read DATA value: ATDATA → <data>OK
- Set the gain of the sensor to 1x: ATGAIN =0 → OK The “AT Command Interface Block Diagram” , shown below between the network interface and the core of the system, provides access to the Spectral_ID engine’s control and configuration functions. Figure 30: AT Command Interface Block Diagram In Figure 31 , numeric values may be specified with no leading prefix, in which case they will be interpreted as decimals, or with a leading “0x” to indicate that they are hexadecimal numbers, or with a leading “‘b” to indicate that they are binary numbers. The commands are loosely grouped into functional areas. Texts appearing between angle brackets (‘<‘and ‘>‘) are commands or response arguments. A carriage return character, a linefeed character, or both may terminate commands and responses. Note that any command that encounters an error will generate the “ERROR” response shown, for example, in the NOP command at the top of the first table, but has been omitted elsewhere in the interest of readability and clarity. AT Command Interface Spectral_ID Engine AT Command Interface RX μP TX AS726x AT Command Interface AT Commands
Page 32 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Detailed Description Figure 31: AT Commands Command Response Description/Parameters Spectral Data per Channel ATDATA <V_value>, <B_value>, <G_value>, <Y_value>, <O_value>, <R_value> OK Read V, B, G, Y, O & R data. Returns comma-separated 16-bit integers. ATCDATA <Cal_V_value>, <Cal_B_value>, <Cal_G_value>, <Cal_Y_value>, <Cal_O_value>, <Cal_R_value> OK Read calibrated V, B, G, Y, O & R data. Returns comma-separated 32-bit floating point values. Sensor Configuration ATINTTIME=<value>O K Set sensor integration time. Values should be in the range [1..255], with integration time = <value> * 2.8ms. ATINTTIME < value> OK Read sensor integration time, with integration time = <value> * 2.8ms ATGAIN=<value> OK Set sensor gain: 0=1x, 1=3.7x, 2=16x, 3=64x ATGAIN < value>OK Read sensor gain setting, returning 0, 1, 2, or 3 as defined immediately above. AT TEMP < value>OK Read temperature of chip in degree Celsius. AT TCSMD=<value> OK Set Sensor Mode 0 = BANK Mode 0; 1 = BANK Mode 1; 2 = BANK Mode 2; 3 = BANK Mode 3 One-Shot; 4 = Sensors OFF In One-Shot mode, each ATTCSMD=3 command triggers a One-Shot reading AT TCSMD < value> OK Read Sensor Mode, see above. ATBURST=<value> OK <value>= # of samples (ATBURST=1 means run until ATBURST=0 is received (a special case for continuous output).
Datasheet, Public Page 33 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description LED Driver Controls ATLED0=<value> OK Sets LED_IND: 100=ON, 0=OFF ATLED0 <100|0>OK Reads LED_IND setting: 100=ON, 0=OFF ATLED1=<value> OK Sets LED_DRV: 100=ON, 0=OFF ATLED1 <100|0>OK Reads LED_DRV setting: 100=ON, 0=OFF ATLEDC=<value> OK Sets LED_IND and LED_DRV current LED_IND: bits 3:0; LED_DRV: 7:4 bits LED_IND: ‘b00=1mA; ‘b01=2mA; ‘b10=4mA; ‘b11=8mA LED_DRV: ‘b00=12.5mA; ‘b01=25mA; ‘b10=50mA; ‘b11=100mA ATLEDC <value>OK Reads LED_IND and LED_DRV current settings as shown above. NOP , Version Access, System Reset AT OK → Success ERROR → Failure NOP ATRST None Software Reset – no response. AT VERSW <SWversion#>OK ERROR → Failure Returns the system software version number. AT VERHW <HWversion#>OK ERROR → Failure Returns the system hardware revision and product ID, with bits 7:4 containing the part ID, and bits 3:0 yielding the chip revision value. Firmware Update ATFWU=<value>O K <value>= 16-bit checksum. Initializes the firmware update process. Number of bytes that follow are always 56k bytes. ATFW=<value>O K Download new firmware Up to 7 Bytes represented as hex chars with no leading or trailing 0x. Repeat command till all 56k bytes of firmware are downloaded. ATFWA OK Causes target address for FW updates to advance. Should be called after every successful “OK” returned after “ATFW=<value>” command usage. ATFWS OK Causes the active image to switch between the two possible current images and then resets the IC. Command Response Description/Parameters
Datasheet, Public Page 35 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Package Drawings & Markings Figure 34: Package Drawings LGA Note(s): 1. All dimensions are in mill imeters. Angles in degrees. 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. This package contains no lead (Pb). 4. XXXXX = tracecode. 5. This drawing is subject to change without notice. Package Drawings & Markings Green RoHS
Page 36 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − PCB Pad Layout Suggested PCB pad layout guidelines for the LGA device are shown. Figure 35: Recommended PCB Pad Layout Note(s): 1. Unless otherwise specified, all dimensions are in millimeters. 2. Dimensional tolerances are ±0.05mm unless otherwise noted. 3. This drawing is subject to change without notice. PCB Pad Layout 4.40 0.30 0.65 1.10 4.60 Unit: mm
Datasheet, Public Page 37 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Mechanical Data Figure 36: Tape & Reel Information Note(s): 1. Each reel contains 2000 parts. Mechanical Data
Datasheet, Public Page 39 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Soldering & Storage Information Manufacturing Process Considerations The AS7262 package is compatible with standard reflow no-clean and cleaning processes including aqueous, solvent or ultrasonic techniques. However, as an open-aperture device, precautions must be taken to avoid particulate or solvent contamination as a result of any manufacturing processes, including pick and place, reflow , cleaning, integration assembly and/or testing. Temporary covering of the aperture is allowed. To avoid degradation of accuracy or performance in the end product, care should be taken that any temporary covering and associated sealants/debris are th oroughly removed prior to any optical testing or final packaging. Storage Information Moisture Sensitivity Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previous ly absorbed into the package. To ensure the package contains the smallest amount of absorbed moisture possible, each device is baked prior to being dry packed for shipping. Devices are dry packed in a sealed aluminized envelope called a moisture-barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. Shelf Life The calculated shelf life of the device in an unopened moisture barrier bag is 12 months from the date code on the bag when stored under the following conditions:
- Shelf Life: 12 months
- Ambient Temperature: <40°C
- Relative Humidity: <90% Rebaking of the devices will be required if the devices exceed the 12 months shelf life or the Humidity Indicator Card shows that the devices were exposed to conditions beyond the allowable moisture region.
Page 40 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Soldering & Storage Information Floor Life The module has been assigned a moisture sensitivity level of MSL 3. As a result, the floor life of devices removed from the moisture barrier bag is 168 hours from the time the bag was opened, provided that the devices are stored under the following conditions:
- Floor Life: 168 hours
- Ambient Temperature: <30°C
- Relative Humidity: <60% If the floor life or the temperature/humidity conditions have been exceeded, the devices must be rebaked prior to solder reflow or dry packing. Rebaking Instructions When the shelf life or floor life limits have been exceeded, rebake at 50°C for 12 hours.
Datasheet, Public Page 41 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Ordering & Contact Information Figure 39: Ordering Information (1) Note(s): 1. Required companion serial flash memory (must be ams OSRA M verified) is ordered from the flash memory supplier (e.g. AT25SF041-SSHD-B from Adesto Technologies). 2. AS7262 flash memory software is available from ams OSRAM. Buy our products or get free samples online at: www.ams.com/Products Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/Contact Headquarters ams-OSRAM AG Tobelbader Strasse 30
8141 Premstaetten
Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Ordering Code Package Marking Description Delivery Form Delivery Quantity AS7262-BLGT 20-pin LGA AS7262 6-Channel Visible Spectral_ID Device with Electronic Shutter and Smart Interface 13-inch Tape & Reel 2000 pcs/reel AS7262-BLGM 7-inch Tape & Reel 500pcs/reel Ordering & Contact Information
Page 42 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams-OSRAM AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories plus additional 4 substance categories (per amendment EU 2015/863), including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes. ams Green (RoHS compliant and no Sb/Br/Cl): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) and do not contain Chlorine (Cl not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams-OSRAM AG knowledge and belief as of the date that it is provided. ams-OSRAM AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams-OSRAM AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams-OSRAM AG and ams-OSRAM AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement
Datasheet, Public Page 43 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Copyrights & Disclaimer Copyright ams-OSRAM AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams-OSRAM AG are covered by the warranty and patent indemnification provis ions appearing in its General Terms of Trade. ams-OSRAM AG makes no warranty, express, statutory, implied, or by desc ription regarding the information set forth herein. ams-OSRAM AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams-OSRAM AG for current information. This product is intended for use in commercial applications. Applications re quiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams-OSRAM AG for each application. This product is provided by ams-OSRAM AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams-OSRAM AG shall not be liable to recipient or any third party for any damages, including but no t limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams-OSRAM AG rendering of technical or other services. Copyrights & Disclaimer
Page 44 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams-OSRAM AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams-OSRAM AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status
Datasheet, Public Page 45 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Revision Information Note(s): 1. Page and figure numbers for the previous version may diff er from page and figure numbers in the current revision. 2. Correction of typographical er rors is not explicitly mentioned. Changes from 3-00 (2022-Sep-29) to current revision 4-00 (2022-Nov-30) Page Updated Figure 7 8 Updated Figure 34 and notes below 35 Revision Information
Page 46 Datasheet, Public Document Feedback [v4-00] 2022-Nov-30 AS7262 − Content Guide
1 General Description
1 Key Benefits & Features
2 Applications
2 Block Diagram
3 Pin Assignments
5A b s o l u t e M a x i m u m R a t i n g s
6 Electrical Characteristics
8 Timing Characteristics
11 Optical Characteristics
12 Typical Optical Characteristics
13 Detailed Description
13 6-Channel Visible Spectral_ID Detector
14 Data Conversion Description
16 RC Oscillator
16 Temperature Sensor
16 Reset
16 Indicator LED
17 Electronic Shutter with LED_DRV Driver Control
17 Interrupt Operation
17 I²C Slave Interface
18 I²C Feature List
18 I²C Virtual Register Write Access
19 I²C Virtual Register Byte Write
20 I²C Virtual Register Read Access
20 I²C Virtual Register Byte Read
21 4-Byte Floating-Point (FP) Registers
22 I²C Virtual Register Set
24 Detailed Register Description
30 UART Interface
30 UART Feature List
30 Theory of Operation
30 Transmission
30 Reception
31 AT Command Interface
34 Schematic
34 PCB Layout
36 PCB Pad Layout
37 Mechanical Data
38 Soldering & Storage Information
38 Soldering Information
39 Manufacturing Process Considerations
39 Storage Information
39 Moisture Sensitivity
39 Shelf Life
40 Floor Life
40 Rebaking Instructions
Datasheet, Public Page 47 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Content Guide