AS3932 SCIOSENSE | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 50
Technical content
This product, formerly sold by ams AG, and before that optionally by either Applied Sensors GmbH, acam-messelectronic GmbH or Cambridge CMOS Sensors, is now owned and sold by ScioSense The technical content of this document under ams / Applied Sensors / acam- messelectronic / Cambridge CMOS Sensors is still valid. Contact information Headquarters: Sciosense B.V. High Tech Campus 10
5656 AE Eindhoven
info@sciosense.com www.sciosense.com
[v1-83] 2015-Mar-02 Document Feedback AS3932 3D Low Frequency Wakeup Receiver The AS3932 is a 3-channel low power ASK receiver that is able to generate a wake-up upon detection of a data signal which uses a LF carrier frequency between 110 - 150 kHz. The integrated correlator can be used for detection of a programmable 16-bit wake-up pattern. The device can operate using one, two, or three active channels. The AS3932 provides a digital RSSI value for each active channel, it supports a programmable data rate. The AS3932 offers a real-time clock (RTC), which is either derived from a crystal oscillator or the internal RC oscillator. The programmable features of AS3932 enable to optimize its settings for achieving a longer distance while retaining a reliable wake-up generation. The sensitivity level of AS3932 can be adjusted in presence of a strong field or in noisy environments. The device is available in 16-pin TSSOP and 16LD QFN (4 ×4) packages. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS3932, 3D Low Frequency Wakeup Receiver are listed below: Figure 1: Added Value of Using AS3932 Benefits Features Enables low power active tags 3-channel ASK wake-up receiver Selectable carrier frequency Carrier frequency range 110 - 150 kHz One, two, or three channel operation 1-D, 2-D, or 3-D wake-up pattern detection Highly resistant to false wake-ups 16 -bit programmable wake-up pattern Improved immunity to false wake-ups Supporting doubling of wake-up pattern Allows frequency only detection Wake-up without pattern detection selectable Improved range with best-in-class sensitivity Wake-up sensitivity 100μVRMS (typ.) Adjustable range Sensitivity level adjustable Provides tracking of false wake-ups False wake-up counter Ensures wake-up in a noise environment Period ical forced wake-up supported (1s – 2h) Extended battery life Current consumption in 3-channel listening mode 1.7μA (typ.) General Description
Document Feedback [v1-83] 2015-Mar-02 AS3932 − General Description
Applications
The AS3932 is ideal for:
- A c t i v e R F I D t a g s ,
- Real-time location systems,
- Operator identification,
- Access control, and
- Wireless sensors. Figure 2: AS3932 Typical Application Diagram with Crystal Oscillator Flexible clock configuration RTC based 32 kHz XTAL, RC-OSC, or external clock Operates from a 3V battery Operating supply range 2.4V – 3.6V (TA = 25°C) Industrial temperature range Operation temperature range -40°C to +85°C Benefits Features TX TRANSMITTER Transmitting Antenna VCC LF1P LF2P LF3P LFN VSS GND XIN XOUT WAKE DAT NC CS SCL SDI SDO VCC CBAT AS3932 X, Y, and Z Receiving Antennas XTAL CL
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Pin Assignment Figure 7: Pin Assignments 16LD QFN (4 ×4) Package LF3P 7 Analog I/O Input antenna channel three LF2P 8 Input antenna channel two LF1P 9 Input antenna channel one LFN 10 Common ground for antenna one, two and three XIN 11 Crystal oscillator input XOUT 12 Crystal oscillator output VSS 13 Supply pad Substrate WAKE 14 Digital output Wake-up output IRQ DAT 15 Data output NC 16 - Not connected Pin Name Pin Number Pin Type Description AS3932 LF2P LFN LF3P CS DAT XIN SDI LF1P 5 6 7 8 13141516 XOUT VSS WAKE NC SCL SDO VCC GND
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Pin Assignment Pin Description Figure 8: Pin Descriptions 16LD QFN (4 ×4) Package Note(s) and/or Footnote(s): 1. The exposed pad has to be connected to ground. Pin Name Pin Number Pin Type Description LF3P 1 Analog I/O Input antenna channel three LF2P 2 Input antenna channel two LF1P 3 Input antenna channel one LFN 4 Common ground for antenna one, two and three XIN 5 Crystal oscillator input XOUT 6 Crystal oscillator output VSS 7 Supply pad Substrate WAKE 8 Digital output Wake-up output IRQ DAT 9 Data output NC 10 - Not connected CS 11 Digital input Chip select SCL 12 SDI interface clock SDI 13 SDI data input SDO 14 Digital output / tristate SDI data output (tristate when CS is low) VCC 15 Supply pad Positive supply voltage GND 16 Supply pad Negative supply voltage
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Absolute Maximum Ratings Stresses beyond those listed in Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 9: Absolute Maximum Ratings Symbol Parameter Min Max Unit Note Electrical Parameters VDD DC supply voltage -0.5 5 V VIN Input pin voltage -0.5 5 V ISOURCE Input current (latch up immunity) -100 100 mA Norm: Jedec 78 Electrostatic Discharge ESD Electrostatic discharge ±2 kV Norm: MIL 883 E method 3015 (HBM) Continuous Power Dissipation Pt Total power dissipation 0.07 mW All supplies and outputs Temperature Ranges and Storage Conditions Tstrg Storage temperature -65 150 °C Tbody Package body temperature 260 °C Norm: IPC/JEDEC J-STD-020 The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State Surface Mount Devices”. RH NC Relative Humidity non-condensing 58 5 % MSL Moisture Sensitivity Level 3 Represents a maximum floor life time of 168h Absolute Maximum Ratings
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Electrical Characteristics Figure 10:
Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Unit Operating Conditions VDD Positive supply voltage 2.4 3.6 V VSS Negative supply voltage 0 0 V TAMB Ambient temperature -40 85 °C DC/AC Characteristics for Digital Inputs and Outputs CMOS Input VIH High level input voltage 0.58* VDD 0.7* VDD 0.83* VDD V VIL Low level input voltage 0.125* VDD 0.2* VDD 0.3* VDD V ILEAK Input leakage current 100 nA CMOS Output VOH High level output voltage With a load current of 1mA VDD - 0.4 V VOL Low level output voltage With a load current of 1mA VSS + 0.4 V CL Capacitive load For a clock frequency of 1 MHz 400 pF Tristate CMOS Output VOH High level output voltage With a load current of 1mA VDD - 0.4 V VOL Low level output voltage With a load current of 1mA VSS + 0.4 V IOZ Tristate leakage current To VDD and VSS 100 nA
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Electrical Characteristics Figure 11: Electrical System Specifications Symbol Parameter Conditions Min Typ Max Unit Input Characteristics RIN Input Impedance In case no antenna damper is set (R1<4> =0) 2M Ω Fmin Minimum Input Frequency 110 kHz Fmax Maximum Input Frequency 150 kHz Current Consumption IPWD Power Down Mode 400 nA I1CHRC Current Consumption in standard listening mode with one active channel and RC-oscillator as RTC 2.7 μA I2CHRC Current Consumption in standard listening mode with two active channels and RC-oscillator as RTC 4.2 μA I3CHRC Current Consumption in standard listening mode with three active channels and RC-oscillator as RTC 5.7 8.3 μA I3CHSCRC Current Consumption in scanning mode with three active channels and RC-oscillator as RTC 2.7 μA I3CHOORC Current Consumption in ON/ OFF mode with three active channels and RC-oscillator as RTC 11% Duty Cycle 1.7 μA 50% Duty Cycle 3.45 I3CHXT Current Consumption in standard listening mode with three active channels and crystal oscillator as RTC 6.5 8.9 μA
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Electrical Characteristics IDATA Current Consumption in Preamble detection / Pattern correlation / Data receiving mode (RC-oscillator) With 125 kHz carrier frequency and 1kbpsdata-rate. No load on the output pins. 8.3 12 μA Input Sensitivity SENS Input Sensitivity on all channels With 125 kHz carrier frequency, chip in default mode, 4 half bits burst + 4 symbols preamble and single preamble detection 100 μVrms Channel Settling Time TSAMP Amplifier settling time 250 μs Crystal Oscillator FXTAL Frequency Crystal dependent 32.768 kHz TXTAL Start-up Time Crystal dependent 1 s IXTAL Current consumption 1 μA External Clock Source IEXTCL Current consumption 1 μA RC Oscillator FRCNCAL Frequency If no calibratio n is performed 27 32.768 42 kHz FRCCAL32 Frequency If calibration with 32.768 kHz reference signal is performed 31 32.768 34.5 kHz FRCCALMAX Frequency Maximum achievable frequency after calibration 35 kHz FRCCALMIN Frequency Minimum achievable frequency after calibration 30 kHz TRC Start-up time From RC enable (R1<0> = 0) 1 s TCALRC Calibration time 65 Periods of reference clock IRC Current consumption 200 nA Symbol Parameter Conditions Min Typ Max Unit
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description The AS3932 is a three-dimensional low power low-frequency wake-up receiver. The AS3932 is capable to detect the presence of an inductive coupled carrier and extract the envelope of the ON-OFF-Keying (OOK) modulated carrier. If the detected pattern corresponds to the stored one a wake-up signal (IRQ) is risen up. The pattern correl ation can be bypassed in which case the wake-up detection is based only on the frequency detection. The AS3932 is made up by three independent receiving channels, one envelop detector, one data correlator, 8 programmable registers with the main logic and a real time clock. The digital logic can be accessed by an SPI. The real time clock can be based on a crystal oscillator or on an internal RC one. If the internal RC oscillator is used, a calibration procedure can be performed to improve its accuracy. Figure 16: Block Diagram of LF Wake-up Receiver AS3932 Detailed Description Wake-up Main Logic Envelope Detector / Data Slicer Correlator I/V Bias Xtal RTC Xin RC RTC SPIChannel Amplifier 1 Channel Amplifier 2 Channel Amplifier 3 RSSI RSSI RSSI Data Data Data IRQ XoutGNDVCC LF1P LF2P LF3P SCL SDI SDO LFN DAT CS Channel Selector Freq. OK Freq. OK Freq. OK AS3932
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description AS3932 needs the following external components:
- Power supply capacitor - CBAT - 100 nF.
- 32.768 kHz crystal with its tw o pulling capacitors - XTAL and CL - (it is possible to om it these components if the internal RC oscillator is us ed instead of the crystal oscillator).
- One, two, or three LC resonators according to the number of used channels. In case the internal RC-oscillator is used (no crystal oscillator is mounted), the pin XIN has to be connected to the supply, while pin XOUT should stay floating. Application diagrams with and without crystal are shown in Figure 2 and Figure 3 . Operating Modes Power Down Mode In Power Down Mode AS3932 is completely switched OFF. The typical current consumption is 400 nA. Listening Mode In listening mode only the active channel amplifiers and the RTC are running. In this mode the system detects the presence of a carrier. In case the carrier is detected the RSSI can be displayed. If the three dimensional detection is not required it is possible to deactivate one or more channels. In case only two channels are required the deactivated channel must be the number two, while if only one channel detection is needed the active channel must be the number one. Inside this mode it is possible to distinguish the following three sub modes: Standard Listening Mode . All channels are active at the same time. Scanning Mode (Low Power Mode 1) . All used channels are active, but only one per time slot, where the time slot T is defined as 1ms. Thus, if all three channels are active the procedure is as follows (see Figure 17) : for the first millisecond only channel one is active while channel two and three are powered down; for the next millisecond only channel three is active while channel one and two are powered down; finally, channel two is active while the other two are deactivated. This channel rotation goes on until the presence of the carrier is detected by any of the channels; then immediately all three channels will become active at the same time. Now AS3932 can perform a simultaneous multidirectional evaluation (on all three channels) of the field and evaluate which channel has the strongest RSSI. The channel with the highest RSSI will be put through to the demodulator.
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description In this way it is possible to pe rform multidirectional monitoring of the field with a current consumption of a single channel, keeping the sensitivity as good as if all channels are active at the same time. Figure 17: Scanning Mode time time time Channel 1 Channel 3 Channel 2 time Presence of carrier t0 t0+T t0+2T t0+3T t0+4T t0+5T t1
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description ON/OFF Mode (Low Power Mode 2) . All active channels are ON at the same time but not for th e whole time (time slot T is defined as 1ms). An ON-OFF duty-ratio is defined. This duty ratio is programmable see R4<7:6> . Figure 18: ON/OFF Mode For each of these sub modes it is possible to enable a further feature called Artificial Wake-up. The Artificial Wake-up is a counter based on the used RTC. Th ree bits define a time window see R8<2:0> . If no activity is seen within this time window the chip will produce an interrupt on the WAKE pin that lasts 128 μs. With this interrupt the microcontroller ( μC) can get feedback on the surrounding environment (e.g. read the false wake-up register R13<7:0> ) and/or take actions in order to change the setup. Preamble Detection / Pattern Correlation The preamble detection and pattern correlation are only considered for the wake-up when the data correlator function is enabled (see R1<1> ). The correlator searches first for preamble frequency (constant frequency of Manchester clock defined according to bit-rate transmission, see Figure 37 ) and then for data pattern. If the pattern is matched the wake-up interrupt is displayed on the WAKE output and the chip go es in Data receiving mode. If the pattern fails the internal wake-up (on all active channels) is terminated and no IRQ is produced. time time time Channel 1 Channel 2 Channel 3 time Presence of carrier t0 t0+T 2*t0 2*t0+T 3*t0
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description Data Receiving After a successful wake-up the chip enters the data receiving mode. In this mode the chip can be retained a normal OOK receiver. The received data are streamed out on the pin DAT. It is possible to put the chip back to listening mode either with a direct command (CLEAR_WAKE (see Figure 25) ) or by using the timeout feature. This feature au tomatically sets the chip back to listening mode after a certain time R7<7:5> . System and Block Specification Register Table Figure 19: Register Table 7 6 5 4 3 2 1 0 R0 n.a. ON_OFF MUX_123 EN_A2 EN_A3 EN_A1 PWD R1 ABS_HY AGC_TLI M AGC_UD ATT_ON EN_PAT2 EN_WPAT EN_RTC R2 S_ABSH W_PAT_T<1:0> Reserved S_WU1<1:0> R3 HY_20m HY_POS FS_SLC<2:0> FS_ENV<2:0> R5 TS2<7:0> R6 TS1<7:0> R8 n.a T_AUTO<2:0> R9 n.a Reserved R10 n.a RSSI1<4:0> R11 n.a RSSI3<4:0> R12 n.a RSSI2<4:0> R13 F_WAKE
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description Register Table Description and Default Values Figure 20: Default Values of Registers Register Name Type Default Value Description R0<5> ON_OFF R/W 0 ON/OFF operation mode. (Duty-cycle defined in the register R4<7:6> R0<4> MUX_123 R/W 0 Scan mode enable R0<3> EN_A2 R/W 1 Channel 2 enable R0<2> EN_A3 R/W 1 Channel 3 enable R0<1> EN_A1 R/W 1 Channel 1 enable R0<0> PWD R/W 0 Power down R1<7> ABS_HY R/W 0 Data sl icer absolute reference R1<6> AGC_TLIM R/W 0 AGC acting only on the first carrier burst R1<5> AGC_UD R/W 1 AGC operatin g in both direction (up-down) R1<4> ATT_ON R/W 0 Antenna damper enable R1<2> EN_PAT2 R/W 0 Double wake-up pattern correlation R1<1> EN_WPAT R/W 1 Data correlation enable R1<0> EN_RTC R/W 1 Crystal oscillator enable R2<7> S_ABSH R/W 0 Data sl icer threshold reduction R2<6:5> W_PAT R/W 00 Pattern correlation tolerance (see Figure 38) R2<4:2> Reserved 000 Reserved R2<1:0> S_WU1 R/W 00 Tolerance setting for the stage wake-up (see Figure 32) R3<7> HY_20m R/W 0 Data slicer hysteresis if HY_20m = 0 then comparator hysteresis = 40mV if HY_20m = 1 then comparator hysteresis = 20mV R3<6> HY_POS R/W 0 Data slicer hysteresis on both edges (HY_POS = 0 → hysteresis on both edges; HY_POS = 1 → hysteresis only on positive edges) R3<5:3> FS_SCL R/W 100 Data slicer time constant (see Figure 36) R3<2:0> FS_ENV R/W 000 Envelop detector time constant (see Figure 35)
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description R4<7:6> T_OFF R/W 00 OFF time in ON/OFF operation mode T_OFF=00 1ms T_OFF=01 2ms T_OFF=10 4ms T_OFF=11 8ms R4<5:4> D_RES R/W 01 Antenna damping resistor (see Figure 34) R4<3:0> GR R/W 0000 Gain reduction (see Figure 33) R5<7:0> TS2 R/W 01101001 2nd Byte of wake-up pattern R6<7:0> TS1 R/W 10010110 1st Byte of wake-up pattern R7<7:5> T_OUT R/W 000 Automatic time-out (see Figure 39) R7<4:0> T_HBIT R/W 01011 Bit rate definition (see Figure 37) R8<2:0> T_AUTO R/W 000 Artificial wake-up T_AUTO=000 No artificial wake-up T_AUTO=001 1 sec T_AUTO=010 5 sec T_AUTO=011 20 sec T_AUTO=100 2 min T_AUTO=101 15min T_AUTO=110 1 hour T_AUTO=111 2 hour R9<6:0> Reserved 000000 Reserved R10<4:0> RSSI1 R RSSI channel 1 R11<4:0> RSSI2 R RSSI channel 2 R12<4:0> RSSI3 R RSSI channel 3 R13<7:0> F_WAK R False wake-up register Register Name Type Default Value Description
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description Figure 23: SDI Command Structure In case a write or read command happens the next 6 bits (B13 to B8) define the register address which has to be written respectively read, as shown in Figure 24 . Figure 24: SDI Command Structure The last 8 bits are the data that has to be written respectively read. A CS toggle high-low-high terminates the command mode. B15 B14 Mode 0 0 WRITE 0 1 READ 1 0 NOT ALLOWED 1 1 DIRECT COMMAND B13 B12 B11 B10 B9 B8 Read/Write Register 0 0 0 0 0 0 R0 0 0 0 0 0 1 R1 0 0 0 0 1 0 R2 0 0 0 0 1 1 R3 0 0 0 1 0 0 R4 0 0 0 1 0 1 R5 0 0 0 1 1 0 R6 0 0 0 1 1 1 R7 0 0 1 0 0 0 R8 0 0 1 0 0 1 R9
001010 R 1 0
001011 R 1 1
001100 R 1 2
001101 R 1 3
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description If a direct command is sent (B15-B14=11) the bits from B13 to B8 defines the direct command while the last 8 bits are omitted. The Figure 25 shows all possible direct commands: Figure 25: List of Direct Commands All direct commands are explained below:
- clear_wake: clears the wake state of the chip. In case the chip has woken up (WAKE pin is high) the chip is set back to listening mode.
- reset_RSSI: resets the RSSI measurement.
- trim_osc: starts the trimming procedure of the internal RC oscillator (see Figure 46) .
- clear_false: resets the false wake-up register (R13<7:0> =00).
- preset_default: sets all regi ster in the default mode, as shown in Figure 20 . Writing of Data to Addressable Registers (WRITE Mode). The SDI is sampled at the falling ed ge of SCLK (as shown in the following diagrams). A CS toggling high-low-high in dicates the end of the WRITE command after register has been written. The following example shows a write command. COMMAND_MODE B13 B12 B11 B10 B9 B8 clear_wake 0 0 0 0 0 0 reset_RSSI 0 0 0 0 0 1 trim_osc 0 0 0 0 1 0 clear_false 0 0 0 0 1 1 preset_default 0 0 0 1 0 0
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description Figure 36: Bit Setup for the Data Slicer for Different Preamble Length Note(s): These times are minimum required, but it is recommended to prolong the preamble. The comparator of the data slicer can work only with positive or with symmetrical threshold ( R3<6> ). In addition the threshold can be 20 or 40 mV ( R3<7> ). In case the length of the preamble is an issue the data slicer can also work with an absolute threshold ( R1<7> ). In this case the bits R3<2:0> would not influence the performance. It is even possible to reduce the absolute threshold in case the environment is not particularly noisy ( R2<7> ). R3<5> R3<4> R3<3> Minimum Preamble Length [ms] 0 0 0 0.8 0 0 1 1.15 0 1 0 1.55 0 1 1 1.9 1 0 0 2.3 1 0 1 2.65 1 1 0 3 1 1 1 3.5
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description Correlator After frequency detection the data correlation is only performed if the correlator is enabled ( R1<1> =1). The data correlation consists of checking the presence of a preamble (ON/OFF modulated carrier) followed by a certain pattern. After the frequency detection the correlator waits 16 bits (see bit rate definition in Figure 37 ) and if no preamble is detected the chip is set back to listening mode and the false wake-up register ( R13<7:0> ) is incremented by one. To get started with the pattern correlation the correlator needs to detect at least 4 bits of the preamble (ON/OFF modulated carrier). The bit duration is defined in the register R7<4:0> according to the Figure 37 as function of the Real Time Clock (RTC) periods. Figure 37: Bit Rate Setup Bit Duration in RTC Clock Periods Bit Rate (bits/s) Symbol Rate (Manchester symbols/s) 0 0 0 1 1 4 8192 4096 0 0 1 0 0 5 6552 3276 0 0 1 0 1 6 5460 2730 0 0 1 1 0 7 4680 2340 0 0 1 1 1 8 4096 2048 0 1 0 0 0 9 3640 1820 0 1 0 0 1 10 3276 1638 0 1 0 1 0 11 2978 1489 0 1 0 1 1 12 2730 1365 0 1 1 0 0 13 2520 1260 0 1 1 0 1 14 2340 1170 0 1 1 1 0 15 2184 1092 0 1 1 1 1 16 2048 1024 1 0 0 0 0 17 1926 963 1 0 0 0 1 18 1820 910 1 0 0 1 0 19 1724 862 1 0 0 1 1 20 1638 819
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description If the preamble is detected correctly the correlator keeps searching for a data pattern. The duration of the preamble plus the pattern should not be longer than 40 bits (see bit rate definition in Figure 37 ). The data pattern can be defined by the user and consists of two bytes which are stored in the registers R5<7:0> and R6<7:0> . The two bytes define the pattern consisting of 16 half bit periods. This means the pattern and the bit period can be selected by the user. The only limitation is that the pattern (in combination with preamble) must obey Manchester coding and timing. It must be noted that according to Manchester coding a down-to- up bit transition represents a symbol "0" , while a transition up-to-down represents a symbol "1" . If the default code is used (96 [hex]) the binary code is (10 01 01 10 01 10 10 01). MSB has to be transmitted first. The user can also select ( R1<2> ) if single or double data pattern is used for wake-up. In case double pattern detection is set, the same pattern has to be repeated 2 times. Additionally it is possible to set the number of allowed missing zero bits (not symbols) in the received bitstream ( R2<6:5> ), as shown in the Figure 38 . 1 0 1 0 0 21 1560 780 1 0 1 0 1 22 1488 744 1 0 1 1 0 23 1424 712 1 0 1 1 1 24 1364 682 1 1 0 0 0 25 1310 655 1 1 0 0 1 26 1260 630 1 1 0 1 0 27 1212 606 1 1 0 1 1 28 1170 585 1 1 1 0 0 29 1128 564 1 1 1 0 1 30 1092 546 1 1 1 1 0 31 1056 528 1 1 1 1 1 32 1024 512 Bit Duration in RTC Clock Periods Bit Rate (bits/s) Symbol Rate (Manchester symbols/s)
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description Without Pattern Detection Figure 40: Wake-up Protocol Overview without Pattern Detection (only carrier frequency detection) In case the data correlation is disabled ( R1<1> =0) the AS3932 wakes up upon detection of the carrier frequency only as shown in Figure 40 . I n orde r to ensu re t hat AS39 32 wake s u p th e c ar r ie r burst has to last longer than 550 μs. To set AS3932 back to listening mode there are two possibilities: either the microcontroller sends the direct command clear_wake via SDI or the time out option is used ( R7<7:5> ). In case the latter is chosen, AS3932 is automatically set to listening mode after the time defined in T_OUT ( R7<7:5> ), counting starts at the low-to-high WAKE edge on the WAKE pin. Carrier Burst Data Carrier Burst > 550 us WAKE Clear_wake DAT
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description Figure 42: Preamble Requirements in Standard Mode, Scanning Mode and ON/OFF Mode Bit Rate (bits/s) Maximum Duration of The Carrier Burst in Standard Mode and Scanning Mode (ms) Maximum Duration of the Carrier Burst in ON/OFF Mode (ms) 8192 1.95 10 6552 2.44 10 5460 2.93 10 4680 3.41 10 4096 3.90 10 3640 4.39 10 3276 4.88 10 2978 5.37 10 2730 5.86 10 2520 6.34 10 2340 6.83 10 2184 7.32 10 2048 7.81 10 1926 8.30 10 1820 8.79 10 1724 9.28 10 1638 9.76 10 1560 10.25 10.25 1488 10.75 10.75 1424 11.23 11.23 1364 11.73 11.73 1310 12.21 12.21 1260 12.69 12.69 1212 13.20 13.20 1170 13.67 13.67 1128 14.18 14.18 1092 14.65 14.65
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description False Wake-up Register The wake-up strategy in the AS3932 is based on 2 steps: 1. Frequency Detection: in this phase the frequency of the received signal is checked. 2. Pattern Correlation: here the pattern is demodulated and checked whether it corresponds to the valid one. If there is a disturber or noise capable to overcome the first step (frequency detection) without producing a valid pattern, then a false wake-up call happens.Each time this event is recognized a counter is incremented by one and the respective counter value is stored in a memory cell (false wake-up register). Thus, the microcontroller can periodically look at the false wake-up register, to get a feeling how noisy the surrounding environment is and can then react accordingly (e.g. reducing the gain of the LNA during frequency detection, set the AS3932 temporarily to power down etc.), as shown in the Figure 43 . The false wake-up counter is a useful tool to quickly adapt the system to any changes in the noise environment and thus avoid false wake-up events. Most wake-up receivers have to deal with environments that can rapidly change. By periodically monitoring the number of false wake-up events it is possible to adapt the system setup to the actual characteristics of the environment and enables a better use of the full flexibility of AS3932. 1056 15.15 15.15 1024 15.62 15.62 Bit Rate (bits/s) Maximum Duration of The Carrier Burst in Standard Mode and Scanning Mode (ms) Maximum Duration of the Carrier Burst in ON/OFF Mode (ms)
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Detailed Description Figure 43: Concept of the False Wake-up Register Together With the System Real Time Clock (RTC) The RTC can be based on a crystal oscillator ( R1<0> =1), the internal RC-oscillator ( R1<0> =0), or an external clock source (R1<0> =1). The crystal oscillator has higher precision of the frequency with higher current consumption and needs three external components (crystal plus two capacitors). The RC-oscillator is completely integr ated and can be calibrated if a reference signal is available for a very short time to improve the frequency accuracy. The calibration gets started with the trim_osc direct command. Since no non-volatile memory is available the calibration must be done every time after the RCO is turned OFF. The RCO is turned OFF when the chip is in power down mode, a POR happened, or the crystal oscillator is enabled. Frequency Detector Pattern Correlator Wakeup Level 1 Wakeup Level 2 WAKE False wakeup register Unsuccessful pattern correlation Register Setup Microcontroller READ FALSE WAKEUP REGISTER CHANGE SETUP TO MINIMIZE THE FALSE WAKEUP EVENTS
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description Since the RTC defines the time ba se of the frequency detection, the selected frequency (frequency of the crystal oscillator or the reference frequency used for calibration of the RC oscillator) should be about one forth of the carrier frequency: Where: F CAR is the carrier frequency and F RTC is the RTC frequency. The third option for the RTC is the use of an external clock source, which must be applied directly to the XIN pin (XOUT floating). Crystal Oscillator Figure 44: Characteristics of XTAL Symbol Parameter Conditions Min Max Typ Units Crystal accuracy (initial) Overall accuracy ±120 p.p.m. Crystal motional resistance 60 K Ω Frequency 32.768 kHz Contribution of the oscillator to the frequency error ±5 p.p.m Start-up Time Crystal dependent 1 s Duty cycle 45 50 55 % Current consumption 1 μA (EQ1) FRTC FCAR ∗0.25∼
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Detailed Description External Clock Source To clock the AS3932 with an extern al signal the crystal oscillator has to be enabled ( R1<0> =1). As shown in the Figure 4 the clock must be applied on the pin XIN while the pin XOUT must stay floating. The RC time constant has to be 15 μs with a tolerance of ±10% (e.g. R=680 k Ω and C=22pF). In the Figure 47 the clock characteristics are summarized. Figure 47: Characteristics of External Clock Note(s): In power down mode the exte rnal clock has to be set to VDD. Channel Selection in Scanning Mode and ON/OFF Mode In case only 2 channels are active and one of the Low Power modes is enabled, then the channels 1 and 3 have to be active. If the chip works in ON-OFF mode and only one channel is active then the active channel has to be the channel 1. Both Low Power modes are not allowed to be enabled at the same time. Symbol Parameter Conditions Min Typ Max Units VI Low level 0 0.1 * VDD V Vh High level 0.9 * VDD V DD V Tr Rise-time 3 μs Tf Fall-time 3 μs T = RC RC Time constant 13.5 15 16.5 μs
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Ordering & Contact Information The devices are available as the standard products shown in Figure 52 . Figure 52:
Ordering Information
Note(s) and/or Footnote(s): 1. Dry Pack Sensitivity Level =3 accordin g to IPC/JEDEC J-STD-033A for full reels. Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbaderstrasse 30
8141 Unterpremstaetten
Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Ordering Code Type Marking Delivery Form(1) Delivery Quantity AS3932-BTST 16-pin TSSOP AS3932 7 inches Tape & Reel 1000 pcs AS3932-BQFT 16LD QFN (4 ×4) AS3932 7 inches Tape & Reel 1000 pcs Ordering & Contact Information
[v1-83] 2015-Mar-02 Document Feedback AS3932 − RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specif ied lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are unde rway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appe aring in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams AG reserves the right to ch ange specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any th ird party shall arise or flow out of ams AG rendering of technical or other services. Copyrights & Disclaimer
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status
Document Feedback [v1-83] 2015-Mar-02 AS3932 − Revision Information Note(s) and/or Footnote(s): 1. Page and figure numbers for the previous version may diff er from page and figure numbers in the current revision. 2. Correction of typographical er rors is not explicitly mentioned. Changes from 1.7 (2013-Jun-18) to current revision 1-83 (2015-Mar-02) Page Content was converted to latest ams design Added benefits to Key Features 1 Added TRC (start-up time) parameter in Figure 11 9 Updated text under Detailed Description section 13 Updated Figure 30 25 1-82 (2014-Nov-05) to 1-83 (2015-Mar-02) Updated Figure 50 (QFN (4 ×4) package) 43 Revision Information
[v1-83] 2015-Mar-02 Document Feedback AS3932 − Content Guide
1 General Description
1 Key Benefits & Features
2 Applications
4 Pin Assignment
4 Pin Description
6 Pin Description
7A b s o l u t e M a x i m u m R a t i n g s