AS3930 SCIOSENSE | Alldatasheet
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Technical content
This product, formerly sold by ams AG, and before that optionally by either Applied Sensors GmbH, acam-messelectronic GmbH or Cambridge CMOS Sensors, is now owned and sold by ScioSense The technical content of this document under ams / Applied Sensors / acam- messelectronic / Cambridge CMOS Sensors is still valid. Contact information Headquarters: Sciosense B.V. High Tech Campus 10
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info@sciosense.com www.sciosense.com
[v1-62] 2014-Nov-27 Document Feedback AS3930 Single Channel Low Frequency Wakeup Receiver The AS3930 is a single-channel low power ASK receiver that is able to generate a wake-up upon detection of a data signal which uses a LF carrier frequency between 110 - 150 kHz. The integrated correlator can be used for detection of a programmable 16-bit wake-up pattern. The AS3930 provides a digital RSSI value, it supports a programmable data rate. The AS3930 offers a real-time clock (RTC), which is either derived from a crystal oscillator or the internal RC oscillator. The programmable features of AS3930 enable to optimize its settings for achieving a longer distance while retaining a reliable wake-up generation. The sensitivity level of AS3930 can be adjusted in presence of a strong field or in noisy environments. The device is available in a 16-pin TSSOP and a 16-LD QFN (4x4) package. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS3930, Single Channel Low Frequency Wakeup Receiver are listed below: Figure 1: Added Value of Using AS3930 Benefits Features Enables low power active tags Single channel ASK wake-up receiver Selectable carrier frequency Carrier frequency range 110 – 150 kHz Highly resistant to false wake-ups 16-bit programmable wake-up pattern Improved immunity to false wake-ups Su pporting doubling of wake-up pattern Allows frequency only detection Wake-up without pattern detection selectable Improved range with best-in-class sensitivity Wake-up sensitivity 100μVRMS (typ.) Adjustable range Sensitivity level adjustable Provides tracking of false wake-ups False wake-up counter Ensures wake-up in a noise environment Period ical forced wake-up supported (1s – 2h) Extended battery life Current consumption in listening mode 1.37 μA (typ.) Flexible clock configuration RTC based 32 kHz XTAL, RC-OSC, or external clock General Description
Document Feedback [v1-62] 2014-Nov-27 AS3930 − General Description
Applications
The AS3930, Single Channel Low Frequency Wakeup Receiver is ideal for Active RFID tags, real-time location systems, operator identification, access control, and wireless sensors. Figure 2: AS3930 Typical Application Diagram with Crystal Oscillator Operates from a 3V battery Operating supply range 2.4V – 3.6V (TA = 25°C) Industrial temperature range Operation temperature range -40°C to +85°C Benefits Features VCC LF1P NC NC LFN VSS GND XIN XOUT WAKE DAT CS SCL SDI SDO VCC CBAT XTAL CL TX TRANSMITTER AS3930 Transmitting Antenna
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Pin Assignments 16-pin TSSOP Figure 5: Pin Diagram (Top View) Figure 6: Pin Description Pin Number Pin Name Pin Type Description 1 CS Digital input Chip select
2 SCL SDI interface clock
3 SDI SDI data input
4 SDO Digital output / tristate SDI data output (tristate when CS is low)
6 GND Negative supply voltage
- Not Connected 8 NC
9 LF1P
10 LFN Antenna ground
11 XIN Crystal oscillator input
12 XOUT Crystal oscillator output
14 WAKE
15 DAT Data output
16 NC - Not connected
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Pin Assignments QFN 4x4 16 LD Figure 7: Pin Diagram (Top View) Figure 8: Pin Description Pin Number Pin Name Pin Type Description
1 NC -
2 NC -
3 LF1P Input antenna
4 LFN
5 XIN Crystal oscillator input
6 XOUT Crystal oscillator output
8 WAKE
9 DAT Data output
10 NC - Not connected
12 SCL SDI interface clock
13 SDI SDI data input
14 SDO Digital output / tristate SDI da ta output (tristate when CS is low)
16 GND Negative supply voltage
/g54/g38/g47/g49/g38 /g39/g36/g55 /g47/g41/g20/g51 /g38/g54 /g49/g38 /g49/g38 /g47/g41/g49 /g24 /g25 /g26/g27 /g20/g21 /g20/g25 /g20/g24 /g20/g23/g20/g22 /g20/g20 /g20/g19 /g28 /g36/g54/g22/g28/g22/g19 /g20 /g21 /g22 /g23 /g58/g36/g46/g40 VSS /g59/g50/g56/g55 /g59/g44/g49 /g54/g39/g44 /g54/g39/g50 /g57/g38/g38 /g42/g49/g39
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Absolute Maximum Ratings Stresses beyond those listed in Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 9: Absolute Maximum Ratings Parameter Min Max Unit Note Electrical Parameters DC supply voltage (VDD) -0.5 5 V Input pin voltage (VIN) -0.5 5 V Input current (latch up immunity) (ISOURCE) -100 100 mA Norm: Jedec 78 Electrostatic Discharge Electrostatic discharge (ESD) ±2 kV Norm: MIL 883 E method 3015 (HBM) Continuous Power Dissipation Total power dissipation (all supplies and outputs) (Pt) 0.07 mW Temperature Ranges and Storage Conditions Storage temperature (Tstrg) -65 150 °C Package body temperature (Tbody) 260 °C Norm: IPC/JEDEC J-STD-020 The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State Surface Mount Devices”. Humidity non-condensing 5 85 % Moisture Sensitivity Level (MSL) 3 Represents a maximum floor life time of 168h Absolute Maximum Ratings
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Electrical Characteristics Figure 10:
Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Unit Operating Conditions VDD Positive supply voltage 2.4 3.6 V VSS Negative supply voltage 0 0 V TAMB Ambient temperature -40 85 °C DC/AC Characteristics for Digital Inputs and Outputs CMOS Input VIH High level input voltage 0.58* VDD 0.7* VDD 0.83* VDD V VIL Low level input voltage 0.125* VDD 0.2* VDD 0.3* VDD V ILEAK Input leakage current 100 nA CMOS Output VOH High level output voltage With a load current of 1mA VDD - 0.4 V VOL Low level output voltage VSS + 0.4 V CL Capacitive load For a clock frequency of 1 MHz 400 pF Tristate CMOS Output VOH High level output voltage With a load current of 1mA VDD - 0.4 V VOL Low level output voltage VSS + 0.4 V IOZ Tristate leakage current To VDD and VSS 100 nA
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Electrical Characteristics Figure 11: Electrical System Specifications Symbol Parameter Conditions Min Typ Max Unit Input Characteristics RIN Input Impedance In case no antenna damper is set (R1<4> =0) 2M Ω Fmin Minimum Input Frequency 110 kHz Fmax Maximum Input Frequency 150 kHz Current Consumption IPWD Power Down Mode 400 nA ICHRC Current Consumption in standard listening mode with channel active all the time and RC-oscillator as RTC 2.7 μA ICHOORC Current Consumption in ON/OFF mode and RC-oscillator as RTC 11% Duty Cycle 1.37 μA 50% Duty Cycle 2 ICHXT Current Consumption in standard listening mode and crystal oscillator as RTC 3.5 5.9 μA IDATA Current Consumption in Preamble detection / Pattern correlation / Data receiving mode (RC-oscillator) With 125 kHz carrier frequency and 1kbps data-rate. No load on the output pins. 5.3 9 μA Input Sensitivity SENS Input Sensitivity With 125 kHz carrier frequency, chip in default mode, 4 half bits burst + 4 symbols preamble and single preamble detection 100 μVrms Channel Settling Time TSAMP Amplifier settling time 250 μs Crystal Oscillator FXTAL Frequency Crystal dependent 32.768 kHz TXTAL Start-up Time 1 s IXTAL Current consumption 1 μA
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Electrical Characteristics Note(s) and/or Footnote(s): 1. RC calibration is only successful after start-up is completed. External Clock Source IEXTCL Current consumption 1 μA RC Oscillator (1) FRCNCAL Frequency If no calibration is performed 27 32.768 42 kHz FRCCAL32 If calibration with 32.768 kHz reference signal is performed 31 32.768 34.5 kHz FRCCALMAX Maximum achievable frequency after calibration 35 kHz FRCCALMIN Minimum achievable frequency after calibration 30 kHz TRC Start-up time From RC enable (R1<0> = 0) 1 s TCALRC Calibration time 65 Periods of reference clock IRC Current consumption 200 nA Symbol Parameter Conditions Min Typ Max Unit
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Detailed Description The AS3930 is a one-dimensional low power low-frequency wake-up receiver. The AS3930 is capable of detecting the presence of an inductive coupled carrier and extract the envelope of the ON-OFF-Keying (OOK) modulated carrier. In case the carrier is Manchester coded, then the clock is recovered from the transmitted signal and th e data can be correlated with a programmed pattern. If the detected pattern corresponds to the stored one, then a wake-up signal (IRQ) is risen up. The pattern correlation can be bypa ssed in which case the wake-up detection is based only on the frequency detection. The AS3930 is made up of a single receiving channel, one envelop detector, one data correlator, 8 programmable registers with the main logic and a real time clock. The digital logic can be accessed by an SDI. The real time clock can be based on a crystal or on an internal RC. If the internal RC oscillator is used, a calibration procedure can be performed to improve its accuracy. Figure 16: Block Diagram of LF Wake-up Receiver AS3930 Detailed Description LF1P LFN GND XIN XOUT DAT CS SDO SDI SCL IRQ VCC RSSI Wakeup AS3930, 1-D LF Wakeup Receiver SDIMain Logic Envelope Detector / Data Slicer Correlator Channel Amplifier1 I/V Bias Xtal RTC RC RTC
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Detailed Description AS3930 needs the following external components:
- Power supply capacitor - CBAT - 100 nF.
- 32.768 kHz crystal with its tw o pulling capacitors - XTAL and CL - (it is possible to om it these components if the internal RC oscillator is us ed instead of the crystal oscillator).
- I n p u t L C r e s o n a t o r . In case the internal RC-oscillator is used (no crystal oscillator is mounted), the pin XIN has to be connected to the supply, while pin XOUT should stay floating. Application diagrams with and without crystal are shown in Figure 2 and Figure 3 . Operating Modes Power Down Mode In Power Down Mode AS3930 is completely switched OFF. The typical current consumption is 400 nA. Listening Mode In listening mode only the channel amplifier and the RTC are running. In this mode the syst em detects the presence of a carrier. In case the carrier is detected, the RSSI can be displayed. In this mode it is possible to distinguish the following three sub modes: Standard Listening Mode The channel amplifier that is ca pable of detecting the presence of the carrier frequency, is active all the time. ON/OFF Mode (Low Power mode ) The channel amplifier is active for one millisecond after which it is switched OFF. The OFF-time is programmable (see R4<7:6> ). Figure 17: ON/OFF Mode Channel Presence of Carrier t0 t0 + 1ms t0 + T t0 + T + 1ms t0 + 2T Time Time
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Detailed Description Further, for both sub modes, it is possible to enable a feature called Artificial Wake-up. If the Artificial Wake-up is enabled, then the AS3930 produces an interrupt after a certain time regardless of whether any activity is detected on the input. The period of the Artificial Wake-up is defined in the register R8<2:0> . The user can distinguish between Artificial Wake-up and Wake-up based on the field detection (frequency or pattern detection) since the Artificial Wake-up interrupt lasts only 128μs. With this interrupt the microcontroller ( μC) can get feedback on the surrounding environment (e.g. read the false wake-up register R13<7:0> ) and/or take actions in order to change the setup. Preamble Detection / Pattern Correlation The preamble detection and pattern correlation are only considered for the wake-up when the data correlator function is enabled (see R1<1> ). The correlator searches first for preamble frequency (constant frequency of Manchester clock defined according to bit-rate transmission, see Figure 36 ) and then for data pattern. If the pattern is matched, then the wake-up interrupt is displayed on the WAKE output and the chip goes in data receiving mode. If the pattern fails, then the internal wake-up is terminated and no IRQ is produced. Data Receiving After a successful wake-up the chip enters the data receiving mode. In this mode the chip can be retained a normal OOK receiver. The received data are streamed out on the pin DAT. It is possible to put the chip back to listening mode either with a direct command (CLEAR_WAKE see Figure 24 ) or by using the timeout feature. This feature au tomatically sets the chip back to listening mode after a certain time R7<7:5> .
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Detailed Description System and Block Specification Main Logic and SDI Figure 18: Register Table 7 6 5 4 3 2 1 0 R0 N.A.. ON_OFF Reserved EN_A PWD R1 ABS_HY AGC_TLIM AGC_UD ATT_ON N.A. EN_PAT2 EN_WPAT EN_RTC R2 S_ABSH W_PAT_T<1:0> Reserved S_WU1<1:0> R3 HY_20m HY_POS FS_SLC<2:0> FS_ENV<2:0> R5 TS2<7:0> R6 TS1<7:0> R8 N.A. T_AUTO<2:0> R9 N.A. Reserved R10 N.A.. RSSI1<4:0> R11 N.A.. R12 N.A.. R13 F_WAKE
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Detailed Description R4<7:6> T_OFF R/W 00 OFF time in ON/OFF operation mode T_OFF=00 1ms T_OFF=01 2ms T_OFF=10 4ms T_OFF=11 8ms R4<5:4> D_RES R/W 01 Antenna damping resistor (see Figure 33) R4<3:0> GR R/W 0000 Gain reduction (see Figure 32) R5<7:0> TS2 R/W 01101001 2 nd Byte of wake-up pattern R6<7:0> TS1 R/W 10010110 1st Byte of wake-up pattern R7<7:5> T_OUT R/W 000 Automatic time-out (see Figure 38) R7<4:0> T_HBIT R/W 01011 Bit rate definition (see Figure 36) R8<2:0> T_AUTO R/W 000 Artificial wake-up T_AUTO=000 No artificial wake-up T_AUTO=001 1 sec T_AUTO=010 5 sec T_AUTO=011 20 sec T_AUTO=100 2 min T_AUTO=101 15min T_AUTO=110 1 hour T_AUTO=111 2 hour R9<6:0> Reserved 000000 Reserved R10<4:0> RSSI1 R RSSI channel R11<4:0> R N.A. R12<4:0> R N.A. R13<7:0> F_WAK R False wake-up register Register Name Type Default Value Description
[v1-62] 2014-Nov-27 Document Feedback In case a write or read command happens the next 6 bits (B13 to B8) define the register address which has to be written respectively read, as shown in Figure 23 . Figure 23: Bits B13-B8 The last 8 bits are the data that has to be written respectively read. A CS toggle high-low-high terminates the command mode. If a direct command is sent (B15-B14=11) the bits from B13 to B8 defines the direct command while the last 8 bits are omitted. Figure 24 shows all possible direct commands: Figure 24: List of Direct Commands B13 B12 B11 B10 B9 B8 Read/Write register 0 0 0 0 0 0 R0 0 0 0 0 0 1 R1 0 0 0 0 1 0 R2 0 0 0 0 1 1 R3 0 0 0 1 0 0 R4 0 0 0 1 0 1 R5 0 0 0 1 1 0 R6 0 0 0 1 1 1 R7 0 0 1 0 0 0 R8 0 0 1 0 0 1 R9
001010 R 1 0
001011 R 1 1
001100 R 1 2
001101 R 1 3
COMMAND_MODE B13 B12 B11 B10 B9 B8 clear_wake 0 0 0 0 0 0 reset_RSSI 0 0 0 0 0 1 trim_osc 0 0 0 0 1 0 clear_false 0 0 0 0 1 1 preset_default 0 0 0 1 0 0
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Detailed Description Frequency Detector / AGC The frequency detection uses the RTC as time base. In case the internal RC oscillator is used as RTC, it must be calibrated, but the calibration is guaranteed for a 32.768 kHz crystal oscillator only. The frequency detection criteria can be tighter or more relaxed according to the setup described in R2<1:0> (see Figure 31) . Figure 31: Tolerance Settings for Wake-up The AGC can operate in two modes:
- AGC down only ( R1<5> =0)
- AGC up and down ( R1<5> =1) As soon as the AGC starts to oper ate, the gain in the VGA is set to maximum. If the AGC down only mode is selected, the AGC can only decrease the gain. Since the RSSI is directly derived from the VGA gain, the system holds the RSSI peak. When the AGC up and down mode is selected, the RSSI can follow the input signal strength variation in both directions. Regardless which AGC operation mode is used, the AGC needs maximum 35 carrier periods to settle. The RSSI is stored in the register R10<4:0> . Both AGC modes (only down or down and up) can also operate with time limitation. This option allows AGC operation only in time slot of 256 μs following the internal wake-up. Then the AGC (RSSI) is frozen till the wake-up or RSSI reset occurs. The RSSI is reset either with the direct command 'clear_wakeup' or 'reset_RSSI' . The 'reset_RSSI' command resets only the AGC setting but does not terminate wake-up condition. This means that if the signal is still present the new AGC setting (RSSI) will appear not later than 300 μs (35 LF carrier periods) after the command was received. The AGC setting is reset if for duration of 3 Manchester half symbols no carrier is detected. If the wake-up IRQ is cleared the chip will go back to listening mode. In case the maximum amplific ation at the beginning is a drawback (e.g. in noisy environment) it is possible to set a smaller starting gain on the amplifier Figure 32 . In this way it is possible to reduce the false frequency detection. R2<1> R2<0> Tolerance
00 R e l a x e d
01T i g h t e r ( M e d i u m )
10 S t r i n g e n t
11 R e s e r v e d
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Detailed Description Figure 35: Bit Setup for Data Slicer for Different Preamble Length Note(s): These times are minimum required, but it is recommended to prolong the preamble. The comparator of the data slicer can work only with positive or with symmetrical threshold R3<6> . In addition the threshold can be 20 or 40 mV R3<7> . In case the length of the preamble is an issue the data slicer ca n also work with an absolute threshold R1<7> . In this case the bits R3<2:0> would not influence the performance. It is even possible to reduce the absolute threshold in case the environment is not particularly noisy R2<7> . Correlator After frequency detection the data correlation is only performed if the correlator is enabled ( R1<1> =1). The data correlation consists of checking the presence of a preamble (ON/OFF modulated carrier) followed by a certain pattern. After the frequency detection the correlator waits 16 bits (see bit rate definition in Figure 36 ) and if no preamble is detected the chip is set back to listening mode and the false wake-up register ( R13<7:0> ) is incremented by one. To get started with the pattern correlation the correlator needs to detect at least 4 bits of the preamble (ON/OFF modulated carrier). The bit duration is defined in the register R7<4:0>(Figure 36) as function of the Real Time Clock (RTC) periods. R3<5> R3<4> R3<3> Minimum Preamble Length [ms] 0 0 0 0.8 0 0 1 1.15 0 1 0 1.55 0 1 1 1.9 1 0 0 2.3 1 0 1 2.65 1 1 0 3 1 1 1 3.5
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Detailed Description Figure 36: Bit Rate Setup <4> <3> <2> <1> <0> Bit Duration in RTC Clock Periods Bit Rate (bits/s) Symbol Rate (Manchester symbols/s) 0 0 0 1 1 4 8192 4096 0 0 1 0 0 5 6552 3276 0 0 1 0 1 6 5460 2730 0 0 1 1 0 7 4680 2340 0 0 1 1 1 8 4096 2048 0 1 0 0 0 9 3640 1820 0 1 0 0 1 10 3276 1638 0 1 0 1 0 11 2978 1489 0 1 0 1 1 12 2730 1365 0 1 1 0 0 13 2520 1260 0 1 1 0 1 14 2340 1170 0 1 1 1 0 15 2184 1092 0 1 1 1 1 16 2048 1024 1 0 0 0 0 17 1926 963 1 0 0 0 1 18 1820 910 1 0 0 1 0 19 1724 862 1 0 0 1 1 20 1638 819 1 0 1 0 0 21 1560 780 1 0 1 0 1 22 1488 744 1 0 1 1 0 23 1424 712 1 0 1 1 1 24 1364 682 1 1 0 0 0 25 1310 655 1 1 0 0 1 26 1260 630 1 1 0 1 0 27 1212 606 1 1 0 1 1 28 1170 585 1 1 1 0 0 29 1128 564 11101 3 0 1 0 9 2 5 4 6 11110 3 1 1 0 5 6 5 2 8 11111 3 2 1 0 2 4 5 1 2
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Detailed Description If the preamble is detected correctly the correlator keeps searching for a data pattern. The duration of the preamble plus the pattern should not be longer than 40 bits (see bit rate definition in Figure 36 ). The data pattern can be defined by the user and consists of two bytes which are stored in the registers R5<7:0> and R6<7:0> . The two bytes define the pattern consisting of 16 half bit periods. This means the pattern and the bit period can be selected by the user. The only limitation is that the pattern (in combination with preamble) must obey Manchester coding and timing. It must be noted that according to Manchester coding a down-to- up bit transition represents a symbol "0" , while a transition up-to-down represents a symbol "1" . If the default code is used (96 [hex]) the binary code is (10 01 01 10 01 10 10 01). MSB has to be transmitted first. The user can also select ( R1<2> ) if single or double data pattern is used for wake-up. In case double pattern detection is set, the same pattern has to be repeated 2 times. Additionally it is possible to set the number of allowed missing zero bits (not symbols) in the received bitstream ( R2<6:5> ), as shown in the Figure 37 . Figure 37: Allowed Pattern Detection Errors If the pattern matches the wake-up, interrupt is displayed on the WAKE output. If the pattern detection fails, th e internal wake-up (on all active channels) is terminated with no signal sent to MCU and the false wake-up register will be incremented ( R13<7:0> ). The wake-up state is terminated with the direct command ‘clear_wake’ (see Figure 24) . This command terminates the MCU activity. The termination can also be automatic in case there is no response from MCU. The time out for automatic termination is set in a register R7<7:5> , as shown in the Figure 38 . R2<6> R2<5> Maximum allowed error in the pattern detection 0 0 No error allowed 0 1 1 missed zero 1 0 2 missed zeros 1 1 3 missed zeros
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Detailed Description Figure 41: Preamble Requirements in Standard Mode, Scanning Mode and ON/OFF Mode Bit Rate (bits/s) Maximum Duration of the Carrier Burst in Standard Mode and Scanning Mode (ms) Maximum Duration of the Carrier Burst in ON/OFF Mode (ms) 8192 1.95 10 6552 2.44 10 5460 2.93 10 4680 3.41 10 4096 3.90 10 3640 4.39 10 3276 4.88 10 2978 5.37 10 2730 5.86 10 2520 6.34 10 2340 6.83 10 2184 7.32 10 2048 7.81 10 1926 8.30 10 1820 8.79 10 1724 9.28 10 1638 9.76 10 1560 10.25 10.25 1488 10.75 10.75 1424 11.23 11.23 1364 11.73 11.73 1310 12.21 12.21 1260 12.69 12.69 1212 13.20 13.20 1170 13.67 13.67 1128 14.18 14.18 1092 14.65 14.65 1056 15.15 15.15 1024 15.62 15.62
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Detailed Description False Wake-up Register The wake-up strategy in the AS3930 is based on 2 steps: 1. Frequency Detection: In this phase the frequency of the received signal is checked. 2. Pattern Correlation: Here the pattern is demodulated and checked whether it corresponds to the valid one. If there is a disturber or noise capable to overcome the first step (frequency detection) without producing a valid pattern, then a false wake-up call happens.Each time this event is recognized a counter is incremented by one and the respective counter value is stored in a memory cell (false wake-up register). Thus, the microcontroller can periodically look at the false wake-up register, to get a feeling how noisy the surrounding environment is and can then react accordingly (e.g. reducing the gain of the LNA during frequency detection, set the AS3930 temporarily to power down etc.), as shown in the Figure 42 . The false wake-up counter is a useful tool to quickly adapt the system to any changes in the noise environment and thus avoid false wake-up events. Most wake-up receivers have to deal with environments that can rapidly change. By periodically monitoring the number of false wake-up events it is possible to adapt the system setup to the actual characteristics of the environment and enables a better use of the full flexibility of AS3930. Figure 42: Concept of the False Wake-up Register Together with System Frequency Detector Pattern Correlator Wakeup Level 1 Wakeup Level 2 WAKE False wakeup register Unsuccessful pattern correlation Register Setup Microcontroller READ FALSE WAKEUP REGISTER CHANGE SETUP TO MINIMIZE THE FALSE WAKEUP EVENTS
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Detailed Description Real Time Clock (RTC) The RTC can be based on a crystal oscillator ( R1<0> =1), the internal RC-oscillator ( R1<0> =0), or an external clock source (R1<0> =1). The crystal has higher precision of the frequency but a higher current consumption and needs three external components (crystal plus two capacitors). The RC-oscillator is completely integrated and can be calibrated if a reference signal is available for a very short time to improve the frequency accuracy. The calibration gets st arted with the trim_osc direct command. Since no non-volatile memory is available the calibration must be done every time after the RCO was turned OFF. The RCO is turned OFF when the chip is in power down mode, a POR happened, or the crystal oscillator is enabled. Since the RTC defines the time ba se of the frequency detection, the selected frequency (frequency of the crystal oscillator or the reference frequency used for calibration of the RC oscillator) should be about one forth of the carrier frequency: Where: F CAR is the carrier frequency FRTC is the RTC frequency Note(s): The third option for the RTC is the use of an external clock source, which must be applied directly to the XIN pin (XOUT floating). Crystal Oscillator Figure 43: Characteristics of XTAL Parameter Conditions Min Typ Max Units Crystal accuracy (initial) Overall accuracy ±120 p.p.m. Crystal motional resistance 60 K Ω Frequency 32.768 kHz Contribution of the oscillator to the frequency error ±5 p.p.m Start-up Time Crystal dependent 1 s Duty cycle 45 50 55 % Current consumption 1 μA (EQ1) FRTC FCAR ∗0.25∼
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Detailed Description Figure 46: Characteristics of External Clock Note(s): In power down mode the exte rnal clock has to be set to V DD. Symbol Parameter Min Typ Max Units VI Low level 0 0.1 * VDD V Vh High level 0.9 * VDD V DD V Tr Rise-time 3 μs Tf Fall-time 3 μs T =1/2πRC RC Time constant 90 100 110 μs
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Ordering & Contact Information Figure 51:
Ordering Information
Note(s) and/or Footnote(s): 1. Dry Pack: Moisture Sensitivity Level (M SL) = 3, according to IPC/JEDEC J-STD-033A. Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbaderstrasse 30
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Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Ordering Code Type Marking Delivery Form(1) Delivery Quantity AS3930-BTST 16-pin TSSOP AS3930 7 inches Tape & Reel 1000 pcs AS3930-BQFT QFN (4 ×4) 16LD AS3930 7 inches Tape & Reel 1000 pcs Ordering & Contact Information
[v1-62] 2014-Nov-27 Document Feedback AS3930 − RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specif ied lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are unde rway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appe aring in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams AG reserves the right to ch ange specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any th ird party shall arise or flow out of ams AG rendering of technical or other services. Copyrights & Disclaimer
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status
Document Feedback [v1-62] 2014-Nov-27 AS3930 − Revision Information Note(s) and/or Footnote(s): 1. Page and figure numbers for the previous version may diff er from page and figure numbers in the current revision. 2. Correction of typographical er rors is not explicitly mentioned. Changes from 1.5 (2013-Feb-04) to current revision 1-62 (2014-Nov-27) Page Content was updated to the latest ams design Updated General Description & Figure 1 1 Updated Pin Assignments section 4 Added TRC (start-up time) parameter in Figure 11 and a note under it 8 Updated Figure 29 22 Updated Package Drawings & Markings section 36 Revision Information
[v1-62] 2014-Nov-27 Document Feedback AS3930 − Content Guide
1 General Description
1 Key Benefits & Features
2 Applications
4 Pin Assignments
5 QFN 4x4 16 LD
6A b s o l u t e M a x i m u m R a t i n g s