AS3701

AS3701 AMSOSRAM | Alldatasheet

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[v1-11] 2016-Dec-14 Document Feedback AS3701 Micro-PMIC The AS3701 is a small compact PMU for small size and low power applications. AS3701 features one 500mA DCDC buck converter operating from 1MHz up to 4MHz, two 200mA LDOs, two 40mA current sinks and offers additional GPIO functions. Further, the device contains an integrated linear battery charger with constant current and constant voltage operation. The wide charging current range going from 11mA up to 500mA and the integrated battery temperature monitoring with selectable NTC beta values make this device suitable for a great variety of applications. The single supply voltage may vary from 2.7V to 5.5V and all functionalities of AS3701 can be controlled via the I²C interface. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS3701, Micro-PMIC are listed below: Figure 1: Added Value of Using AS3701 Benefits Features

• Multiple rails in a compact design for low power applications
• 2 x 200mA universal LDO (1.2V to 3.3V)
• 500mA Step-down DCDC (0.6125V to 3.35V)
• 2 programmable current sources up to 40mA
• Possible external PWM dimming input
• Self-contained Li-Ion battery charger with power path
• Linear charger with internal transistor
• 500mA max charging current
• Trickle-, constant current and constant voltage operation (3.82V to 4.44V)
• Charger timeout and temperature supervision
• NTC beta selection
• Flexible multi-purpose IOs for general control tasks and for standalone operation without I²C interface
• Wake-up / Stand-by / Power-down input
• PWM input/output
• Interrupt input/output
• Low battery and Power Good output
• Charging and USB current setting input
• Charger control input/output General Description

Document Feedback [v1-11] 2016-Dec-14 AS3701 − General Description

Applications

The device is a PMU for low power applications like sport watches, smart watches, handheld GPS devices, mobile phones and any other 1-cell Li+ powered devices.

• Flexible and fast adaptation to different processors/applications • OTP programmable boot sequence
• Power saving control according to the processor’s needs • Stand-by function with programmable voltages
• Self-contained start-up and safety shutdown feature
• I²C control interface
• ON-key with 4/8s emergency power-down
• POR with Reset I/O
• Cost effective, small package optimized for PCB cost or size
• 17-balls WL-CSP with 0.4mm pitch
• 20-balls WL-CSP with 0.4mm pitch Benefits Features

[v1-11] 2016-Dec-14 Document Feedback AS3701 − General Description Block Diagram The functional blocks of this device are shown below: Figure 2: Functional Blocks of AS3701A Block Diagram: This figure shows the block diagram of the AS3701A LOGIC & CONTROL Power Path & Current Limiter Linear Charger VUSB VSUP_CHG AS3701A VBAT ON SCL SDA XRES DCDC 50 0mA 0.6 – 3.4V Iq = 30uA VSS_SD1 FB_SD1 LX_SD1 1uH 10uF LD O1 1.2 – 3.3V 20 0mA Iq = 5uA Current Sinks LDO1 VS UP 2.2uF 2.2uF PWM GND LD O2 1.2 – 3.3V 20 0mA Iq = 5uA LDO2 2.2uF 2.2uF VS UP VSUP_SD1 XIRQ_NTC VS UP GPIO1_CURR1 GPIO2_CURR2

Document Feedback [v1-11] 2016-Dec-14 AS3701 − General Description Figure 3: Functional Blocks of AS3701B Block Diagram: This figure shows the block diagram of the AS3701B LOGIC & CONTROL Power Path & Current Limiter Linear Charger VUSB VSUP_CHG AS3701B VBAT ON SCL SDA XRES DCDC 50 0mA 0.6 – 3.4V Iq = 30uA VSS_SD1 FB_SD1 LX_SD1 1uH 10uF LD O1 1.2 – 3.3V 20 0mA Iq = 5uA Current Sinks LDO1 VS UP VS UP 2.2uF 2.2uF PWM GND GPIO1_CURR1 GPIO2_CURR2 LD O2 1.2 – 3.3V 20 0mA Iq = 5uA LDO2 2.2uF 2.2uF VS UP VSUP_SD1 XIRQ_NTC GPIO GPIO3..5

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Pin Assignments Figure 6: Pin Description Pin Number Pin Name I/O Description Max. Voltage If Not Used17 Balls Balls A2 A2 VUSB S Wall adapter or USB Bus Power input (before protection) 5.5V Pull-down to GND A1 A1 VSUP_CHG SIO Current limiter output, LDO1 & LDO2 pos. supply terminal VSUP Mandatory D2 D2 VSUP_SD1 S DCDC pos. supply terminal VSUP Mandatory B1 B1 VBAT S Li-Ion Battery Terminal 5.5V Open A5 A5 GND AIO Reference GND - Mandatory A4 A4 LDO1 AO LDO1 Output 3.3V Open A3 A3 LDO2 AO LDO2 Output 3.3V Open D1 D1 LX_SD1 AIO DCDC Step Down Switch Output to Coil 5.5V Open B2 B2 FB_SD1 AI DCDC Step Do wn Feedback Pin 3.6V Open D4 D4 XRES DIO Reset IO VSUP Pull-up to VSUP D3 D3 ON DI Power Up Input 5.5V Open B3 B3 XIRQ_NTC AIO Interrupt Output or NTC Input VSUP Open D5 D5 SCL DI 2-wire Serial IF Clock Input VSUP Pull-up to VSUP C4 C4 SDA DIO 2-wire Serial IF Data I/O VSUP Pull-up to VSUP C5 C5 GPIO1_ CURR1 DIO General Purpose IO1 or LED Channel 1 VSUP Open B5 B5 GPIO2_ CURR2 DIO General Purpose IO2 or LED Channel 2 VSUP Open - B4 GPIO3 DIO General Purpose IO3 VSUP Open - C2 GPIO4 DIO General Purpose IO4 VSUP Open - C3 GPIO5 DIO General Purpose IO5 VSUP Open C1 C1 VSS_SD1 AIO GND connector of DCDC - Mandatory

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 7: Absolute Maximum Ratings Symbol Parameter Min Max Units Comments Electrical Parameters VGND Supply voltage to ground 5V pins -0.5 7.0 V Applicable for pins VSUP_CHG, VSUP_SD1, VBAT, VUSB, LX_SD1, SCL, SDA, ON, XRES, XIRQ_NTC, GPIO3, GPIO4, GPIO5, GPIO1_CURR1, GPIO2_ CURR2 V GND Supply voltage to ground 3V pins -0.5 5.0 V Applicable for pins LDO1, LDO2, FB_SD1 Voltage difference between ground terminals -0.5 0.5 V Applicable for pins GND, VSS_SD1 ISCR Input current (latch-up immunity) -100 100 mA JEDEC JESD78 Continuous Power Dissipation (TA = 70°C) PT Continuous power dissipation 0.96 W PT (1) for WL-CSP20 (RTHJA ~ 57K/W) Electrostatic Discharge ESDHBM Electrostatic discharge (human body model) ±2 kV JEDEC JESD22-A114F Absolute Maximum Ratings

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Absolute Maximum Ratings Note(s): 1. Depending on actual PCB layout and PCB used 2. The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020 “Moisture/Reflow Sensiti vity Classification for Non hermetic Solid State Surface Mount Devices“ Temperature Ranges and Storage Conditions TA Operating temperature -40 85 °C RTHJA Junction to ambient thermal resistance °C/W RTHJA typ. 57K/W TJ Junction temperature 125 °C TSTRG Storage temperature range -55 125 °C RHNC Relative humidity (non-condensing) 58 5 % MSL Moisture sensitivity level 1 Represents an unlimited floor life time Symbol Parameter Min Max Units Comments

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Electrical Characteristics All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Figure 8:

Electrical Characteristics

Electrical Characteristics: VSUP = 3.7V, VOUT < VIN – 0.5V, TAMB = -40°C to 85°C, typ. values @ TAMB = 25°C (unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit VIN Input voltage range Pin VSUP 2.7 5.5 V IQ_ACTIVE Active mode quiescent current Normal operating current 26 μAIQ_STAND-BY Stand-by quiescent current Normal operating current (Oscillator ON) 26 Normal operating current (Oscillator OFF) 11.5 IPOWEROFF Shutdown current power_off = 1 1.2

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – Power Management Functions Step Down Converter The step-down converter is a high-efficiency fixed frequency current mode regulator. By using low resistance internal PMOS and NMOS switches, efficiency up to 95% can be achieved. The fast switching frequency allows using small inductors, without increasing the current ripple. The unique feedback and regulation circuit guarantees op timum load and line regulation over the whole output voltage range, up to the maximum output current, with an output capacitor of only 10μF. The implemented current limitation protects the DCDC Converter and the coil during overload condition. Figure 9: DCDC Step-Down Converter Block Diagram Detailed Description – Power Management Functions Logic +- + Σ IMIN ILIMIT 170mA 800mA ISENSEP ISENSEN Zero Comparator PWM Comparator OvervoltageComparator Ref + 8% Ref - 5% SlopeCompensation Softstart Ref = 0.6VSkip Sd_low_noise Clk Sd_lv buck _v FB_SD1 VSS_SD1 LX_SD1 VOUT VSUP 2.2uF 1u H 10uF

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – Power Management Functions Mode Settings To allow optimized performance in different applications, there are bit settings possible, to get the best compromise between high efficiency and low input/output ripple. Figure 10: DCDC Step-Down Converter Mode Settings Low-Ripple, Low-Noise Operation Low-ripple, low-noise operation can be enabled by setting the bit sd_low_noise [SD_control1] to 1. In this mode there is no minimu m coil current necessary before switching OFF the PMOS. As long as the load current is superior to the ripple current, the device operates in continuous mode. When the load current gets lower, the discontinuous mode is triggered. Resultant the auto-z ero comparator stops the NMOS conduction to avoid load disc harger and the duty cycle is reduced down to t MIN_ON to keep the regulation loop stable. This results in a very low ri pple and noise, but decreased efficiency at light loads, especially at low input to output voltage differences. Mode Setting: This graph shows the difference of the efficiency curves for high efficiency and low noise mode setting. V SUP = 3.7V, VOUT = 2.5V, fSW = 3MHz, TAMB = 25°C. 100 0.001 0.01 0.1 1 Efficiency (%) Output Current (A) Vout = 2.5V, low noise Vout = 2.5V

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – Power Management Functions Figure 15: Output Voltage Ripple Measurement at Operating Point 5 Operating Point 5: These graphs show the switching behavior referring to the operating point 5 from figure10. Here the load current is 100mA and high enough to keep the DCDC always in a continuous switching operation regardless of the mode setting. Low Power Mode Operation (Automatically Controlled) As soon as the output voltage stays above the desired target value for a certain time, some internal blocks will be powered down leaving the output floating to lower the power consumption. Normal operation starts as soon as the output drops below the target value for a similar amount of time. To minimize the accuracy error some internal circuits are kept powered to assure a minimized output voltage ripple. Two addition guard bands, based on comparators, are set at ±5% of the target value to react quickly on large over/undershoots by immediately turning ON the output drivers without the normal ti me delays. This ensures a minimized ripple also in very extreme load conditions. Dynamic Voltage Management To minimize the over-/undersho ot during a change of the output voltage, the DVM can be enabled with dvm_enable [SD_ control2] . With DVM the output voltage will ramp up/down with a selectable slope after the new value was written to the registers. The DVM time can be chosen between 8 μs and 16 μs by setting the bit dvm_time [SD_control2] . Without DVM the slew rate of the output voltage is only determined by external components like the coil and load capacitor as well as the load current.

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – Power Management Functions Fast Regulation Mode This mode can be used to react faster on sudden load changes and thus minimize the over-/unde rshoot of the output voltage. This mode needs a 22 μF output capacitor instead the 10 μF one to guarantee the stability of the regulator. The mode is enabled by setting the bit sd_fast [SD_control1] to 1. Selectable Frequency Operation Especially for very low load conditions, e.g. during a sleep mode of a processor, the switching frequency can be reduced to achieve a higher efficiency. The frequency can be set to 1, 2, 3 or 4MHz and this mode is selected by setting sd1_freq [SD1Voltage] and sd1_fsel [SD_control1] to the appropriate values. Parameters Figure 16: DCDC Step-Down Converter Electrical Characteristics Symbol Parameter Note Min Typ Max Unit VIN Input Voltage Pin VSUP 2.7 5.5 V VOUT Regulated Output Voltage 0.6125 3.35 V VOUT_TOL Output Voltage Tolerance min. 40mV -3 +3 % ILIMIT Current Limit 800 mA RPMOS P-switch ON resistance 0.36 1 Ω RNMOS N-switch ON resistance 0.33 1 Ω fSW Switching Frequency 1 3 4 MHz ILOAD Load Current 500 mA ISUP_DCDC Current Consumption Operating Current without Load 27 μA Shutdown Current 0.1 tMIN_ON Minimum ON Time 40 ns

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – Power Management Functions Figure 21: DCDC Step Down Converter Efficiency vs. Load Current at 4MHz DCDC Efficiency vs. Output Current: VSUP = 3.7V, fSW = 4MHz, Murata LQM2HPN1R0MG0L 1μH coil, TAMB = 25°C. 100 0.001 0.01 0.1 1 Efficiency (%) Output Current (A) Vout = 0.6125V, low noise Vout = 0.6125V Vout = 1.2V, low noise Vout = 1.2V Vout = 1.8V, low noise Vout = 1.8V Vout = 3.0V, low noise Vout = 3.0V 100 0.001 0.01 0.1 1 Efficiency (%) Output Current (A) Vout = 1.0V, low noise Vout = 1.0V Vout = 1.5V, low noise Vout = 1.5V Vout = 2.5V, low noise Vout = 2.5V Vout = 3.35V, low noise Vout = 3.35V

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – Power Management Functions Figure 24: Universal IO LDO Regulator External Components VOUT Output voltage range 1.2 3.3 V VLNR Line regulation static VIN = 2.7V to 5.5V IOUT = 1mA 0.07 %/V Line regulation dynamic VIN = 2.7V to 5.5V within 15μs IOUT = 1mA 20 mV VLDR Load regulation static IOUT = 100μA to 200mA 0.014 %/mA Load regulation dynamic IOUT = 100μA to 200mA within 15μs 30 mV RON ON resistance 0.5 1 Ω IOUT Guaranteed load current RMS 200 mA ILIMIT Short-circuit VOUT = 0V 230 mA IQ Quiescent current No Load 5 μAIOUT = 100μA 5 IOUT = 200mA 15 IOFF Shutdown supply current LDO disabled 0.1 1 μA eN Output noise BW = 10Hz to 100Hz; VOUT = 1.2V; IOUT = 1mA; COUT = 2.2μF 112 μVrms BW = 10Hz to 100Hz; VOUT = 3.3V; IOUT = 1mA; COUT = 2.2μF 205 tSTART Startup time 750 μs tSHUTDOWN Shutdown time 500 μs Symbol Parameter Note Min Typ Max Unit CLDOx Output capacitor Ceramic X5R or X7R 2.2 4.7 μF Symbol Parameter Note Min Typ Max Unit

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – Power Management Functions Linear Charger This block can be used to charge Li-Ion batteries. Requiring less external components, a full-featured battery charger with a high degree of flex ibility can easily be realized. The main features of the controller are:

• Charge adapter detection
• Power Path management for dead battery startup
• Low current Trickle charging
• Constant current charging
• Constant voltage charging
• Operation without battery
• Battery presence indication
• NTC temperature supervision
• Input current limitation Figure 29: Linear Charger Block Diagram Pre-Regulator Current Limiter VUSB VSUP VBAT VS UP 1uF Charger battery switc h idea l diod e XIRQ_NTC 15uA/ 15 0uA 15k/ 15 0k 10k/ 10 0k

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – Power Management Functions Figure 30: Linear Charger Modes Charging Modes: This figure describes the 4 different charger modes. Power Path & Current Limiter Linear Charger USB VSUP VBAT VSUP 1uF USB input Power Path & Current Limiter Linear Charger USB VSUP VBAT VSUP 1uF USB input Power Path & Current Limiter Linear Charger USB VSUP VBAT VSUP 1uF USB input Power Path & Current Limiter Linear Charger USB VSUP VBAT VSUP 1uF USB input Battery System Battery System Battery System Battery System No charger is connected, all the power comes out of the battery. Charging is active. All the power comes from the USB through the current limiter. If the system current exceeds the choosen USB current limit, the charging current get reduced automatically. ISYS ICHG 300mAIBAT IBAT 200mA When battery is fully charged, the switch opens to disconnect the battery. All the power comes from the USB. Charging is disabled. If the system current exceeds the choosen USB current limit, the additional needed current will be provided the battery. IUSB > 500mA ISYS 200mA ISYS 700mA ISYS 200mA IUSB > 500mA IUSB > 500mA

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – Power Management Functions Charging Cycle Description Charge Adapter Detection The charge controller uses an integrated detection circuit to determine if an external charge adapter has been applied to the VUSB pin. If the adapter voltage exceeds the battery voltage at pin VBAT by V CHDET the ChDet [ChargerStatus2] will be set. The detection circuit will reset the charge controller (bit ChDet is cleared) as soon as the voltage at the VUSB pin drops to only V CHMIN above the battery voltage. In case the AS3701 device is reset the charge controller will also be reset, even if a charge adapter is applied to the VUSB pin. The Charger detection can be disabled by setting the bit chdet_off [ChargerStatus2] to “1” , which results in a further decrease of internal power consumption. Low Current (Trickle) Charging Trickle charge mode is started when an external charge adapter has been detected, the bit bat_charging_enable [ChargerControl] is set and the battery voltage at pin VBAT is below the V TRICKLE threshold; bits ChDet and Trickle [ChargerStatus1] will be set. In this mode the charge current will be limited to TrickleCurrent [ChargerCurrentControl] to prevent undue stress in case of deeply discharged batteries. Once VTRICKLE has been exceeded, the charger will change over to constant current charging (Trickle is cleared). Constant Current Charging Constant current charging is initiated when bat_charging_ enable [ChargerControl] and the battery voltage at pin VBAT is above the V TRICKLE and below V CHOFF. The bit CCM [ChargerStatus1] is set when the charge r has started, and the charge current will be limited by the battery charge controller. The current for the Constant Current Charging can be selected out of the range defined in ConstantCurrent [ChargerCurrentControl] if the bit cc_range_select [ChargerControl] is set to “0” or out of the range defined in TrickleCurrent [ChargerCurrentControl] if the bit cc_range_select [ChargerControl] is set to “1” . When the battery approaches full charge, its voltage will reach the charge termination threshold V CHOFF. VCHOFF depends on the ChVoltEOC [ChargerVoltageControl] bits settings. Top-OFF charge will be started and the bit CVM [ChargerStatus1] will be set. Constant Voltage Charging Constant voltage charge mode is initiated and the bit CVM [ChargerStatus1] will be set when the VCHOFF threshold has been reached. The charge current is monitored during constant voltage charging. It will be decreasing from its initial value during constant current charging and eventually drops below 5% or 50% of the Constant Current value (depends on the

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – Power Management Functions Stop Charging Conditions There are multiple safety features implemented triggering a stop_charging condition. These are the following:

• Battery temperature is too high: If ntc_high_on [ChargerSupervision] = 1 and the voltage at pin NTC (GPIO3, GPIO4 or XIRQ_NTC) is below V BATTEMP .
• Battery temperature is too low: If ntc_low_on [ChargerSupervision] = 1 and the voltage at pin NTC (GPIO3, GPIO4 or XIRQ_NTC) is above V BATTEMP .
• Charging timeout timer expired: If ch_timeout [ChargerConfig2] > 0 and charging time has been exceeded. (Can be reset by unplugging the charger, setting bat_charging_enable [ChargerControl] = 0 or writing charging_tmax [ChargerConfig2] = 0)
• Die temperature > 140°C ( ov_temp_140 [OvertemperatureControl] is set)
• Reset is initiated (each Reset reason forces a stopping of the charging) Battery Presence Indication After EOC state is reached, a timer for NOBAT detection is started. If there is no battery present, the VBAT voltage will drop to VRESUME. Depending on the load on VBAT and the capacitor on VBAT this might take some milliseconds to 1 second. If AutoResume [ChargerControl] is enabled, the charger will restart charging (Constant Current Charging) after 100ms delay. The 100ms dead time is necessary to get a battery oscillation frequency below 10Hz, if there is no battery present. If the NOBAT detection timer is below 2 seconds after reaching the EOC state, and this happens 2 times in serial, the bit NoBat [ChargerStatus1] is set. If a battery is inserted, the bit will be reset after the timer exceeds the 2 seconds. NTC Supervision Configuration The AS3701 also features a supply for an external NTC resistor to measure the battery temperature while charging. For AS3701A, the pin XIRQ_NTC can be used as the NTC input pin, whilst AS3701B additionally offers the GPIO3 and GPIO4. With the bit NTC_input [ChargerSupervision] the NTC Supervision can be configured.

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – Power Management Functions Figure 33: NTC Supervision Configuration Note(s): 1. If no NTC supervision is selected, all NTC relevant bits are ineffective 2. AS3701B only NTC Resistor Depending on the used resistor value of the NTC (10k or 100k) the internal NTC current (150 μA for 10k or 15 μA for 100k) can be selected via ntc_10k [ChargerSupervision] . High/Low Temperature The battery high temperature supervision is controlled with the bit ntc_high_on [ChargerSupervision ] and this feature is enabled per default. If the temperature is higher than 45°C or 60°C (depending on ntc_mode [ChargerSupervision ]) the flag temp_ cond [ChargerStatus1 ] will be set and the charger will stop operation. When the battery temperature drops and the voltage on NTC pin rises above V BATTEMP_HIGH_OFF , the flag temp_cond will be reset and the charger will continue with the charging again. The battery low temperature supervision is controlled with the bit ntc_low_on [ChargerSupervision ] and this feature is disabled per default. If the temperature is lower than 0°C the flag temp_ cond [ChargerStatus1 ] will be set and the charger will stop operation. When the battery temperature rises and the voltage on NTC pin falls below V BATTEMP_LOW_OFF , the flag temp_cond will be reset and the charger will continue with the charging again. The detection of a high or low battery temperature can also be indicated with a dedicated interrupt mask bit bat_temp_m [InterruptMask2 ]. For the high and low temperature supervision, a temperature hysteresis is included to avoid an oscillation of the charger. The supply for the NTC will be on when either the ntc_high_on or the ntc_low_on bit is set, no matter if a charger is detected or not. Therefore the battery temperature supervision can be used for charging mode and also for discharging mode. NTC_input NTC Supervision Configuration

00 No NTC supervision (1)

01 X I R Q _ N T C p i n

10 GPIO3 pin (2)

11 GPIO4 pin (2)

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – Power Management Functions Charger High/Low Temperature Supervision Figure 36: High/Low Temperature Supervision Temperature Supervision Diagram: Shows the voltage and current settings for the high and low temperature supervision. TLO W_ON TEMPERATURE [°C] CHARGE CURRENT CHARGE VOLTAGE Maximum Charge Current: 1C Typical Charge Voltage: Veoc(typ) 3.82V < ChVoltEOC < 4.44V 44mA < Constant Current < 493mA 11mA < Trickle Current < 130mA COLD TYPICAL HOT Charger is OFF Charger is OFF TLO W_OFF THIGH_OFFTHIGH_ON 0°C 45°C / 60°C

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – Power Management Functions Parameters Figure 37: Linear Charger Electrical Characteristics Symbol Parameter Note Min Typ Max Unit ITRICKLE Trickle current 11 steps programmable 11.. 130 mA VTRICKLE Trickle to constant current threshold VBAT rising 2.9 V ICHG Constant current cc_range_select = 0 44.. 493 mA cc_range_select = 1 11.. 130 mA @ 70mA -8% 70 +8% mA VEOC Charge termination threshold Programmable in 20mV steps 3.82.. 4.44 V end of charge is true 4.15 4.2 4.25 V IEOC EOC current level referring to ICHG (VSUP > 3V) 5.. 50 % IUSB_limit VUSB input current limit @470mA 420 470 500 mA VSUP_prereg Voltage supplied from Preregulator Depending on the bit vsup_voltage 4.4.. 5.5 V VRESUME Resume Voltage limit to start charger VBAT falling threshold referring to VEOC (depending on bit ChVoltResume) 3.3 5.6 % VSUPMIN VSUP level for charging current reduction, to avoid voltage drop on VSUP Trickle or constant current will be regulated down, if VSUP drops below this threshold -6% 3.9 +3% V 4.2 4.5 4.7 V CHDET Charger detection hysteresis VUSB - VBAT Hysteresis is > 40mV 50 75 105 mV VCHMIN 02 03 5 m V IREV_OFF Reverse current shut down VSUP = 5V, VUSB open <1 uA RON_BATSW Battery switch ON-resistance 0.4 Ω

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – Power Management Functions Figure 38: Capacitor Selection for VUSB, VSUP_CHG and VBAT Selection of Bypass Capacitors for the Pins VUSB, VSUP_CHG and VBAT In most applications using the ideal capacitance values shown in the table and the application schematic are recommended. After evaluation of the voltage signals on these pins with real system operational conditions at the user’s application circuit, the user can determine if this ideal capacitance values needs to be adjusted. It must be kept in mind that the capacitance value depends strongly on the rated voltage, therefore a selection of the appropriate nominal capacitor value related to the capacitor size is mandatory to achieve best performance under the specific operational voltage and load current condition of the application system. Current Sinks The following description of the Current Sinks refers only to the pins GPIO1_CURR1 and GPIO2_ CURR2. Hence the suffix “X” stands either for 1 or for 2. The AS3701 contains 2 GPIO pins (GPIO1_CURR1 and GPIO2_ CURR2), providing general purpose current sinks when the register gpioX_mode [GPIOXcontrol] is set to CURRx input. Next to this setting, the register gpioX_iosf [GPIOXcontrol] must be set to one of the GPIO output functions (please see the GPIO section in the following chapter “Detailed Description – System Functions”). Symbol Parameter Note Min Typ Max Unit CVUSB Input capacitor Ceramic X5R or X7R 10 μF CVSUP_CHG Output capacitor Ceramic X5R or X7R 10 μF CVBAT Output capacitor Ceramic X5R or X7R 10 μF

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – Power Management Functions Parameters Figure 39: Current Sinks Electrical Characteristics Symbol Parameter Note Min Typ Max Unit ICURRx CURR1_current = 01h – FFh CURR2_current = 01h – FFh Resolution = 156.86μA0 . 1 6 4 0 m A ICURRx_TOL CURR current accuracy CURRx_current = 40h 9.3 10 10.7 mA VCURRx Voltage compliance During normal operation 0.5 5.5 V VPROTECT Maximum voltage at pin CURRx to protect driver transistor I SINK > 20mA guaranteed by design VBAT + 2V V

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions Start-Up Normal Start-Up The following gives a brief description on a start-up from scratch (battery or charger insertion). More details can be found in the start-up flow chart. A start-up can be activated from 5 different sources:

• Battery insertion from scratch
• Charger insertion from scratch (VBAT < ResVoltFall )
• ON-key has been pulled high in power_off mode
• Reset cycle
• ResVoltRise level was reached During a normal reset cycle a normal startup happens:
• Setting USB current limit and ResVoltRise
• Startup State machine reads out the internal Boot-OTP. The start-up sequence of SD Converter, LDOs and GPIOs are controlled by the Boot-OTP
• Reset-Timer is set by the Boot-OTP
• The reset is released when the Reset Timer expires (external pin XRES) Parameter Figure 40: Start-Up Condition Note(s): 1. The internal pull-down resistor is just active if the bit on _invert is set to "0" (active high configuration). If the ON-key works active low (on_invert = 1) the internal pull-down resistor is deactiva ted and an external pull-up resistor is needed in push-button configuration! Symbol Parameter Note Min Typ Max Unit VON_IL Low level voltage ON pin 20% of VSUP V VON_IH High level voltage ON pin 60% of VSUP V ION_PD (1) Pull down current Bit on_invert = 0 (active high) 41 2 μA Detailed Description – System Functions

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions Figure 41: Start-Up Flowchart Start-Up Batter y or Charger insertion 1. VSUP > VPOR 2. Readout ROM fuse auto_off = 1 POWER OFF state Quie scent curr ent ~1uA Y on_input = 1 (level det) (debounce time = 20ms) OR Charg er insertion (chg_pwr_off_en=0 (level det)) (chg_pwr_off_en=1 (edge det)) N auto_off = 1 OR power_off_at_vsuplow = 1 Y VSUP debounce state Measuring VSUP Quiesent current <30uA N VS UP>ResVoltR ise fo r m or e t ha n 5ms N N on_input = 1 (level det) OR ChDet = 1 N VSUP < ResVoltFall fo r m or e t ha n 500 ms Y N Y Y Y power_off = 1 OR (VSUP<ResVoltFall && power_off_at_vsuplow=1) N Reset all Registers Switch off Regulators reset registers and reload OTP registers exp ect: pwr_off_at_vsup lo w Y RUN startu p seq uence regulator startup sequen ce s tar tu p de la y p ro g ram ma b le General Settings programmable RESET Timer regulator star tup executed waiting time t o release XRES pin 10..15 0ms ACTIVE state XRES = 1 (OSC always on) standby_mod e_on = 1 OR GPIOx = 1 if gpiox_iosf = 6 (edge det) OFF delay wait off_delay N ST AND-BY state al l regulators wi th sd X_stby_on = 1 or ldoX_stby_on = 1 enabled (OSC is off, if sd X_stby_on = 0) any Interr upt appl ied OR on_input = 1 (level det) (debounce time = 20ms) power_off = 1 OR fo rc e_reset = 1 OR (XRES is low && stdby_reset_disable = 1) OR VS UP<ResVoltFall N N Y Y Die temp > 140°C (tco_140_a = 1)Y power_off = 1 OR fo rc e_reset = 1 OR XRES is lo w OR VS UP<ResVoltFall OR ON long-press (edge det) N Y Die temp > 110°C (tco_110_a = 1) N Y N any state OFF delay off_delay = 8ms OFF delay wait off_delay OFF delay off_delay = 8ms OFF delay wait off_delay

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions Figure 46: Start-Up Sequence Diagram 5/5 Start-Up Sequence: This diagram shows the timing of an external initiated reset command (forcing XRES to low) followed by a startup (battery and/or USB charger adapter connected, VSUP > ResVoltRise) Reset XRES is a low active bi-directional pin. An external pull-up to the periphery supply has to be added. During each reset cycle the following states are controlled by the AS3701:

• Pin XRES is forced to GND
• Normal startup with progra mmable power-ON sequence and regulator voltages
• Reset is active until the prog rammable reset timer (set by res_timer [ResetTimer]) expires
• All registers are set to their default values after power-ON, except the reset control- and status-registers.
• XRES is pulled high by the external resistor and the whole system is leaving the reset state Note(s): Programming is controlled by the internal Boot-OTP VSUP > ResVoltRise 0ms delay (if Reg1_delay =0 ) 1ms delay (if Reg1_delay = 1 and del_time =0 ) 4ms delay (if Reg1_delay = 1 and del_time =1 ) 10..150ms set by res_timer in OTP XRES 0ms delay (if Reg4_delay =0 ) 1ms delay (if Reg4_delay = 1 and del_time =0 ) 4ms delay (if Reg4_delay = 1 and del_time =1 ) PWRGood 1ms delay between last timeslot (regulator) and PWRGood signal going high reg1_V (b0:7 fuse abh) reg4_V (b0:7 fuse afh) 0, 8, 16 or 32ms OFF delay e xte rn al H W reset command 5ms debounce VSUP > ResVoltRise 8ms OFF delay Reg1_addr (b0:3 fuse aah) Reg4_addr (b4:7 fuse adh)

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions RESET Reasons Reset can be activated from the below mentioned different sources:

• VPOR has been reached (VSU P rising from the scratch)
• ResVoltFall was reached (VSU P < ResVoltFall [Battery_ voltage_monitor])
• Software forced reset ( force_reset [ResetControl] = 1)
• XRES is pulled to low
• ON-key long press (on_tast_sw is set to "0")
• Overtemperature Voltage Detection A Reset gets initiated, if VSUP rises from scratch and reaches the VPOR level. The pin XRES is only released if VSUP is above ResVoltRise . VXRES_fall is only accepted if the re set condition is longer than VXRES_mask . This guard time is used to avoid a complete reset of the system in case of short drops of VSUP . Figure 47: Voltage Detection Reset Software Forced Reset Writing “1” into the register bit force_reset [ResetControl] immediately starts a reset cycle. The bit force_reset is automatically cleared by this reset. External Triggered Reset If the pin XRES is pulled from high to low by an external source (e.g. microprocessor or button) a reset cycle is started as well. SupResEn power_off_at_vsuplow = 0 A reset is initiated, if VSUP < 2.7V. If enabled, an interrupt is executed at ResVoltFall. Automatic restart, if VSUP > ResVoltRise. 1 A reset is initiated, if VSUP < ResVoltFall. Automatic restart, if VSUP > ResVoltRise.

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions Long ON-Key Press For a reset initiated with a long ON-key press, this feature must be enabled by setting the bit onkey_lpress_en [ResetControl] to “1” . When applying a high level on the ON input pin for 4s/8s (depending on on_lpress_delay [ReferenceControl] ) a reset gets initiated, if the bit onkey_lpress_reset [ReferenceControl] is set to “1” . This is thought as a safety feature when the SW hangs up. A long ON key reset is just possi ble, if the ON key works as a push-button ( on_tast_sw [ReferenceControl] is set to “0”) Figure 48: ON-Key Long Press RESET Behavior Overtemperature Reset A reset cycle is getting started, if the overtemperature threshold is reached and the bit ov_temp_140 [OvertemperatureControl] is set. Parameter Figure 49: XRES Input Characteristics onkey_ lpress_en onkey_ lpress_reset on_ lpress_ delay on_tast_sw Long Press Behavior

0 X X X No ON-key long press reset possible

110 0 8s long press on the ON-push-button forces a reset 111 0 4s long press on the ON-push- button forces a reset 11X 1 No reset possible, if ON-key works as a switch Symbol Parameter Note Min Typ Max Unit VXRES_IL RESET low level voltage 0.4 V VXRES_IH RESET high level voltage 1.4 V

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions Figure 50: Reset Levels Note(s): 1. The selection of the range and level is done via OTP . It´s recommended to set the ResVoltRis e level 200mV above the ResVoltF all level to have a hysteresis 2. 2.7V is the default value, other levels can be set via SW 3. XRES signal is debounced wi th the specific mask time for rising- and falling slope of V BAT Stand-By Stand-by allows shutting down all rails or just a selected number and can be achieved by one of the following cases: Enter Via GPIO To enter the Stand-by mode via GPIO command, the following settings have to be done:

• Enable just these interrupt sources which sh ould lead to leave the stand-by mode
• Make sure that the specified in terrupt is inactive (clear the Register [InterruptStatus] by register reading)
• Set the gpioX_mode [GPIOxcontrol] to input and the gpioX_iosf [GPIOxcontrol] should be set to Stand-by + vselect input (gpioX_iosf = 6)
• Set RegX_select [Reg_Control] and RegX_voltage [RegX_ Voltage] if another voltage is ne eded during stand-by for up to 2 regulators
• Define which regulators should be kept powered during Stand-by mode ( sdX_stby_on and ldoX_stby_on [Reg_ standby_mod1] )
• Set the off_delay [Startup_Control] for going into stand-by after the GPIO command
• Activate the selected GPIO Symbol Parameter Note Min Typ Max Unit VPOR Overall power on reset Monitor on VSUPpower ON reset for all internal functions 1.5 2.0 2.3 V V XRES_rise RESET level for VSUP rising Monitor voltage on VSUP rising level ResVolt Rise(1) V VXRES_fall RESET Level for VSUP falling Monitor voltage on VSUP falling level 2.7 V if SupResEn = 1 only ResVolt Fall(2) V VXRES_mask Mask time for VXRES_fall Duration for VBAT < ResVoltFall until a reset cycle is started (3) FastResEn = 0 3 ms FastResEn = 1 64 μs

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions Enter Via SW To enter the Stand-by mode via I²C command, the following settings have to be done:

• Enable just these interrupt sources which sh ould lead to leave the stand-by mode
• Make sure that the specified in terrupt is inactive (clear the Register [InterruptStatus] by register reading)
• Define which regulators should be kept powered during Stand-by mode ( sdX_stby_on and ldoX_stby_on [Reg_ standby_mod1] )
• Set the off_delay [Startup_Control] for going into stand-by after the I²C command
• Set standby_mode_on [ReferenceControl] to 1 During Stand-by all regulators are switched OFF, except those, which are selected either with RegX_select [Reg_Control] or with sdX_stby_on and ldoX_stby_on [Reg_standby_mod1] . XRES goes active (can be disabled with standby_reset_disable [Sartup_ Control] ) and pwr_good goes inactive. Furthermore, to save power especially in this mode, the internal oscillator is just working, when it is needed. Leaving Stand-By Stand-by can be terminated by:
• Any kind of interrupt (if it was defined right before going into Stand-by)
• ON-key push-button press ( on_tast_sw is set to “0”)
• Reset
• Power OFF
• Overtemperature

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions Power OFF During power OFF state all circuits are shut-OFF. Thus the current consumption of AS3701 is reduced to about 1 μA. Except the reset control registers, all other registers are set to their default value after power-ON. The chip stays in power OFF mode until

• The external pin ON is pulled high
• The charger is inserted or
• The VPOR level is touched to start a complete reset cycle. The AS3701 can be set into Powe r OFF if one of the following conditions occur:
• ResVoltFall was reached (VSUP < ResVoltFall [Battery_ voltage_monitor] )
• Software forced power OFF ( power_off [ResetControl] = 1)
• ON-key long press
• auto_off [Startup_Control] is enabled (VSUP rising from the scratch) Voltage Detection If VSUP falls below ResVoltFall for longer than 500ms and the bit power_off_at_vsuplow [Startup_Control] is set to “1” , the PMIC enters the Power Off mode. Figure 51: Voltage Detection Power OFF Software Forced Power OFF To put the chip into power off mode, write ‘1’ into power_off [ResetControl] . In ON-key-switch configuration the AS3701 will startup immediately again, if th e switch is in ON position. The bit power_off bit is automatically cleared by a startup and its associated reset cycle. SupResEn power_off_at_vsuplow = 1 A power-down is initiated, if VSUP < 2.7V. If enabled, an interrupt is executed at ResVoltFall. Restart only possible with ON key or charger insertion, if VSUP > ResVoltRise. 1 A power-down is initiated, if VSUP < ResVoltFall. Restart only possible with ON key or charger insertion, if VSUP > ResVoltRise.

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions Long ON-Key Press For a power OFF asserted with a long ON-key press, this feature must be enabled by setting the bit onkey_lpress_en [ResetControl] t o “ 1 ”. W h e n a p p l y i n g a h i g h l e ve l o n t h e O N i n p u t pin for 4s/8s (depending on on_lpress_delay [ReferenceControl] ) a power off gets initiated, if the bit onkey_lpress_reset [ReferenceControl] is set to “0” . A long ON key power off is possible, if the ON key works as a push-button or as a switch. Figure 52: ON-Key Long Press Power OFF Behavior Note(s): 1. If a USB charger adapter is connected, the ON-key push-button long press would only force a power-off, if the bit chg_pwr_of f_en is set to "1"! 2. If a USB charger adapter is connected and the bit chg_pwr_off_en is set to "0" (level detection), the ON-key-switch OFF posi tion has no influence. The PMIC will stay in Activemode as long as the USB adapter is present! If a USB adapter is connected and the bit chg_ pwr_off_en is set to "1" (edge detection), the PMIC can be set into Power-OFF via I²C, if the ON-key switch is also in OFF posi tion! Auto-OFF If VSUP is rising from the scratch and the bit auto_off [Startup_ Control] is set to “1” , the PMIC enters immediately the Power-OFF mode right after VSUP reaches the ResVoltRise . If the ON-key is in switch configuration the Auto-OFF feature only works, when the switch is in OFF position during VSUP rising from scratch! onkey_ lpress_en onkey_lpress_ reset on_reset_ delay on_tast_sw Long Press Behavior 0X X X No ON-key long press power OFF is possible 10 0 0 8s long press on the ON-push-button forces a power OFF (1) 10 1 0 4s long press on the ON-push-button forces a power OFF (1) 10 0 1 Forces a power OFF after 8s, if ON-switch is set to OFF position (2) 10 1 1 Forces a power OFF after 4s, if ON-switch is set to OFF position (2)

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions Internal References

Description

The internal 2.0V reference and the oscillator are powered either via the VUSB input pin or via the VBAT input pin, depending on which level is higher. The internal oscillator is used for PWM, SD frequency and all timings, which are needed for the charger, the startup sequence and reset delays. Parameter Figure 53: Reference Parameter Reference Parameter: Shows the key electrical parameter of the on-chip oscillator Symbol Parameter Conditions Min Typ Max Unit fCLK Accuracy of internal reference clock Adjustable by serial interface register clk_int -12 f CLK +12 %

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions GPIO Pins AS3701A contains 2 GPIO pins and AS3701B offers 5 GPIO pins. Each of the pins can be configured as digital input, digital input (with pull-up or pull-down), pu sh-pull output or open drain output (with or without pull-up). When configured as output the output source can be a regi ster bit, or the PWM generator. Additional the GPIO1 and GPIO2 can be configured as a Current sink and the GPIO3 and GPIO4 (only available in AS3701B) can offer an input to connect a NTC for supervising the battery temperature. The polarity of the input and output signals can be inverted with the corresponding gpioX_invert [GPIOXcontrol] bit, all further descriptions refer to normal (non-inverted) mode. Figure 54: GPIO Block Diagram GPIO Block Diagram: Shows the internal structure of the IO pads gp io X_ou t: 0 VSU P_low output: 2 Pwr_go od outp ut: 7 In terrupt out put: 1 Ch arger a ctive outp ut: 10 EOC ou tpu t: 11 PWM ou tpu t: 14 gp io X_in: 0 Cu rre nt sink PWM inpu t: 4 vs el ec t i np u t: 5 Stan d-by + vse le ct in put: 6 GPIO Interrupt input: 3 Ch arger C urrent Ran ge1: 8 Ch arger C urrent Ran ge2: 9 10 0/50 0mA U SB current limit: 12 90 0/14 00mA U SB current limit: 13 gp io X_invert gp io X_iosf gp io X_i osf gp io X_mode = 1, 2 or 6 gp io X_mode = 1 gp io X_mode = 0, 2, 4, 5 or 6 gp io X_mode = 4 or 6 gp io X_mode = 5 30 0k 30 0k VS UP GPIOx CU RR1/2 Ch arger e na ble in pu t: 15 gp io3/4_mode = 3 (NTC) gpio1/2_mode = 7 gp io X_invert gp io X_iosf curr1/2_current gp io X_ou t: 0 VSU P_l ow o utp ut: 2 Pwr_go od outp ut: 7 In terrupt out put: 1 Ch arger a ctive outp ut: 10 EOC output: 11 PWM ou tput: 14 gp io1/2_mode = 7

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions Figure 55: GPIO Pin Characteristics GPIO Pins: Shows the key electrical parameter of the GPIO pins. VSUP = 2.7 to 5.5V; unless otherwise mentioned IO Functions Normal IO Operation If set to input, the logic level of the signal present at the GPIOx pin can be read from gpioX_in [GPIOsignal_in] . This mode is also used for the ON/OFF control of the DCDC and LDOs. The selection, which regulator is cont rolled by which GPIO, is done with the gpio_ctrl_sdX [GPIO_ctrl2] or gpio_ctrl_ldoX [GPIO_ ctrl2] bits. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to gpioX_in . If the output mode is chosen, gpioX_out [GPIOsignal_out] specifies the logic level of the GPIOx pin. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to gpioX_out . For GPIO1 and GPIO2, the logic level of the output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. Symbol Parameter Note Min Typ Max Unit VGPIO_max Max voltage on GPIOx pins Pin VSUP is used as supply for the GPIO pins VSUP + 0.3 V VOL Low level output voltage IOL=+1mA digital output +0.4 V VOH High level output voltage IOH=–1mA; digital push-pull output 0.8*VSUP V VIL Low level input voltage digital input 20% of VSUP V VIH High level input voltage digital input 60% of VSUP V ILEAKAGE Leakage current high impedance 1 μA Rpull-up Pull-up resistance if enabled; VSUP = 3.7V 300 kΩ Rpull-down Pull-down resistance if enabled; VSUP = 3.7V 300 kΩ

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions Interrupt Output GPIOx pin logic state is derived from the interrupt signal XIRQ. Whenever an interrupt is present the GPIOx pin will be pulled high. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to Interrupt output . For GPIO1 and GPIO2, the Inte rrupt output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. VSUP_low Output GPIOx pin will go high, if VSUP falls below ResVoltFall and SupResEn [Battery_voltage_monitor] = 0. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to VSUP_low output . For GPIO1 and GPIO2, the VSUP _low output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. PWRGOOD Output This signal will go high at the end of the start-up sequence. This can be used as a second reset si gnal to the processor to e.g. start oscillators. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to Pwr_good output . For GPIO1 and GPIO2, the Pwr_ good output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. Charger Active Output When selected, the GPIOx will go high if the charger is active. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to Charger active output . For GPIO1 and GPIO2, the Charger active output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. EOC Output When selected, the GPIOx will go high if the charger has reached the EOC state. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to EOC output . For GPIO1 and GPIO2, the EOC outp ut signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx.

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions PWM Output When selected, the GPIOx output provides the PWM signal generated by the internal programmable PWM generator. Its timing is defined by pwm_h_time [pwm_control_h] , pwm_l_ time [pwm_control_l] and pwm_div [ReferenceControl] . The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to PWM output . For GPIO1 and GPIO2, the PWM output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. GPIO Interrupt Input A falling or rising edge will set the gpio_int bit. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to GPIO Interrupt input . Current Sink PWM Input The GPIO is used as PWM input for the current sink to control the current. 100% PMW mode will set the current to the value set in currX_current [currX_value] register. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Current sink PWM input . Vselect Input As long as the GPIOx pin is low the DCDC/LDOs operate with the normal register settings. If the GPIOx pin goes high, the settings will change to the ones stored in RegX_voltage [RegX_ Voltage] . The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to vselect input . GPIO1 and GPIO2 may be used to control two regulators separately. Figure 56: GPIO Vselect Modes gpio1_ iosf gpio2_ iosf gpio3_ iosf gpio4_ iosf gpio5_ iosf Vselect Mode ≠5 ≠5 ≠5 ≠5 ≠5 No voltage select by GPIO for regulator 5 ≠ 5≠ 5≠ 5≠ 5 GPIO1 controls regulator selected by reg1_select and reg2_select ≠5 5 ≠5 ≠5 ≠5 GPIO2 controls regulator selected by reg1_select and reg2_select 5 5 ≠5 ≠5 ≠5 GPIO1 controls regulator selected by reg1_select GPIO2 controls regulator selected by reg2_select

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions IO Functions: Shows the different Vselect control modes, depending on the setting of the GPIO special function 5. Note(s): 1. AS3701B only Stand-By and Vselect Input This mode is very similar to th e Vselect mode described in the previous paragraph. The chip is set into stand-by mode when the GPIOx pin goes high and wakes up again when the pin is pulled low and the gpio_restart_int_m [InterruptMask2] has been set before going into stand- by. Additional to the stand-by feature, the voltage setting of 2 regulators can be changed with the same command. This requires the setting of the corresponding regulator ( sd1_stby_on and/or ldo1_stby_on and/or ldo2_stby_on [Reg_standby_mod1] ). The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Stand-by + vselect input . ≠5 ≠5 5 ≠5 ≠5 GPIO3 controls regulator selected by reg1_select and reg2_select (1) ≠5 ≠5 ≠5 5 ≠5 GPIO4 controls regulator selected by reg1_select and reg2_select (1) ≠5 ≠5 ≠5 ≠5 5 GPIO5 controls regulator selected by reg1_select and reg2_select (1) gpio1_ iosf gpio2_ iosf gpio3_ iosf gpio4_ iosf gpio5_ iosf Vselect Mode

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions Figure 57: Stand-By and Vselect Modes IO Functions: Shows the different Vselect and stand-by control modes, depending on the setting of the GPIO special function 6. Note(s): 1. AS3701B only Charger Current Range 1 With this function the charging current (trickle current and constant current) can be set to 11mA(trickle) + 133mA(constant) or 22mA(trickle) + 223mA(constant). The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Charger Current Range1 . Charger Current Range 2 With this function the charging current (trickle current and constant current) can be set to 33mA(trickle) + 357mA(constant) or 45mA(trickle) + 493mA(constant). The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Charger Current Range2 . 100/500mA Charger Input With this function the charger input current limiter can be set to 100mA or 500mA. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to 100/500mA USB current limit . gpio1 _iosf gpio2 _iosf gpio3 _iosf gpio4 _iosf gpio5 _iosf Vselect Mode Stand-By Control ≠6 ≠6 ≠6 ≠6 ≠6 No voltage select by GPIO for regulator No 6 ≠ 6≠ 6≠ 6≠ 6 GPIO1 controls regulator selected by reg1_select and reg2_select Yes ≠6 6 ≠6 ≠6 ≠6 GPIO2 controls regulator selected by reg1_select and reg2_select Yes ≠6 ≠6 6 ≠6 ≠6 GPIO3 controls regulator selected by reg1_select and reg2_select (1) Yes ≠6 ≠6 ≠6 6 ≠6 GPIO4 controls regulator selected by reg1_select and reg2_select (1) Yes ≠6 ≠6 ≠6 ≠6 6 GPIO5 controls regulator selected by reg1_select and reg2_select (1) Yes

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Detailed Description – System Functions 800/1100mA Charger Input With this function the charger input current limiter can be set to 800mA or 1100mA. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to 800/1100mA USB current limit . Charging Enable Input When pulling the GPIO to high the charger is be ing enabled and vice versa. This is to enable the charger without I²C communication. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Charger enable input . Supervisor The Step Down DCDC Converter has an integrated overcurrent protection. An overtemperature protection of the chip is also integrated which can be switched ON with the serial interface signal temp_pmc_on [OvertemperatureControl] (enabled by default; it is not recommended to disable the overtemperature protection). Temperature Supervision The chip has two signals for the serial interface: ov_temp_110 and ov_temp_140 [OvertemperatureControl] . The flag ov_temp_110 is automatically reset if the overtemperature condition is removed, whereas ov_temp_140 has to be reset by the serial interface with the signal rst_ov_ temp_140 [OvertemperatureControl] . If the flag ov_temp_140 is set, an automatic reset of the co mplete chip is initiated. The chip will only start-up when the temperature falls below the T110 level (including hysteresis). The flag ov_temp_140 is not affected by this reset cycle allowing the software to detect the reason for this unexpected shutdown. Figure 58: Overtemperature Protection Symbol Parameter Note Min Typ Max Unit T110 ov_temp_110 rising threshold 95 110 125 °C T 140 ov_temp_140 rising threshold 125 140 155 °C THYST ov_temp_110 and ov_temp_140 hysteresis 5° C

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions Interrupt Generation The interrupt controller generates an interrupt request for the host controller as soon as one or more of the bits in the InterruptMask registers are set by pulling low the pin XIRQ. All the interrupt sources can be enabled in the Interrupt Mask registers. If an interrupt occurs, the Interrupt Status registers get set and cleared automatically after the host controller has read them. To prevent the AS3701 device from losing an interrupt event, the register that is read is captured before it is transmitted to the host controller via the serial interface. As soon as the transmission of the captured value is completed, a logical AND operation with the bit wise inverted captured value is applied to the register to clear all interr upt bits that have already been transmitted. Clearing the read interrupt bits takes 2 clock cycles, a read access to the same register, before the clearing process has completed, will yield a value of ‘0’ . Note that an interrupt that has been present at the previous read access will be cleared as well in case it occurs again before the clearing process has completed. Wire-Serial Control Interface Feature List

• Fast-mode capability (max. SCL-frequency is 400 kHz)
• 7+1-bit addressing mode
• 60h x 8-bit data registers (word address 0x00 - 0x60)
• Write formats: Single-Byte-Write, Page-Write
• Read formats: Current-Addr ess-Read, Random-Read, Sequential-Read
• SDA input delay and SCL spike filtering by integrated RC-components

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Detailed Description – System Functions The transmission begins with the START condition, which is generated by the master when the bus is in IDLE state (the bus is free). The device-write address is followed by the word address. After the word address any number of data bytes can be sent to the slave. The word address is incremented internally, in order to write subsequent data bytes on subsequent address locations. For reading data from the slave de vice, the master has to change the transfer direction. This can be done either with a repeated START condition followed by the device-read address, or simply with a new transmission START followed by the device-read address, when the bus is in IDLE state. The device-read address is always followed by the 1st register byte transmitted from the slave. In Read Mode any number of subsequent register bytes can be read from the slave. The word address is incremented internally. I²C Read Access Random, Sequential and Current Address Read are used to read data from the slave. Figure 62: I²C Random Read Random Read and Sequential Read are combined formats. The repeated START condition is used to change the direction after the data transfer from the master. The word address transfer is initiated with a START condition issued by the master while the bus is idle. The START condition is followed by the device-write address and the word address. In order to change the data direction a repeated START condition is issued on the 1 st SCL pulse after the acknowledge bit of the word address transfer. After the reception of the device-read address, the slave be comes the transmitter. In this state the slave transmits register data located by the previous received word address vector. The master responds to the data byte with a not-acknowledge, and issues a STOP condition on the bus. WA DR dataAA S r AN PSD W read register WA ++

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 66: Register Overview Addr Name D7 D6 D5 D4 D3 D2 D1 D0 01h SD1Voltage sd1_frequ sd1_vsel<6:0> 02h LDO1Voltage ldo1_on ldo1_ilimit ldo1_vsel<5:0> 03h LDO2Voltage ldo2_on ldo2_ilimit ldo2_vsel<5:0> 09h GPIO1control gpio1_invert gpio1_mode<6:4> gpio1_iosf<3:0> 0ah GPIO2control gpio2_invert gpio2_mode<6:4> gpio2_iosf<3:0> 0bh GPIO3control gpio3_invert gpio3_mode<6:4> gpio3_iosf<3:0> 0ch GPIO4control gpio4_invert gpio4_mode<6:4> gpio4_iosf<3:0> 0dh GPIO5control gpio5_invert gpio5_mode<6:4> gpio5_iosf<3:0> 20h GPIOsignal_out - gpio5_out gpio4_out gpio3_out gpio2_out gpio1_out 21h GPIOsignal_in - gpio5_in gpio4_in gpio3_in gpio2_in gpio1_in 22h Reg1_Voltage - Reg1_voltage<6:0> 23h Reg2_Voltage - Reg2_voltage<6:0> 24h Reg_Control - Reg2_select<5:4> - Reg1_select<1:0> 25h GPIO_ctrl1 - gpio_ctrl_ldo2<6:4> - gpio_ctrl_ldo1<2:0> 26h GPIO_ctrl2 - gpio_ctrl_sd1<2:0> 30h SD_control1 sd1_enable sd1_low_ noise sd1_fast sd1_fsel - dvm_enable dvm_time Register Description

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description 32h Battery_voltage_ monitor FastResEn SupResEn ResVoltFall<5:3> ResVoltRise<2:0> 33h Startup_control chg_pwr_off_ en power_off_ at_vsuplow stby_reset_ disable auto_off off_delay<3:2> res_timer<1:0> 35h ReferenceControl on_lpress_ delay on_tast_sw onkey_ lpress_reset standby_ 36h ResetControl reset_reason<7:4> onkey_ lpress_en on_input power_off force_reset 37h Overtemperature Control tco_140_a tco_110_a temp_test<5:4> rst_ov_temp_ 140 ov_temp_140 ov_temp_110 temp_pmc_ on 39h Reg_standby_ mod1 - disable_ regpd sd1_stby_on ldo2_stby_on ldo1_stby_on 41h pwm_control_l pwm_l_time<7:0> 42h pwm_control_h pwm_h_time<7:0> 43h curr1_value curr1_current<7:0> 44h curr2_value curr2_current<7:0> 73h RegStatus - curr2_lv curr1_lv - sd1_lv 74h InterruptMask1 LowBat_int_ m ovtmp_int_m onkey_int_m chdet_int_m eoc_int_m resume_int_ m nobat_int_m trickle_int_m 75h InterruptMask2 gpio5_int_m gpio4_int_m gpio3_int_m gpio2_int_m gpio1_int_m gpio_restart_ 77h InterruptStatus1 LowBat_int_i ovtmp_int_i onkey_int_i chdet_int_i eoc_int_i resume_int_i nobat_int_i trickle_int_i 78h InterruptStatus2 gpio5_int_i gpio4_int_i gpio3_int_i gpio2_int_i gpio1_int_i gpio_restart_ Addr Name D7 D6 D5 D4 D3 D2 D1 D0

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description 80h ChargerControl cc_range_ select AutoResume bat_ charging_ enable usb_chgEn usb_current<3:0> 81h ChargerVoltageC ontrol Vsup_min<7:6> - ChVoltEOC<4:0> 82h ChargerCurrentCo ntrol TrickleCurrent<7:4> ContantCurrent<3:0> 83h ChargerConfig1 Charging_ 1Hz_clk ChVoltResum e temp_sel<5:4> vsup_voltage<3:1> - 84h ChargerConfig2 eoc_current<7:5> charging_ tmax ch_timeout<3:0> 85h Chargersupervisio n ntc_high_on ntc_low_on ntc_10k ntc_mode NTC_input<3:2> ntc_beta<1:0> 86h ChargerStatus1 NoBat temp_cond<6:5> EOC CVM Trickle Resume CCM 87h ChargerStatus2 - chdet_off ChDet batsw_mode<1:0> 8eh LockRegister - - - charger_lock reg_lock<1:0> 90h ASIC_ID1 ID1<7:0> 91h ASIC_ID2 - revision<3:0> a5h Fuse5 del_time sequ_on a6h Fuse6 on_tast_sw onkey_ lpress_reset on_invert Addr Name D7 D6 D5 D4 D3 D2 D1 D0

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description a7h Fuse7 auto_off chg_pwr_off_ en res_timer<5:4> sd1_fsel sd1_fast power_off_ at_vsuplow i2c_deva_ bit1 a8h Fuse8 usb_current<7:4> ResVoltRise<3:1> on_lpress_ delay a9h Fuse9 Reg4_del Reg3_del Reg2_del Reg1_del SupResEn onkey_ lpress_en NTC_input<1:0> aah Fuse10 Reg2_addr<7:4> Reg1_addr<3:0> abh Fuse11 reg1_V<7:0> ach Fuse12 reg2_V<7:0> adh Fuse13 Reg4_addr<7:4> Reg3_addr<3:0> aeh Fuse14 reg3_V<7:0> afh Fuse15 reg4_V<7:0> Addr Name D7 D6 D5 D4 D3 D2 D1 D0

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 69: LDO2Voltage Addr:03h LDO2Voltage Bit Bit Name Default Access Bit Description 7l d o 2 _ o n b 0 R W Switch ON of LDO2 0 : LDO OFF 1 : LDO ON 6 ldo2_ilimit b0 RW Sets current limit of LDO2 0 : 100mA operating range 1 : 200mA operating range 5:0 ldo2_vsel b000000 RW The voltage select bits set the LDO output voltage 00h-2Ah : V_LDO2=1.2V+ldo2_vsel*50mV 2Bh-3Fh : Do not use

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 70: GPIO1control Addr:09h GPIO1control Bit Bit Name Default Access Bit Description 7 gpio1_invert b0 RW Invert GPIO1 input/output 0 : Normal Mode 1 : Invert input or output 6:4 gpio1_mode b011 RW Selects the GPIO1 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : Input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : CURR1 3:0 gpio1_iosf b0000 RW Selects the GPIO1 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select, if gpio2_iosf=5 then apply on reg1_select only) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 71: GPIO2control Addr:0ah GPIO2control Bit Bit Name Default Access Bit Description 7 gpio2_invert b0 RW Invert GPIO2 input/output 0 : Normal Mode 1 : Invert input or output 6:4 gpio2_mode b011 RW Selects the GPIO2 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : Input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : CURR2 3:0 gpio2_iosf b0000 RW Selects the GPIO2 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select, if gpio1_iosf=5 then apply on reg2_select only) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 72: GPIO3control Addr:0bh GPIO3control Bit Bit Name Default Access Bit Description 7 gpio3_invert b0 RW Invert GPIO3 input/output 0 : Normal Mode 1 : Invert input or output 6:4 gpio3_mode b011 RW Selects the GPIO3 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : NTC input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : NA 3:0 gpio3_iosf b0000 RW Selects the GPIO3 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 73: GPIO4control Addr:0ch GPIO4control Bit Bit Name Default Access Bit Description 7 gpio4_invert b0 RW Invert GPIO4 input/output 0 : Normal Mode 1 : Invert input or output 6:4 gpio4_mode b011 RW Selects the GPIO4 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : NTC input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : NA 3:0 gpio4_iosf b0000 RW Selects the GPIO4 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 74: GPIO5control Addr:0dh GPIO5control Bit Bit Name Default Access Bit Description 7 gpio5_invert b0 RW Invert GPIO5 input/output 0 : Normal Mode 1 : Invert input or output 6:4 gpio5_mode b011 RW Selects the GPIO5 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : Input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : NA 3:0 gpio5_iosf b0000 RW Selects the GPIO5 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 82: SD_control1 Addr:30h SD_control1 Bit Bit Name Default Access Bit Description 7 sd1_enable b1 RW Global stepdown SD1 enable 0 : SD1 disabled 1 : SD1 enabled 6 sd1_low_ noise b0 RW Enables low noise mode of SD1. If enabled smaller current pulses and output ripple is activated 0 : Normal mode. Minimum current pulses of >100mA applied in skip mode 1 : Low noise mode. Only minimum on time applied in skip mode 5s d 1 _ f a s t b 0 R W _ S M Selects a faster regulation mode for SD1 suitable for larger load changes. 0 : Normal mode, Cext=10μF 1 : Fast mode, Cext=22μF required 4s d 1 _ f s e l b 0 R W _ S M Selects between high and low frequency range 0 : 1 MHz if sd1_frequ=0, 3MHz if sd1_frequ=1 1 : 2 MHz if sd1_frequ=0, 4MHz if sd1_frequ=1 1 dvm_enable b0 RW Enabling of Dynamic Voltage Management If voltage of SD1 is changed during operation (sd1_vsel) voltage is de/increased by single steps 0 : DVM disabled 1 : DVM enabled 0 dvm_time b0 RW Time steps of DVM voltage change of SD1 0 : 8 μsec time delay between steps 1 : 16 μsec time delay between steps

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 83: Battery_voltage_monitor Note(s): 1. If VBAT falls below ResVoltFall only an interrupt is genera ted (if enabled) and the uProcessor can shut down the system. Addr:32h Battery_voltage_monitor Bit Bit Name Default Access Bit Description 7F a s t R e s E n b 0 R W 0 : Vresetfall debounce time = 3msec 1 : Vresetfall debounce time = 64μsec 6S u p R e s E n b 0 R W _ S M 0 : A reset is generated if VSUP falls below 2.7V (1) 1 : A reset is generated if VSUP falls below ResVoltFall 5:3 ResVoltFall b000 RW_SM This value determines the reset level ResVoltFall for falling VBAT. It is recommended to set this value at least 200mV lower than ResVoltRise 0 : 2.7V 1 : 2.9V 2 : 3.1V 3 : 3.2V 4 : 3.3V 5 : 3.4V 6 : 3.5V 7 : 3.6V 2:0 ResVoltRise b001 RO This value determines the reset level ResVoltRise for rising VBAT. It is recommended to set this value at least 200mV higher than ResVoltFall 0 : 2.7V 1 : 2.9V 2 : 3.1V 3 : 3.2V 4 : 3.3V 5 : 3.4V 6 : 3.5V 7 : 3.6V

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 84: Startup_Control Addr:33h Startup_Control Bit Bit Name Default Access Bit Description 7 chg_pwr_off_ en b0 RO Select charger detection in power OFF mode Read only (OTP setting) 0 : Exit of Power OFF mode, if charger is detected (level detection) 1 : Exit of Power OFF mode, if charger insertion is detected (rising edge detection) 6 power_off_at_ vsuplow b0 RW_SM Switch into Power OFF mode if low VSUP is detected during active or standby mode (Pin ON = low and bit auto_off = 0) 0 : If low VSUP(ResVoltFall) is detected, enter VSUP Debounce state, continuously monitor VSUP voltage and startup if VSUP voltage is above ResVoltRise 1 : If low VSUP(ResVoltFall) is detected, enter power OFF mode 5 stby_reset_ disable b0 RW Disable Reset output signal (PIN XRES) in standby mode 0 : Normal mode, reset is active in standby mode 1 : No reset in standby mode and during exit of standby mode 4 auto_off b0 RO Defines startup behavior at first battery insertion 0 : Startup of chip if VBAT>ResVoltRise 1 : Enter power OFF mode (Startup with ON key or charger insertion) 3:2 off_delay b01 RW Set Delay between I²C command, GPIO or Reset signal for power_off, standby mode or reset and execution of that command 0 : No delay 1 : 8 ms (default) 2 : 16 ms 3 : 32 ms 1:0 res_timer b00 RW_SM Set RESTime, after the last regulator has started 0 : RESTIME=10ms (default) 1 : RESTIME=50ms 2 : RESTIME=100ms 3 : RESTIME=150ms

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 85: ReferenceControl Addr:35h ReferenceControl Bit Bit Name Default Access Bit Description 7 on_lpress_ delay b0 RW_SM Sets the ON reset delay time 0 : 8s (if onkey_lpress_en=1) 1 : 4s (if onkey_lpress_en=1) 6 on_tast_sw b0 RO Selects mode of ON input 0 : ON key works as push-button 1 : ON key works as switch 5 onkey_lpress_ reset b0 RW_SM Selects behavior for ONKEY longpress 0 : Long onkey press forces change to power_off mode (if on_tast_sw=0 and onkey_lpress_en=1) 1 : Long onkey press forces a reset (if on_tast_sw=0 and onkey_lpress_en=1) 4 standby_ mode_on b0 RW_SM Setting to 1 sets the PMU into standby mode. All regulators are disabled except those regulators enabled by Reg_standby_mod. XRES will be pulled to low. A normal startup of all regulators will be done with any interrupt (has to be enabled before entering standby mode). 3:2 clk_int b00 R_PUSH Sets the internal CLK frequency fCLK used for DCDCs, PWM, ... 0 : 4 MHz (default) 1 : 3.8 MHz 2 : 3.6 MHz 3 : 3.4 MHz All frequencies, timings and delays in this datasheet are based on 4MHz clk_int 1:0 pwm_div b00 RW This bit defines the divider ratio of the prescaler for the PWM generator 0 : Divide by 1 1 : Divide by 2 2 : Divide by 4 3 : Divide by 16

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 86: ResetControl Addr:36h ResetControl Bit Bit Name Default Access Bit Description 7:4 reset_reason b0000 RW_SM Flags to indicate to the software the reason for the last reset 0 : VPOR has been reached (battery or charger insertion from scratch) 1 : ResVoltFall was reached (battery voltage drop below 2.75V) 2 : Software forced by force_reset 3 : Software forced by power_off and ON was pulled high 4 : Software forced by power_off and charger was detected 5 : External triggered through the pin XRES 6 : Reset caused by overtemperature T140 7 : NA 8 : Reset caused by 4/8 seconds ON key press 9 : NA 10 : NA 11 : Reset caused by interrupt in standby mode 12 : Reset caused by ON pulled high in standby mode 3 onkey_lpress_ en b0 RW_SM 0 : ONKEY longpress feature disabled 1 : ONKEY longpress feature enabled 2o n _ i n p u t b 0 R _ P U S H Read:This flag represents the state of the ON pad directly Write: Setting to 1 resets the 4/8s. Onkey longpress timer 1 power_off b0 RW_SM Setting to 1 starts a reset cycle, but waits after the Reg_off state for a falling edge on the pin ON or until the charger is detected 0 force_reset b0 RW Setting to 1 starts a complete reset cycle

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 92: curr2_value Figure 93: RegStatus Figure 94: InterruptMask1 Addr:44h curr2_value Bit Bit Name Default Access Bit Description 7:0 curr2_current b00000000 RW Defines the current into CURR2 if gpio2_mode = 7 0 : Power down (default state) 1 : 0.15686mA (LSB) 255 : 40mA Addr:73h RegStatus Bit Bit Name Default Access Bit Description 6 curr2_lv b0 RO Bit is set when voltage of current sink CURR2 drops below low voltage threshold (1ms debounce time default) 5 curr1_lv b0 RO Bit is set when voltage of current sink CURR1 drops below low voltage threshold (1ms debounce time default) 0 sd1_lv b0 RO Bit is set when voltage of step down1 drops below low voltage threshold (-5%) (1ms debounce time default) Addr:74h InterruptMask1 Bit Bit Name Default Access Bit Description

7 LowBat_int_m b1 RW Rising edge only

6 ovtmp_int_m b1 RW Rising edge only 5 onkey_int_m b1 RW Rising and falling edge 4 chdet_int_m b1 RW Rising and falling edge 3 eoc_int_m b1 RW Rising and falling edge 2 resume_int_m b1 RW Rising and falling edge 1 nobat_int_m b1 RW Rising and falling edge 0 trickle_int_m b1 RW Rising and falling edge

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 95: InterruptMask2 Figure 96: InterruptStatus1 Addr:75h InterruptMask2 Bit Bit Name Default Access Bit Description 7 gpio5_int_m b1 RW Rising and falling edge 6 gpio4_int_m b1 RW Rising and falling edge 5 gpio3_int_m b1 RW Rising and falling edge 4 gpio2_int_m b1 RW Rising and falling edge 3 gpio1_int_m b1 RW Rising and falling edge 2 gpio_restart_int_m b1 RW Falling edge only 1 sd1_lv_int_m b1 RW Rising edge only 0 bat_temp_m b1 RW Rising and falling edge Addr:77h InterruptStatus1 Bit Bit Name Default Access Bit Description

7 LowBat_int_i b0 RO Bit is set when VSUP drops below ResVoltFall

6 ovtmp_int_i b0 RO Bit is set when 110deg is exceeded 5 onkey_int_i b0 RO 4 chdet_int_i b0 RO 3 eoc_int_i b0 RO 2 resume_int_i b0 RO 1 nobat_int_i b0 RO 0 trickle_int_i b0 RO

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 97: InterrupStatus2 Addr:78h InterrupStatus2 Bit Bit Name Default Access Bit Description 7 gpio5_int_i b0 RO 6 gpio4_int_i b0 RO 5 gpio3_int_i b0 RO 4 gpio2_int_i b0 RO 3 gpio1_int_i b0 RO 2g p i o _ r e s t a r t _ i n t _ i b 0 R O 1 sd1_lv_int_i b0 RO 0b a t _ t e m p _ i b 0 R O

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 98: ChargerControl Addr:80h ChargerControl Bit Bit Name Default Access Bit Description 7 cc_range_ select b0 RW Defines the charging current range for constant current mode 0 : High current range 1 : Low current range

6 AutoResume b0 RW

0 : Charging does not restart automatically in EOC when bit Resume is set. 1 : Charging will restart automatically in EOC when bit Resume is set and vbat is below resume level 5 bat_charging_ enable b0 RW 0 : USB is supplying VSUP , battery switch is open, ideal diode operation. USB charger regulates to vsup_voltage 1 : Normal battery charger operation from USB charger, battery switched is closed 4u s b _ c h g E n b 1 R W 0 : USB input is disconnected, battery switch is closed 1 : USB input is connected and supplying VSUP , battery switch is open, ideal diode operation. USB charger regulates vsup_voltage. 3:0 usb_Current b0000 RW Sets the USB input current limit. 0 : 94mA (default) 1 : 141mA 2 : 189mA 3 : 237mA 4 : 285mA 5 : 332mA 6 : 380mA 7 : 428mA 8 : 470mA 9 : 517mA 10 : 600mA 11 : 764mA 12 : 889mA 13 : 1065mA 14 : NA 15 : NA

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 99: ChargerVoltageControl Addr:81h ChargerVoltageControl Bit Bit Name Default Access Bit Description 7:6 Vsup_min b01 RW Regulate down battery charging current on that level of Vsup during trickle charging and constant current charging, to prevent voltage drop on vsup: 0 : 3.90V 1 : 4.20V (default) 2 : 4.50V 3 : 4.70V 4:0 ChVoltEOC b10011 RW Sets the end-of-charge voltage level VCHOFF. 0 : 3.82V 1 : 3.84V ... 19 : 4.20V (default) ... 31 : 4.44V

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 100: ChargerCurrentControl Addr:82h ChargerCurrentControl Bit Bit Name Default Access Bit Description 7:4 TrickleCurrent b0000 RW Sets the charging current limit in trickle current mode. 0 : 11mA (default) 1 : 23mA 2 : 35mA 3 : 47mA 4 : 59mA 5 : 70mA 6 : 82mA 7 : 94mA 8 : 106mA 9 : 118mA 10 : 130mA 11 : NA 12 : NA 13 : NA 14 : NA 15 : NA 3:0 Constant Current b0000 RW Sets the charging current limit in constant current mode. 0 : 44mA if cc_range_select=0, 11mA if cc_range_select=1 (default) 1 : 88mA if cc_range_select=0, 23mA if cc_range_select=1 2 : 133mA if cc_range_select=0, 35mA if cc_range_ select=1 3 : 178mA if cc_range_select=0, 47mA if cc_range_ select=1 4 : 223mA if cc_range_select=0, 59mA if cc_range_ select=1 5 : 268mA if cc_range_select=0, 70mA if cc_range_ select=1 6 : 313mA if cc_range_select=0, 82mA if cc_range_ select=1 7 : 358mA if cc_range_select=0, 94mA if cc_range_ select=1 8 : 403mA if cc_range_select=0, 106mA if cc_range_ select=1 9 : 448mA if cc_range_select=0, 118mA if cc_range_ select=1 10 : 494mA if cc_range_select=0, 130mA if cc_range_ select=1) 11 : NA 12 : NA 13 : NA 14 : NA 15 : NA

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 101: ChargerConfig1 Addr:83h ChargerConfig1 Bit Bit Name Default Access Bit Description

7 Charging_

1Hz_clk b0 RW Sets the mode for the charging output status (gpioX_iosf = 10) 0 : Normal operation: charging=1, not charging=0 1 : 1Hz blinking operation: charging=1Hz, not charging=0

6 ChVolt

Sets the resume voltage level VCHRES 0 : 3.33% of ChVoltEOC (140mV default) 1 : 5.56% of ChVoltEOC (233mV default) 5:4 temp_sel b00 RW Selects temperature regulation of charging current (die temp.) 0 : 120degC 1 : 130degC 2 : 110degC 3 : 90degC 3:1 vsup_voltage b100 RW Voltage regulation of VSUP of the input current limiter 0 : 4.4V 1 : 4.5V 2 : 4.6V 3 : 4.7V 4 : 4.8V (default) 5 : 4.9V 6 : 5.0V 7 : 5.5V

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 102: ChargerConfig2 Addr:84h ChargerConfig2 Bit Bit Name Default Access Bit Description 7:5 eoc_current b001 RW Sets eoc current 0 : 5% of ConstantCurrent 1 : 10% of ConstantCurrent (default) 2 : 15% of ConstantCurrent 3 : 20% of ConstantCurrent 4 : 25% of ConstantCurrent 5 : 30% of ConstantCurrent 6 : 40% of ConstantCurrent 7 : 50% of ConstantCurrent 4c h a r g i n g _ t m a x b 0 R _ P U S H Write: reset charger timeout counter 0 : Read: No timeout reached 1 : Charging timeout reached and charging stopped 3:0 ch_timeout b0111 RW Charging timeout timer 0 : OFF 1 : 0.5h 2 : 1h 3 : 1.5h 4 : 2h 5 : 2.5h 6 : 3h 7 : 3.5h(default) 8 : 4h 9 : 4.5h 10 : 5h 11 : 5.5h 12 : 6h 13 : 6.5h 14 : 7h 15 : 7.5h

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 103: ChargerSupervision Addr:85h ChargerSupervision Bit Bit Name Default Access Bit Description 7n t c _ h i g h _ o n b 1 R W Enables the battery high temperature supervision via NTC resistor (depends on ntc_mode) 0 : NTC battery 45/60deg temp supervision disabled 1 : NTC battery 45/60deg temp supervision enabled 6 ntc_low_on b0 RW Enables the battery low temperature supervision via NTC resistor 0 : NTC battery 0deg temp supervision disabled 1 : NTC battery 0deg temp supervision enabled 5 ntc_10k b0 RW Select NTC resistor 0 : 100k (ntc_current = 15μA) 1 : 10k (ntc_current = 150μA) 4 ntc_mode b0 RW Defines the temperature level for the battery high temperature supervision 0 : 45deg 1 : 60deg 3:2 NTC_input b00 RW Defines the NTC input 0 : no NTC input 1 : XIRQ_NTC pin 2 : GPIO3 pin 3 : GPIO4 pin 1:0 ntc_beta b00 RW Sets the ntc beta 0 : 3000 (0deg:1.41V & 45deg:0.59V/60deg:0.42V) 1 : 3500 (0deg:1.49V & 45deg:0.54V/60deg:0.37V) 2 : 4000 (0deg:1.56V & 45deg:0.50V/60deg:0.31V) 3 : 4500 (0deg:1.63V & 45deg:0.46V/60deg:0.27V)

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 104: ChargerStatus1 Figure 105: ChargerStatus2 Addr:86h ChargerStatus1 Bit Bit Name Default Access Bit Description 7N o B a t b 0 R Bit is set when battery detection circuit indicates that no battery is connected to the system. 6:5 temp_cond b00 R Indicates temperature condition 0 : Battery is in typical condition (0deg < battemp < 45/60deg) 1 : Battery is in cold condition (battemp < 0deg) 2 : Battery is in hot condition (battemp > 45/60deg) 3 : NA

4 EOC b0 R Bit is set if End of charge state has been reached

3 CVM b0 R Bit is set if charger is operating in constant voltage mode

2T r i c k l e b 0 R Bit is set, if charger is operating in trickle current. Vbat<2.9V

1 Resume b0 R Bit is set if Battery voltage is below resume level

0 CCM b0 R Bit is set if charger is operating in constant current mode

Addr:87h ChargerStatus2 Bit Bit Name Default Access Bit Description 3c h d e t _ o f f b 0 R W SW can turn OFF charger detection circuit for power-OFF state 0 : Charger detection is always enabled 1 : Charger detection is disabled in power-OFF state 2C h D e t b 0 R Bit is set when external charge adapter has been detected on pin USB 1:0 batsw_mode b00 R Bit indicates the status of the battery switch operation mode 0 : Battery switch is closed (charger disconnected or (charger connected and usb_chgEn =0)) 1 : Battery switch is open, ideal diode operation (charger connected but EOC reached) 2 : Battery switch is closed and acting as a voltage limited current source (charging)

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 111: Fuse7 Addr:a7h Fuse7 Bit Bit Name Default Access Bit Description 7a u t o _ o f f b 0 R W Defines startup behavior at first battery insertion 0 : Startup of chip if VBAT>ResVoltRise 1 : Enter power OFF mode (Startup with ON key or charger insertion) 6 chg_pwr_off_ en b0 RW Enable power OFF mode, if charger is detected 0 : Exit of Power OFF mode, if charger is detected (level) 1 : Exit of Power OFF mode, if charger insertion is detected (rising edge only) 5:4 res_timer b00 RW Set RESTime, after the last regulator has started 0 : RESTIME=10ms 1 : RESTIME=50ms 2 : RESTIME=100ms 3 : RESTIME=150ms 3s d 1 _ f s e l b 0 R W Selects between high and low frequency range 0 : 1 MHz if sd1_frequ=0, 3MHz if sd1_frequ=1 1 : 2 MHz if sd1_frequ=0, 4MHz if sd1_frequ=1 2 sd1_fast b0 RW Selects a faster regulation mode for SD1 suitable for larger load changes. 0 : Normal mode, Cext=10μF 1 : Fast mode, Cext=22μF required 1 power_off_at_ vsuplow b0 RW Switch into Power off mode if low VSUP is detected during active or standby mode (Pin ON = low and bit auto_off = 0) 0 : If low VSUP(ResVoltFall) is detected, enter VSUP Debounce state, continuously monitor VSUP voltage and startup if VSUP voltage is above ResVoltRise 1 : If low VSUP(ResVoltFall) is detected, enter power OFF mode 0 i2c_deva_bit1 b0 RW

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Register Description Figure 112: Fuse8 Addr:a8h Fuse8 Bit Bit Name Default Access Bit Description 7:4 usb_current b0000 RW Sets the USB input current limit. 0 : 94mA (default) 1 : 141mA 2 : 189mA 3 : 237mA 4 : 285mA 5 : 332mA 6 : 380mA 7 : 428mA 8 : 470mA 9 : 517mA 10 : 600mA 11 : 764mA 12 : 889mA 13 : 1065mA 14 : NA (1065mA) 15 : NA (1065mA) 3:1 ResVoltRise b000 RW This value determines the reset level ResVoltRise for rising VBAT. ResVoltFall is set to ResVoltRise-200mV by default 0 : 2.7V 1 : 2.9V 2 : 3.1V 3 : 3.2V 4 : 3.3V 5 : 3.4V 6 : 3.5V 7 : 3.6V 0 on_lpress_delay b0 RW Selects default state of the bit on_lpress_delay

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Register Description Figure 113: Fuse9 Addr:a9h Fuse9 Bit Bit Name Default Access Bit Description

7 Reg4_del b0 RW Define delay for timeslot4 (regulator 4)

6 Reg3_del b0 RW Define delay for timeslot3 (regulator 3)

5 Reg2_del b0 RW Define delay for timeslot2 (regulator 2)

4 Reg1_del b0 RW Define delay for timeslot1 (regulator 1)

3 SupResEn b0 RW Presets that bit

2 onkey_lpress_en b0 RW Select default state of the onkey_lpress_en 1:0 NTC_input b00 RW Defines the NTC input 0 : No NTC input 1 : XIRQ_NTC pin 2 : GPIO3 pin 3 : GPIO4 pin

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Application Information Figure 120: Application Schematic

Application Information

VSUP_CHGA1 VUSBA2 LDO2 A3 LDO1 A4 GNDA5 VBATB1 FB_SD1 B2 XIRQ_NTCB3 GPIO3_NTC B4 GPIO2_CURR2 B5 VSS_SD1 C1 GPIO4_NTC C2 GPIO5 C3 SDAC4 GPIO1_CURR1 C5 LX_SD1 D1 VSUP_SD1 D2 OND3 XRESD4 SCLD5 AS3701 μPMIC Power PathChargerLogic & Control LDOsDCDCSinksGPIOs SDA SCL VUSB VSUP VBAT 2.2μF 2.2μF 2.2μF 10μF GND GND GND GND GND 1μH VSUP GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 10M XRES XIRQ_NTC VSUP VSUP ON GND FB LX LDO1 LDO2 SD1 XIRQ_NTC SDA SCL ON XRES 10μF10μF GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 1M0 GNDGNDGND 10μF

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Application Information Figure 121: Layout Guidelines for AS3701A A2 A3 B2B1 D4D1 C4C2 ON XRES SCL GND GPIO2_CURR2 GPIO1_CURR1 FB GPIO4 C3 C4 B3 B4 GPIO5 SDA XIRQ_NTC GPIO3 VSS_SD1 VSUP SD1 SD1 VBAT VSUP VUSB GND GND GND GND GND GND GND FB_SD1 CVUSB COUT LDO2 COUT LDO2 LDO2 LDO1 SVSSS SDSD FB SD COUT SD1 (0805) SD CIN SD1 (0402) CVSUP CVBAT (0805) (0805) (0805) (0402) (0402)

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Application Information Figure 122: Layout Guidelines for AS3701B A2 A3 B2B1 D3 D4D1 ON XRES SCL GND GPIO2_CURR2 GPIO1_CURR1 FB XIRQ_NTC SDA VSS_SD1 VSUP SD1 SD1 VBAT VSUP VUSB GND GND GND GND GND GND GND FB_SD1 CVUSB COUT LDO2 COUT LDO2 LDO2 LDO1 SVSSS SDSD FB SD COUT SD1 (0805) SD CIN SD1 (0402) CVSUP CVBAT (0805) (0805) (0805) (0402) (0402)

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Package Drawings & Markings Figure 123: CSP-17 0.4mm Pitch Package Drawing Note(s): 1. Pin 1 = A1 2. ccc Coplanarity 3. All dimensions are in μm Package Drawings & Markings Green RoHS

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Package Drawings & Markings Figure 124: CSP-20 0.4mm Pitch Package Drawing Note(s): 1. Pin 1 = A1 2. ccc Coplanarity 3. All dimensions are in μm Green RoHS

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Package Drawings & Markings Figure 128: Start-Up Revision Code Start-Up Revision Code: Shows the coding of the different startup sequences Note(s): 1V1-zz Sequence 1V1-ES Engineering samples, no sequence programmed or sequence programmed on request 1V1-00 Standard programming (no sequence programmed) 1V1-?? Other customer specified sequence programmed during production test (1)

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Ordering & Contact Information Figure 129:

Ordering Information

Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbader Strasse 30

8141 Premstaetten

Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Ordering Code Package Marking OTP Programming Delivery Form Delivery Quantity AS3701A-BWLW-ES 17-Ball WL-CSP 3701A 1V2-ES Sequence programmable on request Waffle Pack Max. 50 pcs AS3701A-BWLM-?? 17-Ball WL-CSP 3701A 1V2-?? Customer specified sequence T & R (mini reel) 500 pcs/reel AS3701A-BWLT-?? 17-Ball WL-CSP 3701A 1V2-?? Customer specified sequence T & R 12000 pcs/reel AS3701B-BWLW-ES 20-Ball WL-CSP 3701B 1V2-ES Sequence programmable on request Waffle Pack Max. 50 pcs AS3701B-BWLM-00 20-Ball WL-CSP 3701B 1V2-00 Default sequence T & R (mini reel) 500 pcs/reel AS3701B-BWLT-00 20-Ball WL-CSP 3701B 1V2-00 Default sequence T & R 12000 pcs/reel AS3701B-BWLM-?? 20-Ball WL-CSP 3701B 1V2-?? Customer specified sequence T & R (mini reel) 500 pcs/reel AS3701B-BWLT-?? 20-Ball WL-CSP 3701B 1V2-?? Customer specified sequence T & R 12000 pcs/reel Ordering & Contact Information

Document Feedback [v1-11] 2016-Dec-14 AS3701 − RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specif ied lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are unde rway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Copyrights & Disclaimer Copyright ams AG, Tobelbader St rasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used with out the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appe aring in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams AG reserves the right to ch ange specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any th ird party shall arise or flow out of ams AG rendering of technical or other services. Copyrights & Disclaimer

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Revision Information Note(s): 1. Page and figure numbers for the previous version may diff er from page and figure numbers in the current revision. 2. Correction of typographical er rors is not explicitly mentioned. Changes from 1-08 (2016-Aug-17) to current revision 1-11 (2016-Dec-14) Page 1-08 (2016-Aug-17) to 1-09 (2016-Dec-05) Updated Figure 23 19 Added Figure 38 32 Added Figure 47 39 Added Figure 51 43 Updated Figure 120 96 Updated Figure 121 97 Updated Figure 122 98 Updated Figure 126 103 1-09 (2016-Dec-05) to 1-10 (2016-Dec-08) Updated Figure 24 20 1-10 (2016-Dec-08) to 1-11 (2016-Dec-14) Updated Figure 129 103 Revision Information

Document Feedback [v1-11] 2016-Dec-14 AS3701 − Content Guide

1 General Description

1 Key Benefits & Features

2 Applications

3 Block Diagram

5 Pin Assignments

7A b s o l u t e M a x i m u m R a t i n g s

9 Electrical Characteristics

10 Detailed Description –

Power Management Functions

10 Step Down Converter

11 Mode Settings

15 Parameters

19 Universal IO LDO Regulator

19 Parameters

23 Linear Charger

25 Charging Cycle Description

27 Stop Charging Conditions

27 Battery Presence Indication

27 NTC Supervision

31 Parameters

32 Selection of Bypass Capacito rs for the Pins VUSB, VSUP_

32 Current Sinks

33 Parameters

34 Detailed Description –

34 Start-Up

34 Normal Start-Up

34 Parameter

38 Reset

39 RESET Reasons

40 Parameter

41 Stand-By

41 Enter Via GPIO

42 Enter Via SW

42 Leaving Stand-By

42 Power OFF

44 Internal References

44 Description

44 Parameter

45 GPIO Pins

46 IO Functions

51 Supervisor

51 Temperature Supervision

52 Interrupt Generation

52 Wire-Serial Control Interface

52 Feature List

53 I²C Protocol

56 I²C Parameter

[v1-11] 2016-Dec-14 Document Feedback AS3701 − Content Guide

57 Register Description

61 Detailed Register Description

104 RoHS Compliant & ams Green Statement

105 Copyrights & Disclaimer

106 Document Status