ARTIK530

ARTIK530 SAMSUNG | Alldatasheet

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ARTIK 530/530s Module Datasheet

Figure 1. ARTIK™ 530/530s Module Top View

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet TABLE OF CONTENTS

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet Version History Revision Date Description V1.0 January 20, 2017 First release. V1.01 February 07, 2017 Updated Module PAD’s section. Updated look and feel. V1.02 April 12, 2017 Updated default behavior of GPIO pins to latest software release. Updated SD/MMC AC Electrical Characteristics section. Updated Recommended Operating Conditions section. Updated ESD section. Updated Power management section. V1.03 November 20, 2017 In Table 1, definition of PU/PD and I/O columns for ballout and signal-description tables more explicitly defined. Characteristics for LDO3 (VCC3P3_SYS) removed, as using the output to drive external ICs is highly discouraged. Descriptions of other LDOs was removed, as they are not available externally. In Functional Interfaces , each subsection describing an interface that has alternate functions clarifies which are selected by hardware at power-on reset. Cross references added to the appropriate tables in GPIO Alternate Functions. Changed format of default functions in tables of GPIO Alternate Functions to make it easier to see which function number is the default. Booting Selection section rewritten for clarity. Power Sequence section divided into Power Sequence and Power States. Simplified power management state diagram, Figure 5. Section, Power/Current Consumption, added.. V1.04 November 30,2017 Added ARTIK 530s and ARTIK 530s 1G features in Module Overview, Block Diagram and Module Features, and Security Subsystem.

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet ARTIK 530/530s Module Features The following subsections describe the functions of the various ARTIK 530/530s Module blocks depicted in Figure GPIO The ARTIK 530/530s Module provides a GPIO system with up to 107 GPIOs multiplexed with other I/O interface lines, as shown in Figure 2 to support a wide variety of use-cases. The key features of the GPIO system are as follows:

• Programmable pull-up control
• Both edge detect and le vel detect functionality
• Support for programmable pull-up resistors
• Support for fast or normal slew operation
• Drive strength can be set from a register:
• Support for interrupt generation that can be triggered on one of the following: – Rising edge – Falling edge – High level detection –L o w l e v e l d e t e c t i o n
• The I/O data is clocked up to 50MHz I2S The ARTIK 530/530s Module provides two 5-line Inter-IC Sound (I2S) channels. I2S is one of the most popular digital audio interfaces. The I 2S bus handles audio data and other signals, such as subcoding and control. It is possible to transmit data between two I2S buses. The key features of the I2S sub-system are
• One-port stereo (1 channel) I 2S-bus for audio with DMA based operation
• Serial data transfer of 16/24-bit per channel in Master and Slave mode
• A v a r i e t y o f i n t e r f a c e m o d e s : –I 2S, Left justified, Right justified, DSP mode Value Drive Strength * *. Assumes the reference I/O voltage is 3.3V. All drive-strength values are approximate. 0 2.6mA approximately (default) 1 5.2mA approximately 2 10.4mA approximately 3 15.6mA approximately

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet PWM The ARTIK 530/530s Module provides two pulse width modulation (PWM) instances with the following key features:

• Two individual PWM channels with independent duty control and polarity
• Two 32-bit PWM timers, one per channel
• Support for static as well as dynamic setup
• Support for auto-reload and one shot pulse mode
• Dead zone generator
• Level interrupt generation SPI The ARTIK 530/530s Module provides two Serial Peripheral Interface (SPI) ports that transfer serial data. SPI support includes 8-bit/16-bit shift registers to transmit and receive data. During an SPI transfer, data is simultaneously transmitted (shifted out serial ly) and received (shifted in serially). The SPI implementation adheres to the protocols described by Texas Instruments Synchronous Serial Interface, National Semi conductor’s Microwire, and Motorola’s Serial Peripheral Interface. The key features of the SPI sub-system are
• Support for full-duplex
• 8-bit/16-bit shift register for Tx and Rx
• Compliant with the SPI protocol described by Texas Instruments, National Semiconductor and Motorola
• Support for independent 16-bit wide tr ansmit and receive FIFOs 8 locations deep
• Support for master mode and slave mode
• Support for receive-without-transmit operation
• Max operating frequency : – Master Mode : Supports Tx up to 50MHz, Rx up to 20MHz – Slave Mode : Supports Tx up to 8MHz, Rx up to 8MHz UART The ARTIK 530/530s Module provides three 2-pin universa l asynchronous receiver transmitters (UARTs). The key features of the UART sub-system are
• Separate 64×8 Tx and 64×8 Rx FIFO memory buffers
• Support for DMA-mode and interrupt-based mode of operation
• All independent channe ls support IrDA 1.0
• Each UART channel contains: – Programmable baud-rates – 1 or 2 stop bit insertion – 5-bit, 6-bit, 7-bit, or 8-bit data width –P a r i t y c h e c k i n g

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet I2C The ARTIK 530/530s Module provides three generic I2C blocks supporting both 100kb/s and 400kb/s speed modes. The key features of the I2C sub-system are

• Support for multi-master and slave mode
• 7-bit addressing mode only
• Serial, 8-bit oriented and bi-directional data transfer
• Up to 100 kb/s in the standard mode
• Up to 400 kb/s in the fast mode
• Master transmit, master receive, slav e transmit, and slave receive operation
• Support for both interrupt and polling events ADC The ADC interface controls one 28nm low-power CMOS 1.8V 12-bit ADC. The key features of the ADC sub-system are
• Up to six channels of an alog input can be selected
• Conversion of analog input into 12-bit binary code up to 1 Mega Sample Per Second (MSPS)
• 1.0mW power consumption when running 1MSPS
• Input frequency up to 100kHz Power Management The ARTIK 530/530s Module power re quirements are managed using a power management integrated circuit (PMIC). This PMIC device has four fully-integrated fixed-frequency current-mode synchronous PWM step-down converters that can achieve peak efficiencies of up to 97%.The regulators operate at a fixed high frequency, minimizing noise in sensitive applications and allowing the use of small form factor components. These four regulators fully satisfy the power and control requirements of the ARTIK 530/530s Module. Dynamic Voltage Scaling (DVS) of the various core voltages is supported using I 2C control. Wi-Fi® The ARTIK 530/530s Module has a fully integrated WLAN block covering IEEE 802.11 a/b/g/n. The most important hardware features of the module are
• 802.11 a/b/g/n dual-band SISO that is 2.4GHz/5GHz-compliant
• 1 T 1 R 2 . 4 G H z / 5 G H z b a n d
• Support for 20MHzand 40MHz bandwidth (72.2/150Mbps PHY rate)
• Enhanced 802.11/Bluetooth coexistence control to improve transmission quality in different profiles
• Use of an SDIO interface

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet Bluetooth® The ARTIK 530/530s Module has a fully integrated 4.2 block (BLE+Classic). The most important hardware features of the module are

• Bluetooth 4.2 (BLE+Classic)
• Enhanced 802.11/Bluetooth Coexistence control to improve transmission quality in different profiles 802.15.4 for Zigbee The ARTIK 530/530s Module carries fully-integrated 802.15 .4 functionality. The most important hardware features are
• Fully integrated 2.4 GHz, IEEE 802.15.4-compliant transceiver
• Complete system-on-chip using 32-bit ARM® Cortex®-M4 processor
• F l a s h a n d R A M m e m o r y and peripherals.
• Extremely low power consumption.
• Excellent RF performance. USB OTG The ARTIK 530/530s Module provides one USB2.0 OTG interface supporting both device and host functionality. The key features of the USB2.0 OTG sub-system are
• Compliant with the USB 2.0 on-the-go specification revision 1.3a and 2.0
• High-speed (480Mbps) mode
• Full-speed (12Mbps) mode
• Low-speed (1.5Mbps) mode (host only)
• Support for session request protocol (SRP) and host negotiation protocol (HNP)
• One control endpoint 0 for control transfer
• Up to 15 device-programmable endpoints: – Programmable endpoint type: Bulk, Isochronous, Interrupt – Programmable In/Out direction
• 1 6 h o s t c h a n n e l s USB HOST The ARTIK 530/530s Module provides one USB2.0 cont roller that is fully compliant with the USB 2.0 Host specifications, and the enhanced host controller Interface (EHCI) specification. The key features of the USB2.0 OTG sub-system are
• Detecting the attachment and removal of USB devices
• Collecting status and activity statistics
• Controlling power supply to attached USB devices

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet

• In compliance with the UT MI+ Level 3 revision 1.0
• Controlling the association to either the open host controller interface (OHCI) or the EHCI via a port router
• Root Hub functionality to support upstream/downstream port HSIC The ARTIK 530/530s Module provides one high-speed inter- chip (HSIC) version 1.0 module. The key features of the HSIC sub-system are
• Support for ping and split transactions
• Up to 30MHz operation for a 16-bit interface
• U p t o 6 0 M H z o p e r a t i o n for a 8-bit interface
• Support for HSIC version 1.0 MIPI CSI The ARTIK 530/530s Module provides one 4-lane mobile industry processor interface (MIPI) interface that complies with the MIPI camera serial interface (CSI) standard specification V1.01r06 and D-PHY standard specification v1.0. The key features of the MIPI CSI sub-system are
• 1, 2, 3 or 4 data lanes
• Support for the following image formats: – YUV420, YUV420 (Legacy), YUV420 (CSPS), 8-bit YUV422, 10-bit YUV422 – User-defined byte-based data packet – Compatible to PPI (Protocol to PHY interface) MIPI DSI The ARTIK 530/530s Module provides one 4-lane MIPI interface that complies with the MIPI DSI standard specification V1.01r11. The key features of the MIPI DSI sub-system are
• Maximum resolution ranges up to WUXGA 1920 × 1200
• Supports 1, 2, 3 or 4 data lanes
• Supports pixel format: – 16bpp, 18bpp packed, 18bpp loosely packed (3 byte), 24bpp
• Supported interfaces are – Protocol-to-PHY Interface (PPI) up to 1.5Gbps, in MIPI D-PHY – RGB Interface for video image input from display controller – PMS control interface for PLL to configure byte clock frequency – Prescaler to generate esca pe clock from byte clock

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet HDMI The ARTIK 530/530s Module provides one HDMI v1.4a interface. The key features of the HDMI sub-system are

• S u p p o r t f o r v 1 . 4 a s p e c
• Up to 1080p video resolution
• H D M I L i n k + H D M I P H Y
• Support for the following video formats: –4 8 0 p @ 5 9 . 9 4 / 6 0 H z –5 7 6 p @ 5 0 H z –7 2 0 p @ 5 0 / 5 9 . 9 4 / 6 0 H z – 1080p@50/59.94/60Hz (No support for interlaced format)
• Support for 4:4:4 RGB
• Support for up to 8-bits per color LVDS The ARTIK 530/530s Module provides five low voltage differ ential signaling (LVDS) output channels with one clock channel. The key features of the LVDS channel system are
• Output clock range 30–125MHz
• Support for 630 Mbps per channel
• Up to 393.75MB/s data transport
• Support for power down mode Gigabit EMAC The ARTIK 530/530s Module provides one Gigabit EMAC interface. The most important features of the Ethernet MAC module are
• Standard compliance – IEEE 802.3az-2010: energy efficient Ethernet (EEE) – RGMII v2.6
• MAC supports the following features: – 10/100/1000 Mbps data transfer rates with an RGMII interface to communicate with external Gigabit PHY – Full duplex operation – Half duplex operation – Flexible address filtering – Additional frame filtering

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet SD/MMC The ARTIK 530/530s Module provides one SD/MMC interface. The Mobile Storage Host is an interface between the system and the SD/MMC. The key features of mobile storage host sub-system are as follows: SD

• Support for Secure Digital I/O (SDIO – version 3.0)
• Support for Secure Digital Memory (SDMEM – version 3.0)
• Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
• Support 4-bit SDR mode up to 50MHz
• Support for PIO and DMA mode data transfer
• Support for 4- bit data bus width MMC
• Support for Multimedia Cards (MMC – version 4.41)
• Support for Embedded Multimedia Cards (eMMC – version 4.5)
• Support for 4-bit SDR mode up to 50MHz
• Support for PIO and DMA mode data transfer
• Support for 4- bit data bus width Memory Controller The ARTIK 530/530s Module has one DDR3 memory interface. The key features are
• One 32-bit DDR3 memory interface
• Two 256MB or two 512MB DDR3 16-bit memo ry chips, for a total of 512MB or 1GB
• Up to 800MHz DDR3 speed with a maximum throughput of 6.4GB/s JTAG The JTAG core provides debug capabilities for the developer and is compliant with the IEEE 1149 standard.

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet Security Subsystem In addition to the Secure Element, the main processor on the module provides additional security features. The key features of the Security Controller sub-system are

• Secure 128-bit die ID (available to the ARTIK 530s Modules only)
• Secure JTAG featuring a secure 128-bit JTAG ID (available to the ARTIK 530s Modules only)
• Secure boot featuring a 128-bit boot ID (a vailable to the ARTIK 530s Modules only)
• Security Controller (available to the ARTIK 530s Modules only)
• Secure Element (all features in ARTIK 530s Modules; limited features in ARTIK 530 Module) Security Controller The Security Controller provides AR M TrustZone Trusted Execution Environment (TEE) and hardware cryptographic accelerators as follows:
• T E E – Register Protection Controller – Memory Protection Controller
• Hardware cryptographic accelerators –D E S , T r i p l e D E S –A E S –S H A - 1 –M D 5 Secure Element The ARTIK 530/530s Module has a dedicated Secure Element to assure end-to -end authenti cation and communication between nodes in an IoT setting. The most important hardware features of the Secure Element are
• An ISO/IEC 7816 14443-compliant interface.
• Dedicated 16-bit SecuCalm CPU core
• Crypto co-processor – Modular exponential accelerator –R S A 2 0 8 0 b i t s – ECC 512 bits
• Data security – Memory encryption for all memory – 256B read-only and 256B nonerasable flash area – Selective reset operation if abnormal voltages/frequencies are detected
• Embedded tamper-free memory –3 2 K B R O M –2 6 4 K B F L A S H – 2.5KB cryptographic memory

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet

• Serial interfaces: – ISO 7816-3-compliant interface – Asynchronous half-duplex character receive/transmit serial interface Quad-Core Processor System The processor system architecture that resides on the ARTIK 530/530s Module is a system-on-a-chip (SoC) based on a 32-bit RISC architecture. Designed using the 28nm low power process, the processor system architecture provides superior performance using a quad-core CPU. The key features of the ARTIK 530/530s Module are
• Quad-core ARM® Cortex®-A9, 32-bit RISC architecture
• M a x i m u m c o r e s p e e d 1 . 2 G H z
• 32KB I-Cache per core
• 32KB D-Cache per core
• 1024KB L2-Cache shared between the four cores
• Support for dynamic virtual-address mapping Timer The ARTIK 530/530s Module has four dedicated timer channels. The most important features of the Timer module are
• Timer or watchdog timer modes
• Four dedicated Timer channe ls with watchdog timer
• Normal interval timer mode with interrupt request
• Reset on timer countdown
• Level-triggered interrupt mechanism Interrupt Controller The ARTIK 530/530s Module has one interrupt controller module. The most important features of the interrupt module are
• Vectored interrupt controller
• Support for 64 channel-interrupt sources

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet

• For each interrupt source the following properties are available: – Fixed hardware interrupt priority level – Programmable interrupt priority level – Hardware interrupt priority level masking – IRQ and FIQ generation – Software interrupt generation – Test registers – Raw interrupt status – Interrupt request status DMA The ARTIK 530/530s Module has one scatter-gather DMA module. The most important features of the DMA module are
• 16 channels of dedicated DMA
• 1 6 D M A r e q u e s t l i n e s
• Various operating modes – Single DMA mode –B u r s t D M A m o d e – Memory-to-memory transfer – Memory-to-peripheral transfer – Peripheral-to-memory transfer – Peripheral-to-peripheral transfer
• Support for 8/16/32 bit wide transactions
• Big endian and little endian (default) support RTC The ARTIK 530/530s Module has one real time clock (RTC) module. The most important features are
• Four spread-spectrum PLLs
• Two external crystals: one 24MHz crystal for the PLLs and one 32.768KHz crystal for the RTC
• One 32-bit RTC counter
• Support for alarm interrupt using RTC

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet Video Input Processor The ARTIK 530/530s Module provides one video input processor (VIP). The key features of the VIP sub-system are

• Support for external 8-bit and 16-bit MIPI
• Support for internal MIPI-CSI
• S u p p o r t f o r i m a g e s u p t o 8 1 9 2 × 8 1 9 2
• Support for clipping and scale-down
• Support for YUV420 memory format Scaler The ARTIK 530/530s Module provides one universal scaler. The key features of the scaler are
• Support for different input formats: – YUV420, YUV422, YUV444
• Flexible size, from 8×8 up to 19 20×1080 with a granularity of 8
• Upscale ratio from 8×8 to 1920×1080
• Downscale ratio from 1920×1080 to 8×8
• Low pass filter available after upscale or before downscale
• Horizontal 5-tab filter with 64 sets of coefficients
• Vertical 3-tab filter with 32 sets of coefficients Multiformat Codec The ARTIK 530/530s Module provides one integrated Multiformat Codec (MFC) module. The key features of the MFC sub-system are
• D e c o d e r : – H.264 : BP, MP, HP Level 4.2 up to 1920×1080, up to 50MBps – MPEG4 : Advanced Simple Profile (AS P) up to 1920×1080, at up to 40Mbps – H.263 : Profile 3 up to 1920×1080, up to 20Mbps – MPEG 1,2 : Main Profile, High Level up to 1920×1080, up to 80MBps
• E n c o d e r : – H.264 : Baseline profile, Level 4.0 up to 1080p, up to 20Mbps – MPEG4 : Simple profile, Level 5.6 up to 1080p, up to 20Mbps – H.263 : Profile 3, Level 70 up to 1080p, up to 20Mbps

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet Graphics Pipeline The ARTIK 530/530s Module provides one 2D and 3D graphics pipeline module. The key features of the graphics pipeline are

• Two pixel processors: – Tile oriented processing – Alpha blending – Texture support, non-power-of-2 –C u b e m a p p i n g – Fast dynamic branching – Trigonometric acceleration – Full floating-point arithmetic – Line, quad, triangle and point sprites – Perspective correct texturing – Point sampling, bilinear and trilinear filtering – 8-bit stencil buffering – 4-level hierarchical Z and stencil operation
• Geometry processor: – Programmable vertex shader – Flexible input and output formats – Autonomous operation tile list generation – Indexed and non-indexed geometry input – Primitive constructions with po ints, lines, triangles and quads
• S u p p o r t f o r O p e n G L E S 1 . 0 a n d 2 . 0 PCM The ARTIK 530/530s Module provides one PCM channel. The PCM interface provides a bi-directional serial interface that can be connected to an external audio codec. The key features of the PCM subsystem are
• Supports both Master and Slav e mode external audio codecs
• Supports both short and long frame synchronization
• Supports a variety of data formats wi th a default format of 13-bit 2’s complement, left justified, clock MSB first

how the balls are oriented and how signal coordinates are assigned to the PADs of the ARTIK 530/530s Module. provide detailed characteristics for each ball signal name. Figure 3. ARTIK 530/530s Module Top View Ball Organization

The meaning of the various columns used in Table 2 - Table 6 is explained in Table 1. Table 1. Ball Table Column Definition Ball Loc. Ball location on the ARTIK 530/530s Module as shown in Figure 3. Ball Name The ball name on the ARTIK 530/530s Module. Voltage Voltage level on the ball. Default Default function of the main SoC at hardware power-on. Type S: Signal ball, P: Power ball, G: GND ball. PU/PD Indicates the presence of module-i nternal pull-up or pull-down. PU: Pull-Up, PD: Pull-Down, N: No Pull-Up/Pull-Down. User Guide. Usually the function of the pin can be reprogrammed. Function Explanation on the function of the ball. Table 2. North Ball Array

Table 2. North Ball Array (Continued)

Table 3. South Ball Array

Table 3. South Ball Array (Continued)

Table 4. East Ball Array

Table 4. East Ball Array (Continued)

*. External 100k Ω pull-up resistor required. Table 5. West Ball Array

Table 6. Center Ball Array Table 5. West Ball Array (Continued)

Table 6. Center Ball Array (Continued)

choose to reprogram some of the GPIOs that are currently assigned to the predefined functional interfaces. The above signals can be reassigned by software to alternate functions; see Table 30 for details. Table 7. ADC Table 8. Booting available. For details, see Booting Selection. Table 9. Bluetooth PCM

Table 10. MIPI CSI Table 11. MIPI DSI Table 12. GMAC

The above signals can be reassigned by software to alternate functions; see Table 29 for details. Table 13. GPIO Table 12. GMAC (Continued)

The above signals can be reassigned by software to alternate functions; see Table 29–Table 32 for details. pull-downs are disabled. For details about reconfiguring the GPIO lines, refer to the ARTIK 530/710 System Design Guide. Table 14. HDMI Table 13. GPIO (Continued)

Table 15. HSIC Table 16. I2C *. Not selected by default by hardware at power-on . The signal can be reassigned by software. See Table 30 for details. Table 17. I2S

The above signals can be reassigned by software to alternate functions; see Table 31 for details. Table 18. JTAG *. External 100k Ω pull-up resistor required. Table 20. LVDS

The above signals can be reassigned by software to alternate functions; see Table 30 for details. Table 21. Miscellaneous Table 22. Power turn off when the ARTIK 530/530s Module goes into sleep mode. Table 23. PWM

The above signals can be reassigned by software to alternate functions; see Table 30 for details. Table 24. SD/MMC Table 25. SPI

The above signals can be reassigned by software to alternate functions; see Table 30 for details. Table 26. UART Table 27. USB Host/USB OTG Table 28. 802.15.4

the GPIOs that are available on the PADs of the ARTIK 530/530s Module that can be user programmed. subsequently select an alternate function. Table 29. GPIO Alternate Functions—North Part

Table 30. GPIO Alternate Functions—South Part

Table 30. GPIO Alternate Functions—South Part (Continued)

Table 31. GPIO Alternate Functions—East Part Table 32. GPIO Alternate Functions—West Part

booting device fails, the tertiary booting device will boot the module. Table 33. Boot Selection Configuration resistors are required to select configuration options 2 and 3. The recommended resistor value is 10kΩ.

1 High Low High eMMC SD0 USB OTG Device

2 High Low Low SD0 USB OTG Device –

supports the combination of Wi-Fi/Bluetooth, and the other is dedicated to Zigbee. Figure 6. RF Connector for Bluetooth/Wi-Fi and Zigbee more details on the connector, contact Hirose Electric Co., LTD.

device. Exposure to the absolute-maximum rated conditions for long duration affects the reliability of the device. Table 34. Absolute Maximum Ratings

The recommended operation of the ARTIK 530/530s Module is based on the operating conditions listed in Table 35. Table 35. Recommended Operating Conditions Table 36. ARTIK 530/530s Module Power/Current Consumption

1 Boot AP boot

700 Peak Peek current during boot-up

450 Typ Average current during boot-up

2 Idle Idle 140 Typ Idle current

3 Sleep Sleep 20 Typ Sleep current

5 SD Card to eMMC 270 Typ Copying 512MB test file from SD to eMMC

11 Receive 150 Typ Receive packet using ember tool

13 Recode audio 140 Typ Record audio using arecord (pcm, 2ch, 48000Hz)

14 Display picture 180 Typ Display picture (R/G/B, 720*1280)

15 Display video 330 Typ Playback movi e clip (big_buck_bunny_720p_50mb)

16 Record video 300 Typ Record video using ffmpeg (1280*720, 3072k)

17 Live streaming from Camera 310 Typ Camera preview using ffmpeg (1280x960)

18 Live streaming over Wi-Fi 320 Typ Streaming video using ffserver/ffmpeg (640*480)

19 CPU Load

Table 37. ESD Ratings Table 38. Shock and Vibration Ratings

from Table 39 to determine maximum DC loading and to determine maximum transition times for a given load. Table 39. I/O DC Electrical Characteristics GPIO Table 40. I/O DC Electrical Characteristics 802.15.4

Table 41. I/O DC Electrical Characteristics PMIC Table 42. I/O DC Electrical Characteristics PCM Signals Table 40. I/O DC Electrical Characteristics 802.15.4 (Continued)

Table 43. GPIO Pull-up Resistor Current Table 44. Power-on Reset Timing Specifications

AC characteristics covered in this section are preliminary and are likely to change. Figure 7. High-Speed SD/MMC Interface Timing Table 45. High-Speed SD/MMC Interface Transmit/Receive Timing Constants

Figure 8. SPI Interface Timing (CPHA = 0, CPOL = 1 (Format A))

The following table assumes VDDINT = 1.0 V ± 5%, TJ = –25 to 85 °C, VDDext = 1.8 V ± 10%, load = 15pF. Table 46. SPI Interface Transmit/ Receive Timing Constants with 15pF Load

• t SPIMIS,CH0 = 12 – (cycle period/4) × FB_CLK_SEL
• t SPIMIS,CH1 = 13 – (cycle period/4) × FB_CLK_SEL

The following table assumes VDDINT = 1.0V ± 5%, TJ = –25 to 85°C, VDDext = 3.3V ± 10%, load = 30pF. Table 47. SPI Interface Transmit/Receive Timing Constants with 30pF Load

• t SPIMIS,CH0 = 12 – (cycle period/4) × FB_CLK_SEL
• t SPIMIS,CH1 = 13 – (cycle period/4) × FB_CLK_SEL

Figure 9. I2C Interface Timing Table 48. I2C BUS Controller Module Signal Timing Modes: std. refers to Standard Mode and fast refers to Fast Mode.

• I 2C data hold time (tSDAH) is minimum 0ns for standard/fast bus mode as defined in I2C specification v2.1. Check whether the data hold time of your I2C device is 0ns or not.
• T h e I 2C controller supports I2C bus device only (standard/fast bus mode), and does not support a C-bus device. IICSCL TSTOPH IICSDA TBUF TSTARTS TSDAS TSCLHIGH TSCLLOW FSCL TSDAH AP_GPD2_SCLn AP_GPD2_SDAn

preliminary and likely to change once module characterization has taken place. Table 49. Wi-Fi, 2.4GHz Receiver RF Specifications

Table 50. Wi-Fi, 2.4GHz Transmitter RF Specifications

Table 51. Wi-Fi, 5GHZ Receiver RF Specifications

Table 52. Wi-Fi, 5GHz Transmitter RF Specifications

Table 53. Bluetooth Receiver RF Specifications Table 54. Bluetooth Transmitter RF Specifications Table 55. Bluetooth Low Energy (BLE) RF Specifications

802.15.4 Receiver RF Specifications

room temperature 25°C. The Min and Max numbers were measured over process corners at room temperature. Table 56. 802.15.4 Receiver RF Specifications Table 57. 802.15.4 Transmitter RF Specifications *. The ARTIK 305s Module default setting is 6dBm for CE . You can change the setting to 16dBm for FCC testing.

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet CERTIFICATIONS AND COMPLIANCE Bluetooth The ARTIK 530/530s Module is recognized as a qualified design as set out by the Bluetooth SIG. Declaration ID: D032725 Qualified Design ID: 88390 CE The ARTIK 530/530s Module is in compliance with the essential requirements and other relevant provisions of Article 3 of the Radio Equipment Directive 2014/53/EU. Compliance with the following standards was confirmed:

• Article 3.1a (Health and Safety) EN 60950-1:2006 + A11:2009 + A1:2010 + A12:2001 + A2:2013 EN62311:2008
• Article 3.1.b (EMC) EN 301 489-1 V2.1.1 EN 301 489-17 V3.1.1
• Article 3.2 (Radio spectrum use) EN 300 328 V2.1.1 EN 301 893 V1.8.1 and EN 301 893 V2.1.1 (partial) EN 300 440 V2.1.1
• C e r t i f i c a t e n u m b e r : A N 1 7 C 1 0 9 8 3 - 2 For a formal notified body statement of opinion contact your sales representative. FCC The ARTIK 530/530s Module complies with the following two sections (15C and 15E) of Part 15 of the FCC rules namely:
• Spread spectrum transmitte r (SST) compliance (15C): – 2402–2480MHz frequency range, output power 0.0049W
• Digital transmissi on system (DTS) compliance (15C): – 2402–2480MHz frequency range, output power 0.004W – 2405–2475MHz frequency range, output power 0.0412W – 2412–2462MHz frequency range, output power 0.0308W
• Unlicensed national information infras tructure TX compliance (15E) in the: – 5180-5240MHz frequency range, output power 0.0206W – 5260-5320MHz frequency range, output power 0.0221W – 5500-5720MHz frequency range, output power 0.0222W – 5745-5825MHz frequency range, output power 0.01W FCC Identifier: A3LSIP005AFS30 Modular Type: Limited Single Modular

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet IC The ARTIK 530/530s Module complies with the IC license–exempt RSS standard. Radio certification number: 649E-SIP005AFS30 KCC The ARTIK 530/530s Module complies with the standards set by the Korean communications commission (KCC). ARTIK 530/530s Module KCC Identifier: MSIP-CRM-SEC-SIP005AFS30 Development kit KCC identifier: SRRC Both the ARTIK 530/530s Module and the ARTIK 530 Development Kit comply with the standards set by the People’s Republic of China. CMIIT ID: 2017AJ3123 (M)(ARTIK 530/530s Module) CMIIT ID: 2017AJ2921 (ARTIK 530 Development Kit) HDMI Compliance The ARTIK 530/530s Module passed the se lf-test, HDMI CTS version 1.4b on 8/26/2016 provided by HDMI Licensing LLC. RoHS Compliance The ARTIK 530/530s Module complies with the hazardous substance limits of directive 2011/65/EU and the conformity assessment procedure as outlined in Decision 768/2008/EC, Annex II, Module A, Point 2, as well as RoHS harmonized standard EN 50581. Report reference number: F690101/LF-CTSAYGU16-06911 FCC Regulatory Disclosures This device complies with Part 15 of the FCC\`s Rules. Op eration is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This de vice must accept any interference received, including interference that may cause undesirable operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provid e reasonable protection against harmful interference in a residential installation. This equipment generates, uses an d can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful inte rference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna.

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet

• Increase the separation betwee n the equipment and receiver.
• Connect the equipment into an outlet on a circuit diff erent from that to which the receiver is connected.
• Consult the dealer or an experienced radio/ TV technician for help. This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and oper ated with a minimum distance of 20cm between the transmitter’s radiating structure(s) and the body of the user or nearby persons. This module is intended for OEM integration. The OEM integrator is responsible for FCC compliance and compliance responsible for certification and testing and labeling of its own products. In addition to any independently required labels, the OEM shall also affix to the outside of a device into which the module is installed a label referring to the enclosed module. This exterior label should be prepared in a legible font and permanently affixed and using the wording “Contains Transmitter Module FCCID: A3LSIP005AFS30” The OEM is required to ensure that the end product integrates this module so as to maintain a minimum distance of 20 cm between the equipment’s radiating structure(s) and the body of the user or nearby persons. The OEM shall also advise its end user of this requirement as required by applicable rules. The OEM shall require that the end user of its product be informed that the FCC radio frequency exposure guidelines for an uncontrolled environment can be satisfied. The OEM shall further inform its end user that any change or modifications to this module not expr essly approved by the manufacturer will void the warranty and the users’ authority to operate the equipment.

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet Industry Canada Regulatory Disclosures Industry Canada Statement This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Cet appareil est conforme avec Industrie Canada exempts de licence standard RSS (s). L'opération est soumise aux deux conditions suivantes:(1) cet appare il ne peut causer d'interférences, et (2) cet appareil doit accepter toute interférence, y compris les interférences qui peuvent causer un mauvais fonctionnement de l'appareil. Industry Canada Radiation Exposure Statement and Limitations on Use This equipment complies with IC RSS-102 radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator and your body. This equipment should be installed and must not be co-located or operating in conjunction with any other antenna or transmitter. This equipment is restricted to indoor use in the 5.15-5.2 5 GHz range. This equipment is not able to be operated at 5600-5650. In the United States and Canada, only Cha nnel 1~11 can be operated and these channel assignments deal only with the 2.4 GHz range. The end product must be labeled to display the Industry Canada certification number of the module. “Contains transmitter module IC: 649E-SIP005AFS30” Le dispositif d'accueil doivent être étiq uetés pour afficher le numéro de cert ification d'Industrie Canada du module. “Contient module émetteur IC : 649E-SIP005AFS30” EU Regulatory Disclosures Statement* The following statement must be supplied with each product but can be printed in the user manual, the packaging, or provided as a separated leaflet. Hereby, Samsung declares that this IoT Module is in compliance with the essential requirements and other relevant provisions of Article 3 of the Radio Equipment Directive 2014/53/EU and RoHS directive 2011/65/EU. “The declaration of conformity may be consulted at [www.artik.io/certification]” The 5150 - 5350 MHz and 5470 - 5725 MHz bands are for indoor use only. The OEM is required to ensure that the end product integrates this module so as to maintain a minimum distance of 20 cm between the equipment’s radiating structure(s) and the body of the user or nearby persons. The OEM shall also advise its end user of this requirement as required by applicable rules.

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet

ORDERING INFORMATION

For volume ordering of evaluation kits, contact a sales representative in your area or email sales@artik.io. Item Order Number Description ARTIK 530 Module SIP-005AFS301 – ARTIK 530s Module SIP-005AFS302 – ARTIK 530 Development Kit SIP-KITNXD001 ARTIK 530 Development Module ARTIK 530/530s Interposer Board Platform Board Interface Board Two Antennas (one 802.15.4, one BT/Wi-Fi) ARTIK 530s Development Kit SIP-KITNXD002 ARTIK 530s Development Module ARTIK 530/530s Interposer Board Platform Board Interface Board Two Antennas (one 802.15.4, one BT/Wi-Fi)

Samsung Semiconductor, Inc. AR TIK 530/530s Module Datasheet LEGAL INFORMATION INFORMATION IN THIS DOCUMENT IS PROVIDED IN CO NNECTION WITH THE SAMSUNG ARTIK™ DEVELOPMENT KIT AND ALL RELATED PRODUCTS, UPDATES, AND DOCUME NTATION (HEREINAFTER "SAMSUNG PRODUCTS"). NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. THE LICENSE AND OTHER TERMS AND CONDITIONS RELATED TO YOUR USE OF THE SAMSUNG PRODUCTS ARE GOVERNED EXCLUSIVELY BY THE SAMSUNG ARTIK™ DEVELOPER LICENSE AGREEMENT THAT YOU AGREED TO WHEN YOU REGISTERED AS A DEVELOPER TO RECEIVE THE SAMSUNG PRODUCTS. EXCEPT AS PROVIDED IN THE SAMSUNG ARTIK™ DEVELOPER LICENSE AGREEMENT, SAMSUNG ELECTRONICS CO., LTD. AND ITS AFFILIATES (COLLECTIVELY, "SAMSUNG") ASSUMES NO LIABILITY WHATSOEVER, INCLUDING WITHOUT LIMITATION CONSEQUENTIAL OR INCI DENTAL DAMAGES, AND SAMSUNG DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, ARISING OUT OF OR RELATED TO YOUR SA LE, APPLICATION AND/OR USE OF SAMSUNG PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATED TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT. SAMSUNG RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION, DOCUMENTATION AND SPECIFICATIONS WITHOUT NOTICE. THIS INCLUDES MAKING CHANGES TO THIS DOCUMENTATION AT ANY TIME WITHOUT PRIOR NOTICE. THIS DOCUMENTATION IS PROVIDED FOR REFERENCE PURPOSES ONLY, AND ALL INFORMATION DISCUSSED HEREIN IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND. SAMSUNG ASSUMES NO RESPONSIBILITY FOR POSSIBLE ERRORS OR OMISSIONS, OR FOR ANY CONSEQUENCES FROM THE USE OF THE DOCUMENTATION CONTAINED HEREIN. Samsung Products are not intended for use in medical, life support, critical care, safety equipment, or similar applications where product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. This document and all information disc ussed herein remain the sole and excl usive property of Samsung. All brand names, trademarks and registered tr ademarks belong to their respective owners. For updates or additional information about Samsung ARTIK™, contact the Samsung ARTIK™ team via the Samsung ARTIK™ website at www.artik.io. Copyright © 2017 Samsung Electronics Co., Ltd. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electric or mechanical, by photoc opying, recording, or otherwise, without the prior written consent of Samsung Electronics. SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all informatio n discussed herein remain the sole and exclusive property of Sa msung Electronics. No license of any pa tent, copyright, mask work, trad emark or any other intellectual property right is granted by o ne party to the other party under this document, by implication, estoppel or other-wise. Samsung products are not intended for use in life supp ort, critical care, medical, safety equipment, or similar applications where product failure could resu lt in loss of life or personal or phys ical harm, or any military or defense application, or any governmental procuremen t to which special terms or prov isions may apply. For updates or additional information about Samsung products, contact your nearest Samsung office. All brand names, trademarks and registered trademarks belong to their respective owners.