APX9270 ANPEC | Alldatasheet
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Direct PWM Variable Speed Fan Motor Driver Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw1 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Features General Description The APX9270 is a single phase, DC brushless motor driver with PWM variable speed control and current limit features suitable for the fan of personal computer’s power supply and CPU cooler. The PWM control system includes thermistor input signal and direct PWM input signal, en- abling highly silent and low vibration speed control. The device is equipped with a built-in lock protection, which protects the fan when it is locked. It also has rotation speed detection output and thermal protection function. The APX9270 is available in SSOP-20 and TSSOP-20P packages (see Pin Configurations).
- Single Phase Full Wave Fan Driver
- Low Quiescent Current (6mA Typical)
- Built-in Variable Speed Function
- Current Limit Circuit (includes both internal and external Current Limit)
- Built-in Lock Protection and Auto Restart Function
- FG (rotation speed detection) Output
- Soft Switching Circuit (before phase change, enabling low-consumption, low loss and low noise drive.)
- Over Voltage Protection (16.5V Typical)
- Built-in Kickback Absorption Circuit
- Built-in Thermal Protection Circuit
- Lead Free and Green Devices Available (RoHS Compliant)
Applications
- CPU Coolers
- Variable Speed Control Fans Ordering and Marking Information Pin Configurations Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). N : SSOP-20 R: TSSOP-20P Operating Ambient Temperature Range I : -40 to 90 C Handling Code TR : Tape & Reel Assembly Material L : Lead Free Device G : Halogen and Lead Free Device Handling Code Temperature Range Package Code APX9270 N/R : APX9270 XXXXX XXXXX - Date Code Assembly Material o
19 PGND
18 OUT1
14 IN -SET 7
17 SGND
20 PGND
15 CTOSCL 6
12 IN +
14 IN -
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw2 Symbol Parameter Ratings Unit VCC VCC Pin Supply Voltage (VCC to SGND) -0.3 to 18 V VM VM Pin Supply Voltage (VM to SGND) -0.3 to VCC V IOUT OUT1/OUT2 Pin Maximum Output Current 1.2 A VOUT1/VOUT2 OUT1/OUT2 Pin Output Voltage (OUT1, OUT2 to SGND) VPGND-0.3 to VM V VPGND PGND to SGND Voltage -0.3 to 0.3 V IHB HB Pin Output Current 0 to 15 mA VSET SET Pin Input Voltage (SET to SGND) -0.3 to 7 V VMIN MIN Pin Input Voltage (MIN to SGND) -0.3 to 7 V VPWM PWM Pin Input Voltage (PWM to SGND) -0.3 to VCC V VFG FG Pin Output Voltage (FG to SGND) -0.3 to VCC V IFG FG Pin Output Current 0 to 10 mA VOSC OSC Pin Input Voltage (OSC to SGND) -0.3 to 7 V VCT CT Pin Input Voltage (CT to SGND) -0.3 to 7 V PD Power Dissipation SSOP-20 TSSOP-20P 1.2 1.5 W TJ Maximum Junction Temperature 150 °C TSTG Storage Temperature Range -55 to 150 °C TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 °C Symbol Parameter Value Unit RTH,JA Thermal Resistance-Junction to Ambient SSOP-20 TSSOP-20P 104 °C/W Absolute Maximum Ratings Note 1: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. Recommended Operating Conditions Symbol Parameter Rating Unit VCC VCC Pin Supply Voltage 4.5 to 15 V VM VM Pin Supply Voltage 3.5 to 15 V VSET SET Pin Input Voltage Range 0 to 6 V VMIN MIN Pin Input Voltage Range 0 to 6 V VPWM PWM Pin Input Voltage Range 0 to VCC V VOSCH/VOSCL OSC High/Low Level Input Voltage Range 0 to 6 V VICM Hall Input Common Phase Input Voltage Range 0.2 to 3 V TA Ambient Temperature -40 to 90 °C Thermal Characteristics Note 2: Mounted on a board (60x38x1.6t mm, Glass epoxy).
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw3 APX9270 Symbol Parameter Test Conditions Min. Typ. Max. Unit SUPPLY CURRENT V6VREG 6VREG Pin Output Voltage I6VREG = 5mA 5.85 6 6.15 V VHB HB Pin Output Voltage IHB = 5mA 1.2 1.3 1.4 V ICC1 Rotation Mode - 6 8 mA ICC2 Operating Current Lock Protection Mode - 6 8 mA OSCILLATOR IOSC1 OSC Charge Current 7.5 10 12.5 µA IOSC2 OSC Discharge Current 7.5 10 12.5 µA LOCK PROTECTION VCTH CT Pin High Level Voltage CCT = 1µF 3.4 3.6 3.8 V VCTL CT Pin Low Level Voltage CCT = 1µF 1.4 1.6 1.8 V ICT1 CT Charge Current VCT = 0V 1.65 2.2 2.75 µA ICT2 CT Discharge Current VCT = 3.6V 0.165 0.22 0.275 µA RCT CT Charge/Discharge Current Ratio RCT = ICT1/ICT2 8 10 12 - OUTPUT DRIVERS VOL Output Lower Side Saturation IOUT = 400mA - 0.2 0.3 V VOH Output Upper Side Saturation IOUT = 400mA - 0.4 0.6 V VFG FG Pin Low Voltage IFG = 5mA - 0.2 0.4 V IFGL FG Pin Leak Current VFG = 7V - 0.1 1 µA HALL SENSITIVITY VHN Hall Input Sensitivity Zero to peak including offset and hysteresis - 25 35 mV CURRENT-LIMIT ILIM Internal Current-Limit - 1200 - mA IRL External Current-Limit RL= 0.5Ω - 960 - mA THERMAL PROTECTION Thermal Protection Temperature - 160 - Thermal Protection Hysteresis - 20 - Over-Voltage Protection VOV Over-Voltage Threshold - 16.5 - V Electrical Characteristics (VCC = 12V, TA = 25°C, RL= 0Ω , unless otherwise specified)
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw4 Typical Operating Characteristics VCC Supply Current vs. VCC Supply Voltage VCC Supply Current vs. VCC Supply Voltage OSC Charge/Discharge Current vs. VCC Supply Voltage CT Charge/Discharge Current vs. VCC Supply Voltage FG Pin Low Voltage vs. Sink CurrentOutput Saturation Voltage vs. Output Current 0 5 10 15 VCC Supply Voltage (V) VCC Supply Current (mA) Rotation Mode 0 5 10 15 VCC Supply Voltage (V) VCC Supply Current (mA) Lock Mode 0.5 1.5 2.5 0 5 10 15 VCC Supply Voltage (V) CT Charge/Discharge Current (µA) Charge Current Discharge Current 200 400 600 800 1000 1200 1400 1600 1800 2000 0 200 400 600 800 1000 Output Current (mA) Output Saturation Voltage (mV) Upper Side Saturation Voltage Lower Side Saturation Voltage 100 150 200 250 300 0 1 2 3 4 5 6 7 8 9 10 FG Pin Sink Current (mA) FG Pin Low Voltage (mV) 9.5 10.5 0 5 10 15 VCC Supply Voltage (V) OSC Charge/Discharge Current (µA) Charge Current Discharge Current
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw5 Typical Operating Characteristics Maximum Power Dissipation vs. Ambient Temperature Operating Waveforms Maximum Power Dissipation (W) 0.2 0.4 0.6 0.8 1.2 1.4 1.6 0 25 50 75 100 125 150 SSOP-20 TSSOP-20P Ambient Temperature ( C)° VOUT1 VOUT2 VIN- VIN+ Rotation Waveform 1 Ch1 : VOUT1, 5V/Div, DC Ch2 : VOUT2, 5V/Div, DC Ch3 : VIN+, 100mV/Div, AC Ch4 : VIN-, 100mV/Div, AC Time : 2ms/Div 1, 2 3, 4 VOUT2 IIN VCC VOUT1 Rotation Waveform 2 Ch1 : VCC, 5V/Div, DC Ch2 : VOUT1, 5V/Div, DC Ch3 : VOUT2, 5V/Div, DC Ch4 : IIN, 500mA/Div, DC Time : 2ms/Div 2, 3
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw6 Operating Waveforms (Cont.) VOUT2 IIN VCT VOUT1 Lock Protection Waveform 1 Ch1 : VOUT1, 5V/Div, DC Ch2 : VOUT2, 5V/Div, DC Ch3 : VCT, 2V/Div, DC Ch4 : IIN, 1A/Div, DC Time : 1s/Div 1, 2 VOUT2 IIN VCT VOUT1 Lock Protection Waveform 2 Ch1 : VOUT1, 5V/Div, DC Ch2 : VOUT2, 5V/Div, DC Ch3 : VCT, 2V/Div, DC Ch4 : IIN, 1A/Div, DC Time : 1s/Div 1, 2 VOUT2 IIN VCC VOUT1 Rotation Waveform 3 Ch1 : VCC, 5V/Div, DC Ch2 : VOUT1, 5V/Div, DC Ch3 : VOUT2, 5V/Div, DC Ch4 : IIN, 200mA/Div, DC Time : 2ms/Div 2, 3 VOUT2 IIN VCC VOUT1 Power ON Waveform Ch1 : VCC, 5V/Div, DC Ch2 : VOUT1, 5V/Div, DC Ch3 : VOUT2, 5V/Div, DC Ch4 : IIN, 500mA/Div, DC Time : 50ms/Div 2, 3
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw7 PIN NO. NAME FUNCTION 1 PGND Power Stage GND. 2 OUT2 H-bridge Output Connection. The output stage is a H-bridge formed by four transistors and four-protection diode for switching applications. 3 VM Supply Voltage for Output Stage Input Pin. 4 VCC Supply Voltage Input Pin. 5 OSCH Setting of the OSC Waveform High Level Voltage. Use a voltage divider from 6VREG to set OSC waveform high-level voltage. 6 OSCL Setting of the OSC Waveform Low Level Voltage. Use a voltage divider from 6VREG to set OSC waveform low-level voltage. 7 SET Speed Setting. An external voltage into SET pin to set fan speed. 8 MIN Minimum Speed Setting. Use a voltage divider from 6VREG to set MIN pin voltage for setting minimum speed. 9 PWM PWM Signal Input Terminal. 10 OSC Oscillator Frequency Setting. Connect a capacitor to SGND to set oscillation frequency. 11 FG Rotation Speed Output. This is an open-collector output. 12 IN+ Hall Input +. Connect to hell element positive output. 13 HB Hall Bias. This is a 1.3V constant-voltage output for hall element bias. 14 IN- Hall Input -. Connect to hell element negative output. 15 CT Shutdown Time and Restart Time Setting. Connect a capacitor to SGND to set shutdown time and restart time in lock mode. 16 6VREG 6V Regulator Output. This is a 6V constant-voltage output for application circuit biases. 17 SGND Control Stage GND. 18 OUT1 H-bridge Output Connection. The output stage is a H-bridge formed by four transistors and four-protection diode for switching applications. 19 PGND Power Stage GND. 20 PGND Power Stage GND. Pin Description
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw8 Block Diagram Typical Application Circuits 1. With external current limiter VCC VM IN+ IN- PWM 6VREG OSCH OSCL HB MIN SET OSC CT SGND PGND OUT2 OUT1 FG PWM input VIN H M Pull High Voltage RFG=10KΩ CM=4.7µF /25V RL CCT=0.47 to 1µF Thermistor COSC=100pF R1=1Ω IIN Thermal Protection External Current Limiter Level Shift Level Shift Control circuit Oscillating circuit 6V Regulator Hall Bias Charge/discharge circuit M VCC VM HB IN+ IN- SGND CT PWM MIN SET OSCH OSCL OSC PGND OUT 1 OUT 2 FG HALL Internal Current Limiter 6VREG
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw9 Typical Application Circuits (Cont.) 2. Without external current limiter Note 3: In hot plug application, it’s necessary to protect against a hot plug input voltage overshoot. Placing a resistor (R1) in series with a capacitor (C1 or C M) dampens the overshoot. VCC VM IN+ IN- PWM 6VREG OSCH OSCL HB MIN SET OSC CT SGND PGND OUT2 OUT1 FG PWM input VIN H M Pull High Voltage RFG=10KΩ R1=2Ω C1=4.7µF/25V CCT=0.47 to 1µF Thermistor COSC=100pF IIN
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw11 Function Description (Cont.) FG Output The FG pin is an open drain output connecting a pull up resistor to a high level voltage for the speed detection function. When VIN- is larger than VIN+, the VFG is low (switch on); when VIN- is smaller than VIN+, the VFG is high (switch off). Leave it open when not in using. Thermal Protection The APX9270 is designed with a thermal protection to protect the IC from the damage of over temperature. When internal j unction temperature reaches 160°C, the output devices will be switched off. When the IC’s junc- tion temperature cools by 20 °C, the thermal sensor will turn the output devices on agai n resulting in a pulsed output during co ntinuous thermal overload. Input Output SET PWM IN- IN+ CT OUT1 OUT2 FG Mode L H L H L L L L L H L H OFF Rotation (Drive) L H L OFF L L H L L H L OFF OFF Rotation (Regeneration) - H H L OFF L L - H L H L L OFF OFF Output Regeneration Mode by External Signal - - H L OFF L L - - L H H L OFF OFF Lock Mode Truth Table SET or PWM=[L], “L” means that SET or PWM voltage is smaller than OSC voltage. Also, SET or PWM=[H], “H” means that SET or PWM voltage is greater than OSC voltage.
Application Information
Input Protection Diode & Capacitor The input protection diode (D1) between supply voltage and VCC pin has to be used to prevent the reverse current flowing into the supply power. However, the protection diode will cause a voltage drop on the supply voltage. The current rating of the diode must be larger than the maximum output current. For the noise reduction purpose, a capacitor (C1/CM) must be connected between VCC/VM and SGND/PGND. The C1/CM should be placed near the device VCC/VM pin as close as possible. Setting of the Oscillator Frequency and Output Voltage OSCOSCLOSCH 1SOC OSC C)VV( I5.0f ×− Current Limit (Cont.) recommended to short R L resistance and remove C M ca- pacitor to disable external current limiter because the internal current limiter is sufficient to avoid overload. The oscillator is used for PWM speed control. Compare the OSC and SET pin voltages can decide PWM duty and PWM frequency depends on the oscillator frequency. The oscillator is based on internal charge/discharge circuit. The circuit charges COSC to VOSCH by a 10µA source current, and then it will discharge COSC to VOSCL by 10µA sink current. The circuit can generate a triangular waveform. The triangular waveform is determinded by COSC, R2, R3, R4, and R4. (see Typical Application Circuit) For example: COSC=100pF, R2 = R5 = 10kΩ , R3 = R4 = 20kΩ, IOSC1=10µA VOSCH= 4V, VOSCL= 2V, fOSC=25kHz The recommended OSC frequency range is from 22kHz to 32kHz. 3R2R 3RVV VREG6OSCH +×= 5R4R 5RVV VREG6OSCL +×=
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw12 Application Information (Cont.) HB Bias Output and Hall Input Signals For example: V6VREG = 6V, IFG = 5mA, VFG = 0.2V, RFG = 1.16kΩ The value of resistor in the range of 1k Ω to 10k Ω is recommended. FG FG6VREG FG IR VV −= CT Capacitor The capacitor that is connected from CT pin to GND determines the shutdown time and restart time. ( ) I VVCTime Restart CT1 CT2CT1CT −×= ( ) I VVCTime Shutdown CT2 CT2CT1CT −×= where CCT = CT pin capacitor For example: VCC=12V, CCT=1µF Locked Detection Time = 1.545 s Restart Time = 0.909 s Shutdown Time = 9.091 s The value of charge capacitor in the range of 0.47 µF to 1µF is recommended. FG Resistor The value of the FG resistor could be decided by the following equation ( ) I V2.0VC Time Detection Locked CT1 CT1CT −×= Thermal Pad Consideration The thermal pad on the bottom of the TSSOP-20P pack- age should be soldered down to a copper pad on the circuit board. Heat can be conducted away from the ther- mal pad through the copper plane to ambient. If the cop- per plane is not on the top surface of the circuit board, 8 to 10 vias of 13 mil or smaller in diameter should be used to thermally couple the thermal pad to the bottom plane. For good thermal conduction, the vias must be plated through and solder filled. The copper plane is used to conduct heat away from the thermal pad should be as large as practical. If the ambient temperature is higher than 25 ο C, a larger copper plane or forced-air cooling will be required to keep the APX9270 junction temperature below the thermal pro- tection temperature (160 ο C). Thermal Consideration Refer to “Maximum Power Dissipation vs. Ambient Temperature”, the IC is safe to operate below the curve and it will cause the thermal protection if the operating area is above the line. For example, TA= 50ο C, the SSOP- 20 package maximum power dissipation is about 0.95W. Power dissipation can be calculated by the following equation: For example: When VCC = 12V, ICC = 6mA, IOUT = 300mA, VOUT1 = 11.66V, VOUT2 = 0.13V, then PD = 0.213W According the power dissipation issue, we could adapt this SSOP-20 package. ( ) CCCCOUT2OUT1OUTCCD IVIVVVP ×+×−−= The IC outputs a 1.3V voltage on HB pin to provide bias for the external hall element. The IC also has two pins IN+ and IN- to receive the hall signals from the hall element. The hall signals are very weak so the layout tracks must be short and far away from those noise sources to avoid noise coupling. The hall input amplifier has 20mV hysteresis. Therefore, the recommended dif- ferential hall input voltage should be more than 60mV.
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw13
Package Information
0.25 SEATING PLANE GAUGE PLANE c SEE VIEW A h X 45 S YMB OL MIN. MAX. 1.75 1.24 0.15 0.25 A c D E e L h MILLIMETERS b 0.20 0.30
0.635 BSC
0.25 0.50 0.40 1.27
0.025 BSC
MIN. MAX. INCHES 0.069 0.049 0.008 0.012 0.006 0.010 0.010 0.020 0.016 0.050 0 8 0 8 0.10A1 0.25 0.004 0.010 °° °0 ° D E be A1 A2 A Note : 1. Follow JEDEC MO-137 AD. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side . 3. Dimension "E" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. 5.80 6.20 8.56 8.76 3.80 4.00 0.337 0.345 0.228 0.244 0.150 0.157
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw14 Note : 1. Follow JEDEC MO-153 ACT. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. 0VIEW A 0.25 SEATING PLANE GAUGE PLANE SEE VIEW A E b c A e L E2EXPOSE D PAD D SYMBOL MIN. MAX. 1.20 0.05 0.09 0.20 6.40 6.60 0.15 A c D E e L MILLIMETERS b 0.19 0.30
0.65 BSC
0.45 0.75
0.026 BSC
MIN. MAX. INCHES 0.047 0.002 0.007 0.012 0.004 0.008 0.252 0.260 0.169 0.177 0.018 0.030 0.006 A2 0.80 1.05 4.30 4.50E1 6.40 BSC 0.252 BSC 0.031 0.041 2.20D1 0.087 E2 1.50 0.059 5.00 4.00 0.197 0.157 INCHES 8 0 80o o o o
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw15 Application A H T1 C d D W E1 F 330 ±2.00 50 MIN. 16.4+2.00 -0.00 13.0+0.50 -0.20 P0 P1 P2 D0 D1 T A0 B0 K0 SSOP -20 Application A H T1 C d D W E1 F -0.00 13.0+0.50 -0.20 P0 P1 P2 D0 D1 T A0 B0 K0 TSSOP -20P (mm) Devices Per Reel Carrier Tape & Reel Dimensions Package Type Unit Quantity SSOP-20 Tape & Reel 2500 TSSOP-20P Tape & Reel 2000 A AB W F T P0OD0 B SECTION B-B SECTION A-A OD1 H A d
Copyright ANPEC Electronics Corp. Rev. A.3 - Jun., 2008 APX9270 www.anpec.com.tw16 Reflow Condition (IR/Convection or VPR Reflow) Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate (TL to TP) 3°C/second max. 3°C/second max. Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: - Temperature (TL) - Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak/Classification Temperature (Tp) See table 1 See table 2 Time within 5°C of actual Peak Temperature (tp) 10-30 seconds 20-40 seconds Ramp-down Rate 6°C/second max. 6°C/second max. Time 25°C to Peak Temperature 6 minutes max. 8 minutes max. Note: All temperatures refer to topside of the package. Measured on the body surface. Test item Method Description SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125 °C PCT JESD -22-B, A102 168 Hrs, 100 %RH, 121 °C TST MIL-STD-883D-1011.9 -65°C~150 °C, 200 Cycles ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V Latch -Up JESD 78 10ms, 1 tr > 100mA Reliability Test Program t 25 C to Peak tp Ramp-up tL Ramp-down ts Preheat Tsmax Tsmin TL TP Temperature Time Critical Zone TL to TP
Copyright ANPEC Electronics Corp. Table 2. Pb-free Process – Package Classification Reflow Temperatures Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures