2176A

APA2176 ANPEC | Alldatasheet

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Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw1 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. 270mW Stereo Cap-Free Headphone Driver APA2176/2176A Features General Description

Applications

• Headsets
• PDAs
• Portable Multimedia Devices
• Notebooks Simplified Application Circuit
• No Output Capacitor Required
• Dual Supply Voltage (PVDD>VDD) – VDD=1.8 ~5.5V – PVDD=2.2 ~ 5.5V
• Meeting VISTA Requirements
• Output Power at 1% THD+N -200mW, at VDD=3.3V, PVDD=5.0V, RL=16W -55mW, at VDD=1.8V, PVDD=3.0V, RL=16W at 10% THD+N -270mW, at VDD=3.3V, PVDD=5.0V, RL=16W -70mW, at VDD=1.8V, PVDD=3.0V, RL=16W
• Less External Components Required
• High PSRR: 80dB at 217Hz
• Fast Start-Up Time : 120ms
• Short-Circuit and Thermal Protection
• Surface-Mount Package – TQFN4x4-20B (with Enhanced Thermal Pad) – TSSOP-16 – TQFN3x3-16 (with Enhanced Thermal Pad) (for APA2176A)
• Lead Free and Green Devices Available (RoHS Compliant) The APA2176/2176A is a stereo, fixed gain, and cap-free headphone driver which is available in TQFN4x4 20-pin, TQFN3x3 16-pin (APA2176A) or TSSOP-16 package. Dual supply voltage provides higher efficiency and better power ripple rejection. The APA2176/2176A is designed with ground-reference output and no need the output capacitors for DC blocking. The advantages of eliminating the output capacitor are saving the cost, PCB’s space, and component height. The built-in gain setting can minimize the external com- ponent counts and save the PCB space. High PSRR pro- vides increased immunity to noise and RF rectification. In addition to these features, a fast start-up time and small package size make the APA2176/2176A an ideal choice for portable multimedia devices. Moreover, the APA2176/2176A is also equipped other features. For example, at THD+N=1%, it is capable of driving 200mW at VDD=3.3V, PVDD=5.0V into 16Ω . In addition, it provides thermal and short circuit protections. Stereo Headphone ROUT RIN RSD LIN LOUT LSD R-CH Input L-CH Input Shutdown Control APA2176/2176A

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw2 APA2176/2176A Pin Configuration Ordering and Marking Information Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). APA2176 Handling Code Temperature Range Package Code Package Code QB : TQFN4x4-20B O : TSSOP-16 QB : TQFN3x3-16 (APA2176A) Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device XXXXX - Date Code Assembly Material APA2176 APA2176 XXXXX APA2176A XXXXX - Date CodeAPA2176 XXXXX - Date CodeAPA2176A APA 2176A XXXXX QB : QB : O : APA2176 XXXXX =Thermal Pad (connected the Thermal Pad to ground plane for better heat dissipation) PVDD 2 NC 3 CP+ 4 PGND 5 CP- 6 CVSS 7 VSS 8 9 LOUT

10 VDD

11 ROUT

12 LIN

13 RSD

14 RIN

15 GND

16 LSDNC 1

TSSOP-16 (Top View) APA2176 TQFN4x4-20B (Top View) APA2176 6 NC

7 VSS

9 LOUT

13 LIN

14 RSD

15 RIN

5 CVSS

6 VSS

7 LOUT

8 VDD

10 LIN

11 RSD

12 RIN

TQFN3x3-16 (Top View)

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw3 APA2176/2176A Absolute Maximum Ratings (Note 1) Symbol Parameter Rating Unit VDD Supply Voltage (VDD to GND) -0.3 to 6 V PVDD Charge Pump Supply Voltage (PVDD to PGND) -0.3 to 6 V VPGND_GND PGND to GND Voltage -0.3 to 0.3 V VRSD, VLSD Input Voltage (RSD and LSD to GND) -0.3 to VDD+0.3 V VSS, CVSS VSS and CVSS to GND and PGND Voltage -6 to 0.3 V VROUT, VLOUT ROUT and LOUT to GND Voltage VSS-0.3 to VDD+0.3 V VCP+ CP+ to PGND Voltage -0.3 to PVDD+0.3 V VCP- CP- to PGND Voltage CVSS-0.3 to 0.3 V TJ Maximum Junction Temperature 150 ο C TSTG Storage Temperature Range -65 to +150 ο C TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 ο C PD Power Dissipation Internally Limited W (Over operating free-air temperature range unless otherwise noted.) Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom- mended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics (Note 2,3) Symbol Parameter Typical Value Unit θ JA Junction-to-Ambient Resistance in Free Air TQFN3x3-16 TQFN4x4-20B TSSOP16 100 oC/W θ JC Junction-to-Case Resistance in Free Air TQFN3x3-16 TQFN4x4-20B oC/W Note 2: Please refer to “Thermal Pad Consideration”. 2 layered 5 in2 printed circuit boards with 2oz trace and copper through several thermal vias. The thermal pad is soldered on the PCB. Note 3: The case temperature is measured at the center of the exposed pad on the underside of the TQFN3x3-16 and TQFN4x4-20B packages. Recommended Operating Conditions (Note 4) Symbol Parameter Range Unit VDD Supply Voltage 1.8 ~ 5.5 V PVDD Charge Pump Power Supply Voltage 2.2 ~ 5.5 V VIH High Level Threshold Voltage RSD, LSD 0.6PVDD ~ PVDD V VIL Low Level Threshold Voltage RSD, LSD 0 ~ 0.3PVDD V VICM Common Mode Input Voltage ~ VDD-1 V TA Ambient Temperature -40 ~ 85 oC TJ Junction Temperature -40 ~ 125 oC RL Headphone Resistance 14 ~ Ω Note 4: Refer to the typical application circuit.

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw4 APA2176/2176A

Electrical Characteristics

Symbol Parameter Test Conditions Min. Typ. Max. Unit SUPPLY CURRENT IDD VDD Supply Current - 2.0 4.0 mA IPVDD PVDD Supply Current - 3.2 6.5 mA ISD(VDD) VDD Shutdown Current VRSD = VLSD = 0 - 1.0 5.0 µA ISD(PVDD) PVDD Shutdown Current VRSD = VLSD = 0 - 1.0 5.0 µA CHARGE PUMP fOSC Switching Frequency 450 510 570 kHz Req Charge Pump Equivalent Resistance CCPO=CCPF=2.2µF 6 7 9 Ω POWER-ON-RESET Rising VDD Threshold PVDD=5V 1.67 1.7 1.73 V Falling VDD Threshold PVDD=5V 1.57 1.6 1.63 V AMPLIFIERS Av Internal Voltage Gain No Load -1.55 -1.5 -1.45 V/V Δ AV Gain Match - 1.0 - % Ri Input Resistance 12 14 16 kΩ SR Slew Rate - 2.5 - V/µs CL Maximum Capacitive Load - 400 - pF Tstart-up Start-Up Time from Shutdown - 120 - µs VDD=3.3V, PVDD=5.0V, TA=25°C THD+N = 1%, fin=1kHz, in Phase RL = 16Ω RL = 32Ω 125 200 150 PO Output Power THD+N = 10%, fin=1kHz, in Phase RL = 16Ω RL = 32Ω 170 270 200 mW THD+N Total Harmonic Distortion Plus Noise fin = 1kHz PO = 140mW, RL = 16Ω PO = 105mW, RL = 32Ω VO = 1.7Vrms, RL = 10kΩ 0.04 0.03 0.002 - % Crosstalk Channel Separation fin = 1kHz PO = 140mW, RL = 16Ω VO = 1.7Vrms, RL = 10kΩ - dB PSRR Power Supply Rejection Ratio RL = 16Ω , fin=217Hz - 90 - dB VOS Output Offset Voltage RL = 32Ω -5 - 5 mV S/N Signal to Noise Ratio With A-weighting Filter PO = 105mW, RL = 32Ω - 95 - dB Vn Noise Output Voltage RL = 32Ω - 15 - µV (rms) Unless otherwise specified, these specifications apply over VDD=3.3V, PVDD=5V, VPGND=VGND=0V, and CCPO=CCPF=2.2µF. Typical values are at TA=25oC.

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw5 APA2176/2176A Electrical Characteristics (Cont.) APA2176/2176A Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD=1.8V, PVDD=3.0V, TA=25°C THD+N = 1%, fin=1kHz, in Phase RL = 16Ω RL = 32Ω PO Output Power THD+N = 10%, fin=1kHz, in Phase RL = 16Ω RL = 32Ω mW THD+N Total Harmonic Distortion Plus Noise fin = 1kHz PO = 40mW, RL = 16Ω PO = 30mW, RL = 32Ω VO = 0.9Vrms, RL = 10kΩ 0.04 0.03 0.002 - % Crosstalk Channel Separation fin = 1kHz PO = 40mW, RL = 16Ω VO = 0.9Vrms, RL = 10kΩ - dB PSRR Power Supply Rejection Ratio RL = 16Ω , fin=217Hz - 82 - dB VOS Output Offset Voltage RL = 32Ω -5 - 5 mV S/N Signal to Noise Ratio With A-weighting Filter PO = 30mW, RL = 32Ω - 95 - dB Vn Noise Output Voltage RL = 32Ω - 15 - µV (rms) Unless otherwise specified, these specifications apply over VDD=3.3V, PVDD=5V, VPGND=VGND=0V, and CCPO=CCPF=2.2µF. Typical values are at TA=25oC.

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw6 APA2176/2176A THD+N vs. Output Power THD+N vs. Output Power THD+N vs. Output Voltage THD+N vs. Output Power Typical Operating Characteristics THD+N vs. Output Power THD+N vs. Voltage 0.01 0.1 0 35050 100 150 200 250 300 THD+N (%) Output Power (mW) fin=1kHz fin=20Hz fin=20kHz VDD=3.3V PVDD=5.0V RL=16Ω Cin=1µF BW<80kHz Stereo, in Phase 0.01 0.1 0 25050 100 150 200 THD+N (%) Output Power (mW) fin=1kHz fin=20Hz fin=20kHz VDD=3.3V PVDD=5.0V RL=32Ω Cin=1µF BW<80kHz Stereo, in Phase 0.001 0.01 0.1 0 41 2 3 THD+N (%) Output Voltage (Vrms) fin=1kHz fin=20Hz fin=20kHz VDD=3.3V PVDD=5.0V RL=10kΩ Cin=1µF BW<80kHz Stereo, in Phase 0.01 0.1 0 20050 100 150 THD+N (%) Output Power (mW) fin=1kHz fin=20Hz fin=20kHz VDD=2.8V PVDD=3.6V RL=16Ω Cin=1µF BW<80kHz Stereo, in Phase 0.01 0.1 0 150m30 60 90 120 THD+N (%) Output Power (mW) fin=1kHz fin=20Hz fin=20kHz VDD=2.8V PVDD=3.6V RL=32Ω Cin=1µF BW<80kHz Stereo, in Phase 0.001 0.01 0.1 0 31 2 THD+N (%) Output Voltage (Vrms) fin=1kHz fin=20Hz fin=20kHz VDD=2.8V PVDD=3.6V RL=10kΩ Cin=1µF BW<80kHz Stereo, in Phase

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw7 APA2176/2176A THD+N vs. Output Power THD+N vs. Output Power THD+N vs. Voltage THD+N vs. Output Power Typical Operating Characteristics (Cont.) THD+N vs. Output Power THD+N vs. Voltage 0.01 0.1 0 10020 40 60 80 THD+N (%) Output Power (mW) fin=1kHz fin=20Hz fin=20kHz VDD=1.8V PVDD=3.0V RL=16Ω Cin=1µF BW<80kHz Stereo, in Phase 0.01 0.1 0 6010 20 30 40 50 THD+N (%) Output Power (mW) fin=1kHz fin=20Hz fin=20kHz VDD=1.8V PVDD=3.0V RL=32Ω Cin=1µF BW<80kHz Stereo, in Phase 0.001 0.01 0.1 0 20.5 1 1.5 THD+N (%) fin=1kHz fin=20Hz fin=20kHz VDD=1.8V PVDD=3.0V RL=10kΩ Cin=1µF BW<80kHz Stereo, in Phase Output Voltage (Vrms) 0.01 0.1 0 8020 40 60 THD+N (%) Output Power (mW) fin=1kHz fin=20Hz fin=20kHz VDD=1.8V PVDD=2.4V RL=16Ω Cin=1µF BW<80kHz Stereo, in Phase 0.01 0.1 0 6010 20 30 40 50 THD+N (%) Output Power (mW) fin=1kHz fin=20Hz fin=20kHz VDD=1.8V PVDD=2.4V RL=32Ω Cin=1µF BW<80kHz Stereo, in Phase 0.001 0.01 0.1 0 20.5 1 1.5 THD+N (%) Output Voltage (Vrms) fin=1kHz fin=20Hz fin=20kHz VDD=1.8V PVDD=2.4V RL=10kΩ Cin=1µF BW<80kHz Stereo, in Phase

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw8 APA2176/2176A THD+N vs. Frequency THD+N vs. Frequency THD+N vs. Frequency THD+N vs. Frequency Typical Operating Characteristics (Cont.) THD+N vs. Frequency THD+N vs. Frequency 0.006 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel VDD=3.3V PVDD=5.0V RL=16Ω PO=140mW Cin=1µF BW<22kHz THD+N (%) 0.006 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=3.3V PVDD=5.0V RL=32Ω PO=105mW Cin=1µF BW<22kHz 0.0006 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=3.3V PVDD=5.0V RL=10kΩ VO=1.7Vrms Cin=1µF BW<22kHz 0.001 0.006 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=2.8V PVDD=3.6V RL=16Ω PO=70mW Cin=1µF BW<22kHz 0.006 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=2.8V PVDD=3.6V RL=32Ω PO=60mW Cin=1µF BW<22kHz 0.0006 0.001 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=2.8V PVDD=3.6V RL=10kΩ VO=1.4Vrms Cin=1µF BW<22kHz

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw9 APA2176/2176A THD+N vs. Frequency THD+N vs. Frequency THD+N vs. Frequency THD+N vs. Frequency Typical Operating Characteristics (Cont.) THD+N vs. Frequency THD+N vs. Frequency 0.001 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=1.8V PVDD=3.0V RL=16Ω PO=40mW Cin=1µF BW<22kHz 0.001 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=1.8V PVDD=3.0V RL=32Ω PO=30mW Cin=1µF BW<22kHz 0.0006 0.01 0.1 20 20k100 1k 10k Frequency (Hz) THD+N (%) Left channel Right channel VDD=1.8V PVDD=3.0V RL=10kΩ VO=0.9Vrms Cin=1µF BW<22kHz 0.001 0.001 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=1.8V PVDD=2.4V RL=16Ω PO=23mW Cin=1µF BW<22kHz 0.001 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=1.8V PVDD=2.4V RL=32Ω PO=23mW Cin=1µF BW<22kHz 0.0006 0.01 0.1 20 20k100 1k 10k Frequency (Hz) Left channel Right channel THD+N (%) VDD=1.8V PVDD=2.4V RL=10kΩ VO=0.9Vrms Cin=1µF BW<22kHz

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw10 APA2176/2176A Crosstalk vs. Frequency Crosstalk vs. Frequency Crosstalk vs. Frequency Crosstalk vs. Frequency Typical Operating Characteristics (Cont.) Output Noise Voltage vs. Frequency Output Noise Voltage vs. Frequency Frequency (Hz) -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k50 100 200 500 1k 2k 5k 10k Crosstalk (dB) Left to Right Right to Left VDD=3.3V PVDD=5.0V RL=16Ω PO=140mW Cin=1µF -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k50 100 200 500 1k 2k 5k 10k T Crosstalk (dB) Frequency (Hz) Left to Right Right to Left VDD=3.3V PVDD=5.0V RL=10kΩ VO=1.7Vrms Cin=1µF -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k50 100 200 500 1k 2k 5k 10k Crosstalk (dB) Frequency (Hz) Left to Right Right to Left VDD=1.8V PVDD=3.0V RL=16Ω PO=40mW Cin=1µF -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k50 100 200 500 1k 2k 5k 10k Crosstalk (dB) Frequency (Hz) Left to Right Right to Left VDD=1.8V PVDD=3.0V RL=10kΩ VO=0.9Vrms Cin=1µF 50µ 10µ 20µ 20 20k100 1k 10k Output Noise Voltage (Vrms) Frequency (Hz) VDD=3.3V PVDD=5.0V RL=16Ω Cin=1µF A-Weighting Left channel Right channel 50µ 10µ 20µ 20 20k100 1k 10k Output Noise Voltage (Vrms) Frequency (Hz) VDD=3.3V PVDD=5.0V RL=10kΩ Cin=1µF A-Weighting Left channel Right channel

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw11 APA2176/2176A Output Noise Voltage vs. Frequency Output Noise Voltage vs. Frequency Frequency Response Frequency Response Typical Operating Characteristics (Cont.) Frequency Response Frequency Response 50µ 10µ 20µ 20 20k100 1k 10k Output Noise Voltage (Vrms) Frequency (Hz) VDD=1.8V PVDD=3.0V RL=16Ω Cin=1µF A-Weighting Left channel Right channel 20 20k100 1k 10k Output Noise Voltage (Vrms) Frequency (Hz) VDD=1.8V PVDD=3.0V RL=10kΩ Cin=1µF A-Weighting Left channel Right channel 50µ 10µ 20µ +140+0 10 200k100 1k 10k Frequency (Hz) Gain (dB) Phase (deg) +220 +160 +180 +200 Gain Phase VDD=3.3V PVDD=5.0V RL=16Ω Cin=1µF +140 +220 +160 +180 +200 10 200k100 1k 10k Frequency (Hz) Gain (dB) Phase (deg) Gain Phase VDD=3.3V PVDD=5.0V RL=10kΩ Cin=1µF +140 +220 +160 +180 +200 10 200k100 1k 10k Frequency (Hz) Gain (dB) Phase (deg) Gain Phase VDD=1.8V PVDD=3.0V RL=16Ω Cin=1µF 10 200k100 1k 10k Frequency (Hz) Gain (dB) Phase (deg) +140 +220 +160 +180 +200 Gain Phase VDD=1.8V PVDD=3.0V RL=10kΩ Cin=1µF

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw12 APA2176/2176A PSRR vs. Frequency PSRR vs. Frequency PSRR vs. Frequency PSRR vs. Frequency Typical Operating Characteristics (Cont.) Charge Pump Supply Current vs. Supply Voltage Supply Current vs. Supply Voltage -120 -20 -110 -100 -90 -80 -70 -60 -50 -40 -30 20 20k100 1k 10k TT TT Frequency (Hz) PSRR (dB) VDD=3.3V PVDD=5.0V RL=16Ω Cin=1µF Vrr=200mVrms Left channel Right channel -120 -20 -110 -100 -90 -80 -70 -60 -50 -40 -30 20 20k100 1k 10k Frequency (Hz) PSRR (dB) VDD=3.3V PVDD=5.0V RL=10kΩ Cin=1µF Vrr=200mVrms Left channel Right channel -120 -20 -110 -100 -90 -80 -70 -60 -50 -40 -30 20 20k100 1k 10k TT T Frequency (Hz) PSRR (dB) VDD=1.8V PVDD=3.0V RL=16Ω Cin=1µF Vrr=200mVrms Left channel Right channel -120 -20 -110 -100 -90 -80 -70 -60 -50 -40 -30 20 20k100 1k 10k T Frequency (Hz) PSRR (dB) VDD=1.8V PVDD=3.0V RL=10kΩ Cin=1µF Vrr=200mVrms Left channel Right channel 0.0 1.0 2.0 3.0 4.0 Supply Current (mA) Charge Pump Supply Voltage (V) VDD=3.3V IVDD=2.0mA No Load 0.0 1.0 2.0 3.0 Supply Voltage (V) Supply Current (mA) PVDD=5.0V IPVDD=3.2mA No Load

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw13 APA2176/2176A Charge Pump Shutdown Current vs. Supply Voltage Shutdown Current vs. Supply Voltage Power Dissipation vs. Output Power Power Dissipation vs. Output Power Typical Operating Characteristics (Cont.) Power Dissipation vs. Output Power Power Dissipation vs. Output Power Charge Pump Supply Voltage (Volt) Shutdown Current (µA) 0.0 0.2 0.4 0.6 0.8 RSD=LSD=0V VDD=3.3V ISD(VDD)=0.65µA No Load Supply Voltage (Volt) Shutdown Current (µA) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 RSD=LSD=0V PVDD=5.0V ISD(PVDD)=0.58µA No Load Output Power (mW) Power Dissipation (mW) 100 150 200 250 0 50 100 150 200 250 VDD=3.3V PVDD=5.0V THD+N<1% RL=16Ω RL=32Ω Output Power (mW) Power Dissipation (mW) 100 125 150 0 20 40 60 80 100 120 VDD=2.8V PVDD=3.6V THD+N<1% RL=32Ω RL=16Ω Output Power (mW) Power Dissipation (mW) 100 0 10 20 30 40 50 60 VDD=1.8V PVDD=3.0V THD+N<1% RL=16Ω RL=32Ω Output Power (mW) Power Dissipation (mW) 0 10 20 30 40 VDD=1.8V PVDD=2.4V THD+N<1% RL=16Ω RL=32Ω

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw14 APA2176/2176A Output Power vs. Load Resistance Output Power vs. Load Resistance Output Power vs. Load Resistance Output Power vs. Load Resistance Typical Operating Characteristics (Cont.) Charge Pump Output Resistance vs. Supply Voltage GSM Power Supply Rejection vs.Frequency Output Power (mW) Load Resistance (Ω ) 100 150 200 250 300 10 100 1000 VDD=3.3V PVDD=5.0V fin=1kHz Cin=1µF BW<80kHz Stereo, in Phase THD+N=10% THD+N=1% 100 125 150 10 100 1000 Output Power (mW) Load Resistance (Ω ) VDD=2.8V PVDD=3.6V fin=1kHz Cin=1µF BW<80kHz Stereo, in Phase THD+N=10% THD+N=1% 100 10 100 1000 Output Power (mW) Load Resistance (Ω ) VDD=1.8V PVDD=3.0V fin=1kHz Cin=1µF BW<80kHz Stereo, in Phase THD+N=10% THD+N=1% 10 100 1000 Output Power (mW) Load Resistance (Ω ) VDD=1.8V PVDD=2.4V fin=1kHz Cin=1µF BW<80kHz Stereo, in Phase THD+N=10% THD+N=1% Output Resistance (Ω ) Charge Pump Supply Voltage (Volt) IPVDD=10mA No Load CF=CCO=2.2µF CF=CCO=1µF Supply Voltage (dBV) Frequency (Hz) Output Voltage (dBV) -150 -100 -50 0 2k400 800 1.2k 1.6k -150 -100 -50

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw15 APA2176/2176A Operating Waveforms Output Transient at Turn on CH1: VDD, 2V/Div, DC CH3: VOUT, 20mV/Div, DC TIME: 5ms/Div CH2: PVDD, 2V/Div, DC VDD VOUT PVDD Shutdown Release CH1: VRSD, 2V/Div, DC CH2: VOUT, 1V/Div, DC TIME: 200µs/Div VOUT VRSD Output Transient at Shutdown Active CH1: VRSD, 2V/Div, DC CH2: VOUT, 20mV/Div, DC TIME: 20ms/Div VOUT VRSD GSM Power Supply Rejection vs. Time Output Transient at Power off CH1: VDD, 2V/Div, DC CH3: VOUT, 20mV/Div, DC TIME: 100ms/Div CH2: PVDD, 2V/Div, DC PVDD VDD VOUT Output Transient at Shutdown Release CH1: VRSD, 2V/Div, DC CH2: VOUT, 20mV/Div, DC TIME: 20ms/Div VOUT VRSD T CH1: VDD, 500mV/Div, DC CH2: VOUT , 20mV/Div, DC TIME: 20ms/Div VDD VOUT VDD Offset = 3.3V

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw16 APA2176/2176A PIN NO. TQFN4x4-20B TSSOP-16 TQFN3x3-16 (FOR APA2176A) NAME FUNCTION 1 4 1 CP+ Charge pump flying capacitor positive connection. 2 5 2 PGND Charge pump ground. 3 6 3 CP- Charge pump flying capacitor negative connection. 4, 6, 8, 12, 16, 20 1, 3 4, 13 NC No Connection. 5 7 5 CVSS Charge pump output. 7 8 6 VSS Connect this pin to CVSS. 9 9 7 LOUT Left channel output for headphone. 10 10 8 VDD Supply voltage input pin. 11 11 9 ROUT Right channel output for headphone. 13 12 10 LIN Left channel audio signal input pin. 14 13 11 RSD Right channel shutdown mode control pin. A low-level voltage applied on this pin shuts off the right channel headphone driver. 15 14 12 RIN Right channel audio signal input pin. 17 15 14 GND Ground connection for circuitry. 18 16 15 LSD Left channel shutdown mode control pin. A low-level voltage applied on this pin shuts off the left channel headphone driver. 19 2 16 PVDD Charge pump power supply voltage input pin. Block Diagram Pin Description Shutdown circuit Power and Depop circuit ROUT RIN RSD Charge Pump circuit LIN LOUT GND VDD CP+ CP- CVSSVSSPGND PVDD LSD GND

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw17 APA2176/2176A Typical Application Circuit Shutdown Circuit Power and Depop Circuit ROUT RIN RSD Charge Pump Circuit LIN LOUT GND VDD CP+ CP- CVSSVSSPGND PVDD LSD GND Headphone Jack 1µF R-Ch Input 1µF L-CH Input 10µF Shutdown Control PVDD VDD 2.2µF 2.2µF CCPF 0.1µF CCPO CiR CiL 14k 14k 21k 21k CCPB Cs 10µF RiR RiL RfR RfL VSS

Copyright  ANPEC Electronics Corp. voltage PVDD to provide maximum device performance. to a definite voltage to avoid unwanted mode changing. Figure 1. Cap-Free Operation supply voltage is almost double. (See Typical Application Circuit). down which turns off the bias current of the amplifier.

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw19 APA2176/2176A

Application Information

Charge Pump Flying Capacitor (CCPF) The flying capacitor (CCPF) affects the load transient of the charge pump. If the capacitor’s value is too small, and then this increases charge pump’s output resistance and degrades the performance of headphone amplifier. Increasing the flying capacitor’s value improves the load transient of charge pump. It is recommended to use the low ESR ceramic capacitors (X7R type is recommended) above 2.2µF. Charge Pump Output Capacitor (CCPO) The charge pump needs an output capacitor(C CPO) to fil- ter the negative output current pulse flowing into CVSS pin as well as reduces the output voltage ripple (CVSS). The capacitor also sucks in surge current flowing from the VSS pin, the negative power input pin for the amplifiers. The output ripple is determined by the capacitance, ESR, and current ripple of the output capacitor. Increasing the value of output capacitor and decreasing the ESR can reduce the voltage ripple. Using a low-ESR ceramic ca- pacitor greater than 2.2 µF is recommended. For reduc- ing the parasitic inductance and improving the noise decoupling, place the capacitor near the CVSS and the PGND pins as close as possible. Charge Pump Bypass Capacitor (CCPB) Input Capacitor (Ci) In the typical application, an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the proper DC level for optimum operation. In this case, Ci and the input impedance Ri from a high-pass filter with the cutoff frequency are determined in the following equation: The value of Ci is important to consider carefully because it directly affects the low frequency performance of the circuit. Consider the example where Ri is 14kΩ and the specification that calls for a flat bass response down to 10Hz. The equation is reconfigured as below: When the input resistance variation is considered, the Ci is 1µF. Therefore, a value in the range of 1µF to 2.2µF would be chosen. A further consideration for this capaci- tor is the leakage path from the input source through the input network (Ri + Rf, Ci) to the load. This leakage current creates a DC offset voltage at the input to the amplifier that reduces useful headroom, es- pecially in high gain applications. For this reason, a low- leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the negative side of the capacitor should face the amplifiers’ inputs in most applications because the DC level of the amplifiers’ in- puts are held at 0V. Please note that it is important to confirm the capacitor polarity in the application. Power Supply Decoupling (Cs) The APA2176/2176A is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD+N) as low as possible. Power supply decoupling also pre- vents the oscillations caused by long lead length between the amplifier and the speaker. The optimum decoupling is achieved by using two differ- ent types of capacitor that targets on different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series- resistance (ESR) ceramic capacitor, typically 0.1µF, is placed as close as possible to the de- vice VDD lead for the best performance. For filtering lower frequency noise signals, a large aluminum electrolytic capacitor of 10µF or greater placed near the audio power amplifier is recommended. Thermal Consideration Linear power amplifiers dissipate a significant amount of heat in the package in normal operating condition. The (1) (2) Ci i fR2 1C π= ii )C(highpass CR2 1f π= The bypass capacitor(CCPB) connected with PVDD pin sup- plies the charge pump with surge current as well as re- duces the voltage ripple on PV DD pin. Using a low-ESR ceramic capacitor 10 µF(typical) is recommended. For reducing the parasitic inductance and improving the noise decoupling, place the capacitor near the PV DD and the PGND pins as close as possible.

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw21 APA2176/2176A

Package Information

K 0.20 0.008 3.90 4.10 0.154 0.161 3.90 4.10 0.154 0.161 SYMBOL MIN. MAX. 0.80 0.00 0.18 0.30 2.00 2.70 0.05 2.00 A b D E e L MILLIMETERS A3 0.20 REF TQFN4x4-20B 0.35 0.45 2.70

0.008 REF

MIN. MAX. INCHES 0.031 0.000 0.008 0.012 0.079 0.106 0.079 0.014 0.018 0.70 0.106 0.028 0.002 0.50 BSC 0.020 BSC Note : 1. Followed from JEDEC MO-220 VGGD-5. A b D Pin 1 E e Pin 1 Corner E2KL

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw22 APA2176/2176A Note : 1. Follow from JEDEC MO-153 AB. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. A VIEW A SEATING PLANE GAUGE PLANE 0.25 L SEE VIEW A C D E be S Y M B O L MIN. MAX. 1.20 0.05 0.09 0.20 4.90 5.10 0.15 A c D E e L MILLIMETERS b 0.19 0.30

0.65 BSC

0.45 0.75

0.026 BSC

MIN. MAX. INCHES 0.047 0.002 0.007 0.012 0.004 0.008 0.193 0.201 0.169 0.177 0.018 0.030 6.20 6.60 0.244 0.260 0 0o 8o 0o 8o 0.006 A2 0.80 1.05 4.30 4.50E1 0.031 0.041

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw23 APA2176/2176A Note : Follow JEDEC MO-220 WEED-4. D E Pin 1 A b e Pin 1 Corner k S Y M B O L MIN. MAX. 0.80 0.00 0.18 0.30 1.50 1.80 0.05 1.50 A b D E e L MILLIMETERS A3 0.20 REF TQFN3x3-16 0.30 0.50 1.80 MIN. MAX. INCHES 0.031 0.000 0.007 0.012 0.059 0.071 0.059 0.012 0.020 0.70 0.071 0.028 0.002 0.50 BSC 0.020 BSC K 0.20 0.008 2.90 3.10 0.114 0.122 2.90 3.10 0.114 0.122

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw24 APA2176/2176A Application A H T1 C d D W E1 F -0.00 13.0+0.50 -0.20 P0 P1 P2 D0 D1 T A0 B0 K0 TQFN4x4-20B Application A H T1 C d D W E1 F -0.00 13.0+0.50 -0.20 P0 P1 P2 D0 D1 T A0 B0 K0 TSSOP-16 Application A H T1 C d D W E1 F 330±2.00 50 MIN. 12.4+2.00 -0.00 13.0+0.50 -0.20 P0 P1 P2 D0 D1 T A0 B0 K0 TQFN3x3-16 (mm) Carrier Tape & Reel Dimensions A AB W F T P0OD0 B SECTION B-B SECTION A-A OD1 H A d

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw25 APA2176/2176A Package Type Unit Quantity TQFN4x4-20B Tape & Reel 3000 TSSOP-16 Tape & Reel 2500 TQFN3x3-16 Tape & Reel 3000 Devices Per Unit Taping Direction Information TQFN4x4-20B TSSOP-16 USER DIRECTION OF FEED USER DIRECTION OF FEED

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw26 APA2176/2176A TQFN3x3-16 USER DIRECTION OF FEED Taping Direction Information (Cont.) Classification Profile

Copyright  ANPEC Electronics Corp. (Tsmax to TP) 3 °C/second max. 3°C/second max. Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. Time 25°C to peak temperature 6 minutes max. 8 minutes max.

• Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.

** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Table 2. Pb-free Process – Classification Temperatures (Tc)

Copyright  ANPEC Electronics Corp. Rev. A.7 - Jan., 2013 www.anpec.com.tw28 APA2176/2176A Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838