APW7061 ANPEC | Alldatasheet

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Technical content

Features

Applications

The APW7061 is a voltage mode, synchronous PWM controller which drives dual N-channel MOSFETs. It integrates the controls, monitoring and protection functions into a single package, which provides one controlled power outputs with under-voltage and over-current protections. APW7061 provides excellent regulation for output load variation. An internal 0.8V temperature-compensated reference voltage is designed to meet the various low output voltage applications. A power-on-reset (POR) circuit limits the VCC minimum opearting supply voltage to assure the controller working well. Over current protection is achieved by monitoring the voltage drop across the low side MOSFET, eliminating the need for a current sensing resistor and short circuit condition is detected through the FB pin. The over-current protection triggers the soft-start function until the fault events be removed, but Under-voltage protection will shutdown IC directly. Pull the COMP pin below 0.4V will shutdown the controller, and both gate drive signals will be low. Pinouts

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Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw2 APW7061 Handling Code Temp. Range Package Code Package Code K : SOP-8 Operating Junction Temp. Range C : 0 to 70 C Handling Code TU : Tube TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device APW7061 K : APW7061XXXXX XXXXX - Date Code Lead Free Code ° Ordering and Marking Information Block Diagram Gate ControlSoft Start Power-On Reset PHASE LGATE FB GNDVCC UGATE VREF 50%VREF O.C.P Comparator Error Amp PWM Comparator U.V.P Comparator Triangle Wave COMP VCC BOOT IOCSET 250uA VCC Note: ANPEC lead-free products contain molding compounds /die attach m aterials and 100% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature.

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw3 Symbol Parameter Min. Nom. Max. Unit VCC Supply Voltage 7 12 19 V VBOOT Boot Voltage 26 V Application Circuit Symbol Parameter Rating Unit VCC, LGATE VCC to GND, LGATE to GND 30 V VBOOT, UGATE BOOT to GND, UGATE to GND 30 V PHASE to GND 30 V Operating Junction Temperature 0~150 o C TSTG Storage Temperature -65 ~ 150 o C TSDR Soldering Temperature (10 Seconds) 300 o C VESD Minimum ESD Rating ±2 KV Absolute Maximum Ratings Thermal Characteristics Symbol Parameter Value Unit θ JA Junction to Ambient Resistance in free air (SOP-8) 160 oC/W FB2 VCC1 COMP3 GND4 PHASE 5UGATE 6BOOT 7LGATE 8 APW7061 APM4220 APM4220 2R2 620R 20K 2.32KF 1.07KF 100R 1uF 0.01uF 56pF 0.1uF C12 0.1uF 4.7uF C11 4.7uF 1N4148 12V SR24 1uH 2.2uH +C1 470uF +C3 470uF +C9 1000uF +C10 1000uF 2.5V 16V 2A/40V 6.3V6.3V 16V 25mR 30mR 25mR 30mR /SHDN +C4 470uF 16V 25mR Recommended Operating Conditions

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw4 APW7061 Symbol Parameter Test Conditions Min Typ Max Unit SUPPLY CURRENT ICC VCC Nominal Supply UGATE and LGATE Open 2 mA IBOOT BOOT Nominal Supply UGATE Open 2 mA POWER-ON-RESET Rising VCC Threshold 7.0 7.2 7.4 V Falling VCC Threshold 6.6 6.8 7.0 V OSCILLATOR FOSC Free Running Frequency VCC=12V 220 250 280 kHz Ramp Upper Threshold 3.0 V Ramp Lower Threshold 1.3 V Δ VOSC Ramp Amplitude 1.7 VP-P REFERENCE VREF Reference Voltage 0.80 V Reference Voltage Tolerance -1 +1 % ERROR AMPLIFIER DC Gain 75 dB UGATE Duty Range 0 85 % FB Input Current 0.1 uA GATE DRIVERS IUGATE Upper Gate Source VBOOT=12V, VUGATE=6V 650 800 mA RUGATE Upper Gate Sink IUGATE=0.3A 4 8 Ω ILGATE Lower Gate Source VCC=12V, VLGATE=6V 550 700 mA RLGATE Lower Gate Sink ILGATE=0.3A 4 8 Ω TD Dead Time 30 nS PROTECTION FB Under Voltage Level FB Falling 50 % OCSET source current 250 uA SOFT START and SHUTDOWN TSS Internal Soft-Start Interval 2 mS Shutdown Threshold COMP Falling 0.4 V Shutdown Hysteresis 50 mV

Electrical Characteristics

Unless otherswise specified, these specifications apply over VCC= 12V, VBOOT = 12V and TA = 0 ~ 70oC. Typlcal values are at TA = 25oC.

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw5 Functional Pin Description VCC (Pin 1) This pin provides a supply voltage to the device, When VCC is rising above the threshold 4.2V, the device is turned on, and conversely, when VCC drops below the falling threshold, the device is turned off. A 1uF decoupling capacitor to GND is recommended. FB (Pin 2) FB pin is the inverting input of the error amplifier, and it receives the feedback voltage from an external resistive divider across the output (VOUT). The output voltage is determined by: where ROUT is the resistor connected from VOUT to FB, and RGND is the resistor connected from FB to GND. When the FB voltage is under 50% VREF, it will cause the under voltage protection, and shutdown the device. Remove the condition and restart the VCC voltage, will enable again the device. GND (Pin 4) Signal ground for the IC. UGATE (Pin 6) This pin provides gate drive for the high-side MOSFET. BOOT (Pin 7) This pin provides the supply voltage to the high side MOSFET driver. For driving logic level N-channel MOSEFT, a bootstrap circuit can be use to create a suitable driver’s supply. LGATE (Pin 8) This pin provides the gate drive signal for the low side MOSFET.  +×= GND OUT OUT R R10.8VV DS(ON) OCSET LIMIT R RA250I ×µ= COMP (Pin 3) This pin is the output of the error amplifier. Add an external resistor and capacitor network to provide the loop compensation for the PWM converter (see Application Information). Pull this pin below 0.4V will shutdown the controller, forcing the UGATE and LGATE signals to be 0V. A soft start cycle will be initiated upon the release of this pin. PHASE (Pin 5) A resistor (ROCSET) is connected between this pin and the drain of the low-side MOSFET will determine the over current limit. An internally generated 250uA current source will flow through this resistor, creating a voltage drop. This voltage will be compared with the voltage across the low-side MOSFET. The threshold of the over current limit is therefore given by : An over current condition will cycle the soft start function until the over current condition is removed. Because of the comparator delay time, so the on time of the low-side MOSFET must be longer than 800ns to have the over current protection work.

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw6 Typical Characteristics Time (2ms/div) Power Up Power Down Time (5ms/div) Time (2ms/div) Time (5ms/div) Enable (COMP is left open) Shutdown(COMP is pulled to GND) VOUT(1V/div) VCC(5V/div) VCC(5V/div) VOUT(1V/div) COMP(1V/div) VOUT(1V/div) COMP(1V/div) VOUT(1V/div)

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw7 Typical Characteristics (Cont.) Time (50ns/div) UGATE Rising Time (50ns/div) UGATE Falling Time (10us/div) Time (2us/div) Under Voltage Protection Over Current Protection VCC=12V, VIN=12V LGATE(10V/div) PHASE(10V/div) UGATE(10V/div) VCC=12V, VIN=12V LGATE(10V/div) PHASE(10V/div) UGATE(10V/div) VCC=12,VIN=12V VOUT=2.5V, L=2.2mHIL(10A/div) UGATE (20V/div) VOUT (1V/div) IL(10A/div) UGATE (20V/div) VOUT (1V/div) VCC=12V,VIN=12V, VOUT=2.5V, ROCSET=1kW RDS(ON)=16mW, L=2.2mH, IOUT=15A

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw8 0.2 0.4 0.6 0.8 1.2 0 2 4 6 8 10 12 0.2 0.4 0.6 0.8 1.2 1.4 0 2 4 6 8 10 12 0.5 1.5 2.5 3.5 0 2 4 6 8 10 12 Supply Voltage (V) Time (20us/div) UGATE Source Current (A) UGATE Voltage (V) UGATE Source Current vs. UGATE Voltage UGATE Voltage (V) UGATE Sink Current (A) UGATE Sink Current vs. UGATE Voltage Supply Current vs. Supply Voltage Typical Characteristics (Cont.) Supply Current (mA) PWM Load Transient ICC ICC(SHDN) VCC=12V VIN=12V VOUT=3.3V COUT=470mFx2 ESR=22.5mW L=1.5mH f=400kHz VOUT(100mV/div) IOUT1(5A/div) VBOOT=12V VBOOT=12V

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw9 0.2 0.4 0.6 0.8 1.2 0 2 4 6 8 10 12 100 125 150 0 0.5 1 1.5 2 2.5 3 3.5 4 100 125 150 1 1.5 2 2.5 3 3.5 4 Typical Characteristics (Cont.) Comp Voltage (V) Source Current (µA) Source Current vs. Comp Voltage Comp Voltage (V) Sink Current (µA) Sink Current vs. Comp Voltage LGATE Voltage (V) LGATE Sink Current (A) LGATE Sink Current vs. LGATE Voltage 0.2 0.4 0.6 0.8 1.2 1.4 0 2 4 6 8 10 12 LGATE Voltage (V) LGATE Source Current (A) LGATE Source Current vs. LGATE Voltage VCC=12V VCC=12V VCC=12VVCC=12V

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw10 0.79 0.792 0.794 0.796 0.798 0.8 -40 -20 0 20 40 60 80 100 120 Junction Temperature (°C) Reference Voltage (V) Reference Voltage vs. Junction Temperature Typical Characteristics (Cont.)

Application Information

Component Selection Guidelines Output Capacitor Selection The selection of COU T is determined by the required effective series resistance (ESR) and voltage rating rather than the actual capacitance requirement. Therefore select high performance low ESR capacitors that are intended for switching regulator applications. In some applications, multiple capacitors have to be paralled to achieve the desired ESR value. If tantalum capacitors are used, make sure they are surge tested by the manufactures. If in doubt, consult the capacitors manufacturer. Input Capacitor Selection The input capacitor is chosen based on the voltage rating and the RMS current rating. For reliable operation, select the capacitor voltage rating to be at least 1.3 times higher than the maximum input voltage. The maximum RMS current rating requirement is approximately IOUT/2 , where IOUT is the load current. During power up, the input capacitors have to handle large amount of surge current. If tantalum capacitors are used, make sure they are surge tested by the manufactures. If in doubt, consult the capacitors manufacturer. For high frequency decoupling, a ceramic capacitor between 0.1uF to 1uF can be connected between VCC and ground pin. Inductor Selection The inductance of the inductor is determined by the output voltage requirement. The larger the inductance, the lower the inductor’s current ripple. This will translate

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw14

Package Information

SOP-8 pin ( Reference JEDEC Registration MS-012) HE e1 e2 0.015X45 D AA1 0.004max. L Millimeters Inches Dim Min. Max. Min. Max. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 H 5.80 6.20 0.228 0.244 L 0.40 1.27 0.016 0.050 e1 0.33 0.51 0.013 0.020 e2 1.27BSC 0.50BSC φ 1 8° 8°

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw15 Physical Specifications t 25 C to Peak tp Ramp-up tL Ramp-down ts Preheat Tsmax Tsmin T L TP Temperature Time Critical Zone TL to T P Terminal Material Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) , 100%Sn Lead Solderability Meets EIA Specification RSI86 -91, ANSI/J-STD-002 Category 3. Reflow Condition (IR/Convection or VPR Reflow) Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate (TL to TP) 3°C/second max. 3°C/second max. Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: - Temperature (TL) - Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak/Classificatioon Temperature (Tp) See table 1 See table 2 Time within 5°C of actual Peak Temperature (tp) 10-30 seconds 20-40 seconds Ramp-down Rate 6°C/second max. 6°C/second max. Time 25°C to Peak Temperature 6 minutes max. 8 minutes max. Notes: All temperatures refer to topside of the package .Measured on the body surface.

Copyright  ANPEC Electronics Corp. Table 2. Pb-free Process – Package Classification Reflow Temperatures Table 1. SnPb Entectic Process – Package Peak Reflow Temperatures

Copyright  ANPEC Electronics Corp. Rev. A.7 - Nov., 2005 APW7061 www.anpec.com.tw17 Customer Service Reel Dimensions Application A B C J T1 T2 W P E F D D1 Po P1 Ao Bo Ko t SOP- 8 Cover Tape Dimensions Application Carrier Width Cover Tape Width Devices Per Reel SOP- 8 12 9.3 2500 Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369