APW7055DNC-TRL

APW7055 ANPEC | Alldatasheet

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Technical content

/G43/G6F/G70/G79/G72/G69/G67/G68/G74/G20 /G41/G4E/G50/G45/G43/G20/G45/G6C/G65/G63/G74/G72/G6F/G6E/G69/G63/G73/G20/G43/G6F/G72/G70/G2E /G52/G65/G76/G2E/G41/G2E/G31/G20/G2D/G20/G44/G65/G63/G2E/G2C/G20/G32/G30/G30/G31 /G41/G50/G57/G37/G30/G35/G35 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G31 /G41/G4E/G50/G45/G43/G20/G72/G65/G73/G65/G72/G76/G65/G73/G20/G74/G68/G65/G20/G72/G69/G67/G68/G74/G20/G74/G6F/G20/G6D/G61/G6B/G65/G20/G63/G68/G61/G6E/G67/G65/G73/G20/G74/G6F/G20/G69/G6D/G70/G72/G6F/G76/G65/G20/G72/G65/G6C/G69/G61/G62/G69/G6C/G69/G74/G79/G20/G6F/G72/G20/G6D/G61/G6E/G75/G66/G61/G63/G74/G75/G72/G61/G62/G69/G6C/G69/G74/G79/G20/G77/G69/G74/G68/G6F/G75/G74/G20/G6E/G6F/G74/G69/G63/G65/G2C/G20/G61/G6E/G64/G20/G61/G64/G76/G69/G73/G65 /G63/G75/G73/G74/G6F/G6D/G65/G72/G73/G20/G74/G6F/G20/G6F/G62/G74/G61/G69/G6E/G20/G74/G68/G65/G20/G6C/G61/G74/G65/G73/G74/G20/G76/G65/G72/G73/G69/G6F/G6E/G20/G6F/G66/G20/G72/G65/G6C/G65/G76/G61/G6E/G74/G20/G69/G6E/G66/G6F/G72/G6D/G61/G74/G69/G6F/G6E/G20/G74/G6F/G20/G76/G65/G72/G69/G66/G79/G20/G62/G65/G66/G6F/G72/G65/G20/G70/G6C/G61/G63/G69/G6E/G67/G20/G6F/G72/G64/G65/G72/G73/G2E /G46/G65/G61/G74/G75/G72/G65/G73

• •••• Operates from 5V input supply
• •••• 2 Regulated Voltage are provided − Standard Buck Switching Power for VMEM (2.5V) − Linear Controller with Source-Sink Regula tion for VTT(1.25V)
• •••• Simple Single-Loop Control Design − Voltage-Mode PWM Control
• •••• Excellent Output Voltage Regulation − VMEM Output : VMEM ±1.5% Over Tem-per ature − VTT Output : 1/2 VIN ±25mV Over Tempera- ture
• •••• Fast Transient Response − Built-in Feedback Compensation − Full 0% to 100% Duty Ratio
• •••• Over-Voltage and Over-Current Fault Monitors
• •••• Constant Frequency Operation(200kHz)
• • • • • 16 pins, SSOP Package /G41/G70/G70/G6C/G69/G63/G61/G74/G69/G6F/G6E/G73
• •••• M/B DDR Power Regulation
• •••• AGP/PCI Graphics Power Regulation /G47/G65/G6E/G65/G72/G61/G6C/G20/G44/G65/G73/G63/G72/G69/G70/G74/G69/G6F/G6E The APW7055 provides the power control and protec- tions for two output voltages on M/B DDR applications. It integrates one PWM controller , one source-sink linear controller(LC) for DDR source-sink purpose, as well as the monitor and protection functions into a single package. The PWM controller supplies the VMEM(2.5V) with a standard buck converter. The source-sink linear controller regulates VTT(1.25V) power for DDR Termination. Additional built-in over-voltage protection (OVP) will be started when the VMEM output is above 115% of the internal DAC setting(V DAC ) . OVP function will shut- down the upper MOSFET and disable all output volt- age . The PWM controller’s over-current function moni- tors the output current by sensing the voltage drop across the upper MOSFET‘s r DS(ON) , eliminating the need for a current sensing resistor . Advanced PWM and Linear Power Controller /G50/G69/G6E/G20/G44/G65/G73/G63/G72/G69/G70/G74/G69/G6F/G6E SINK PHASE MEM1 PGND BOOT UGATESS VCC GND MEM0 OCSET VSEN SOURCE FB VIN SD

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G32 /G4F/G72/G64/G65/G72/G69/G6E/G67/G20/G49/G6E/G66/G6F/G72/G6D/G61/G74/G69/G6F/G6E /G42/G6C/G6F/G63/G6B/G20/G44/G69/G61/G67/G72/G61/G6D APW 7055 Vol tage Code A : 2.4 0~ 2.55 V B : 2 .6 0~ 2.7 5V C : 2.8 0~ 2 .95 V D : 3 .0 0~ 3.1 5V Package Code N : S S O P -16 Temp. Range C : 0 to 70 ° C Handl i ng Code T U : T ub e T R : T a pe & R e el Lead Free Code L : Le ad F ree D evice B la nk : O rigina l D evice Handl i ng Code Temp. Range Package Code Vol tage Code Lead Free Code /G41/G62/G73/G6F/G6C/G75/G74/G65/G20/G4D/G61/G78/G69/G6D/G75/G6D/G20/G52/G61/G74/G69/G6E/G67/G73 Symbol Parameter Rating Unit VCC Supply Voltage 15 V VI , VO Input , Output or I/O Voltage GND -0.3 V to V CC +0.3 V TA Operating Ambient Temperature Range 0 to 70 °C TJ Junction Temperature Range 0 to 125 °C TSTG Storage Temperature Range -65 to +150 °C TS Soldering Temperature 300 ,10 seconds °C VCC Power On Reset Therm al Protection V TT Control S oft S tart and Fault Logic O scillato r Gat e Control TTL D/A Converter SD SOURCE FB SI NK VCC SS OCSET BOOT PGND VSEN MEM0 MEM1 GND 28 µ A 4.5V I NHI BI T PWM OCP OVP 115% PHASE UGATE V MEM 200uA E. A 50%V TT V IN

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G33 /G45/G6C/G65/G63/G74/G72/G69/G63/G61/G6C/G20/G43/G68/G61/G72/G61/G63/G74/G65/G72/G69/G73/G74/G69/G63/G73 /G54/G68/G65/G72/G6D/G61/G6C/G20/G43/G68/G61/G72/G61/G63/G74/G65/G72/G69/G73/G74/G69/G63/G73 Symbol Parameter Value Unit R JA Thermal Resistance in Free Air SOIC SOIC (with 3in 2 of Copper) °C/W 1. Recommended operating conditions, Unless otherwise noted. 2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic. APW7055 Symbol Parameter Test Conditions Min. Typ. Max. Unit Supply Current Nominal Supply Current SD=0V, GATE Drive Open 7 ICC Shutdown Supply Current SD=5V 2.7 mA Power-on Reset Rising VCC Threshold Vocset=3V 4.2 4.6 V CC Falling VCC Threshold Vocset=3V 3.6 V V OCSET Rising VOCSET Threshold 1.26 V Shutdown Input High Voltage 2.0V SD Shutdown Input Low Voltage 0.8 V Oscillator FOSC Free Running Frequency 185 200 215 kHz ∆ V OSC Ramp Amplitude 1.9 V PWM Controller Reference Voltage V DAC DAC Voltage Accuracy -1.5 +1.5 % MEM0-1 Input High Voltage 2.0 MEM0-1 Input Low Voltage 0.8 V Source-Sink Linear Controller V SOURCE Source Regulation Voltage -10mV 0.495VIN +10mV V SINK Sink Regulation Voltage -10mV 0.505VIN +10mV V ISource Source Drive Current 0.8 ISINK Sink Drive Current 0.8 mA PWM Controllers Gate Drivers V CC =5V,V BOOT =9.5V, V UGATE =6V 1 IUGATE UGATE Source V CC =12V,V BOOT =9.5V, V UGATE =6V 1 A V CC =5V,V UGATE =1V 3 R GATE UGATE Sink V CC =12V, VUGATE =6V 3 3.5 Ω

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G34 /G46/G75/G6E/G63/G74/G69/G6F/G6E/G61/G6C/G20/G50/G69/G6E/G20/G44/G65/G73/G63/G72/G69/G70/G74/G69/G6F/G6E VCC (Pin 1) Provide a +5V bias supply for the IC to this pin. This pin also provides the gate bias charge for the MOS FETs of the source-sink regulator. The voltage at th is pin is monitored for Power-On Reset (POR) purposes. SS (Pin 2) This pin provides the soft start for the standard buck converter and source-sink regulator. Connect a ca- pacitor from this pin to ground.This capacitor, along with an internal 28uA current source,sets the soft-start interval of the converter and preventing the outputs from overshoot as well as limiting the input current . SD (Pin 3) The pin shuts down all the outputs. A TTL-compatible, logic level high signal applied at this pin immediately discharges the soft-start capacitor,disabling all the outputs.When IC re-enabled, the IC undergoes a new soft-start cycle.Left open, this pin is pulled low by an internal pull-down resistor,enabling operation. SOURCE (Pin 4) Connect the pin to the upper MOSFET gate drive of the source-sink regulator. This pin is used to drive the 1. Recommended operating conditions, Unless otherwise noted. 2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic. APW7055 Symbol Parameter Test Conditions Min. Typ. Max. Unit Protection VSEN O.V. trip point (VSEN/VDAC ) VSEN Rising 115 120 VSEN O.V. Hysteresis 2 % IOCSET Ocset Current Source Vocset=3V 170 200 230 ISS Soft start Current 28 uA upper external MOSFET as a source regulator. SINK (Pin 5) Connect the pin to the lower MOSFET gate drive of the source-sink regulator.This pin is used to drive the lower external MOSFET as a sink regulator. FB (Pin 6) Connect this pin to output of the source-sink regulator. This pin provide the voltage feedback path for source and sink regulators. This pin is internally connected to the negative input of the source controller, and also connected to the positive input of the sink controller. VIN (Pin 7) Connect this pin to a voltage source. Two voltages, above 0.5VIN, are generated by an internal resistor divider as the reference voltage of the source and sink controllers. The internal resistor divider provides an offset voltage to ensure higher sink regulation voltage and prevent an direct current path through the upper and lower MOSFETs, damaging the two MOSFETs. GND (Pin 8) Signal ground for the IC. All voltage levels are mea sured with respect to this pin voltage protection. /G45/G6C/G65/G63/G74/G72/G69/G63/G61/G6C/G20/G43/G68/G61/G72/G61/G63/G74/G65/G72/G69/G73/G74/G69/G63/G73/G20/G28/G43/G6F/G6E/G74/G2E/G29

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G35 /G46/G75/G6E/G63/G74/G69/G6F/G6E/G61/G6C/G20/G50/G69/G6E/G20/G44/G65/G73/G63/G72/G69/G70/G74/G69/G6F/G6E/G20/G28/G43/G6F/G6E/G74/G2E/G29 VSEN (Pin 9) This pin is connected to the standard buck converter’s output voltage to provide the voltage feedback path for PWM converter. The OVP(Over-Voltage-Protection) comparator circuit use this signal to monitor output voltage status for over-voltage protection. OCSET (Pin 10) Connect a resistor (R OCSET ) from this pin to the drain of the standard buck PWM converter’s MOSFET. ROCSET , an internal 200mA current source (IOCSET ), and the MOSFET ’s on-resistance(rDS(ON) ) set the converter’s over-current (OC) trip point according to the following equation: I PEAK = IOC SE T x ROCSET rDS(ON) An over-current trip cycles the soft-start function MEM0-1 (Pin 11-12) MEM0-1 are TTL-compatible logic level input pins of the 2-bits DAC.The status of these 2 pins set the in- ternal reference voltage(V DAC ) for the standard buck converter and also sets the OVP threshold voltage.Table 1 shows the DAC table voltage. PGND (Pin 13) This is the power ground connection. Tie this pin to the anode of the flywheel diode of the standard buck PWM converter’s circuit. PHASE (Pin 14) Connect the PHASE pin to the standard buck PWM converter’s MOSFET source.This pin is used to moni- tor the voltage drop across the MOSFET for over-cur rent protection. UGATE (Pin 15) Connect this pin to the MOSFET gate of the standard buck PWM converter.This pin provides the gate drive for the external MOSFET. BOOT (Pin 16) This pin provides bias voltage to the external MOSFET driver. A bootstrap circuit may be used to pump a boot voltage for enforcing the driving capability of the gate driver and improving the performance of the MOSFET. Table 1 DAC Table APW7055 - A APW7055 - B Pin Name MEM1 MEM0 VMEM Voltage 0 0 2.60 0 1 2.65 1 0 2.70 1 1 2.75 Pin Name MEM1 MEM0 VMEM Voltage 0 0 2.40 0 1 2.45 1 0 2.50 1 1 2.55

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G36 /G53/G69/G6D/G70/G6C/G69/G66/G69/G65/G64/G20/G50/G6F/G77/G65/G72/G20/G53/G79/G73/G74/G65/G6D/G20/G44/G69/G61/G67/G72/G61/G6D Table 1 DAC Table APW7055 - C APW7055 - D Pin Name MEM1 MEM0 VMEM Voltage 0 0 3.00 0 1 3.05 1 0 3.10 1 1 3.15 Pin Name MEM1 MEM0 VMEM Voltage 0 0 2.80 0 1 2.85 1 0 2.90 1 1 2.95 Source-Sink LC APW7055 PWM Controller V MEM 5VDUALV MEM V TT

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G37 /G54/G79/G70/G69/G63/G61/G6C/G20/G41/G70/G70/G6C/G69/G63/G61/G74/G69/G6F/G6E/G20/G43/G69/G72/G63/G75/G69/G74 /G4F/G43/G53/G45/G54/G31/G30 /G55/G47/G41/G54/G45/G31/G35 /G50/G48/G41/G53/G45/G31/G34 /G42/G4F/G4F/G54/G31/G36 /G50/G47/G4E/G44/G31/G33 /G56/G53/G45/G4E/G39 /G4D/G45/G4D/G30/G31/G31 /G53/G53/G32 /G4D/G45/G4D/G31/G31/G32 /G53/G44/G33 /G53/G49/G4E/G4B/G35 /G53/G4F/G55/G52/G43/G45/G34 /G46/G42/G36 /G56/G43/G43/G31 /G47/G4E/G44/G38 /G56/G49/G4E/G37 /G55/G31 /G41/G50/G57/G37/G30/G35/G35 /G52/G32 /G31/G6B /G2B /G43/G34 /G31/G30/G30/G30/G75/G46 /G52/G35 /G30 /G52/G36 /G53/G50/G41/G52/G45 /G43/G31 /G31/G75/G46 /G43/G31 /G30 /G31/G75/G46 /G31 /G32 /G34 /G33 /G4A/G32 /G43/G31 /G31 /G30/G2E /G31/G75/G46 /G52/G33 /G30 /G52/G37 /G30 /G52/G38 /G4E/G43 /G2B /G43/G31 /G32 /G31/G30/G30/G30/G75/G46 /G56/G54/G54 /G56/G4D/G45/G4D/G51/G31 /G41/G50/G4D/G39/G34/G31/G30 /G51/G32/G41 /G41/G50/G4D/G37/G33/G31/G33 /G44/G31 /G42/G33 /G34 /G2B /G43/G35 /G31/G30/G30/G30/G75/G46 /G2B /G43/G33 /G31/G30/G30/G30/G75/G46 /G43/G36 /G32/G30/G30/G70/G46 /G2B /G43/G37 /G31/G30/G30/G30/G75/G46 /G56/G4D/G45/G4D /G51/G32/G42 /G41/G50/G4D/G37/G33/G31/G33 /G52/G31 /G31/G30 /G2B/G35/G56/G44/G55/G41/G4C /G43/G31 /G33 /G30/G2E /G31/G75/G46 /G52/G34 /G31/G30/G6B /G43/G31 /G34 /G30/G2E /G31/G75/G46 /G2B /G43/G38 /G31/G30/G30/G30/G75/G46 /G2B /G43/G31 /G37 /G31/G30/G30/G30/G75/G46 /G52/G31 /G31 /G4E/G43 /G56/G49/G4E /G44/G34 /G31/G4E/G34/G31/G34/G38 /G35/G56/G53/G42 /G44/G35/G31/G4E/G34/G31/G34/G38 /G52/G31 /G32/G31/G6B /G4C/G31 /G32/G75/G48 /G4C/G32 /G34/G2E/G37/G75/G48

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G38 N 12 3 EH D L GAUGE PLANE e B A1 A SSOP-16 /G50/G61/G63/G6B/G61/G67/G65/G20/G49/G6E/G66/G6F/G72/G6D/G61/G69/G6F/G6E Millimeters Variations- D Inches Variations- D A1 0.10 0.25 A1 0.004 0.010 B 0.20 0.30 B 0.008 0.012 D See variations D See variations E 3.75 4.05 E 0.147 0.160 e 0.625 TYP . e 0.025 TYP . H 5.75 6.25 H 0.226 0.246 L 0.4 1.27 L 0.016 0.050 N See variations N See variations φ 10 ° 8°φ 10 ° 8°

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G39 t 25 C to Peak tp Ramp-up tL Ramp-down ts Preheat Tsmax Tsmin T L T P Temperature Time Critical Zone T L to TP °/G20 Terminal Material Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Lead Solderability Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. /G20 /G52/G65/G66/G6C/G6F/G77/G20/G43/G6F/G6E/G64/G69/G74/G69/G6F/G6E/G20(IR/Convection or VPR Reflow) /G43/G6C/G61/G73/G73/G69/G66/G69/G63/G61/G74/G69/G6E/G20/G52/G65/G66/G6C/G6F/G77/G20/G50/G72/G6F/G66/G69/G6C/G65/G73 Sn-Pb Eutectic Assembly Pb-Free Assembly Profile Feature Large Body Small Body Large Body Small Body Average ramp-up rate (TL to TP) 3°C/second max. 3 °C/second max. Preheat /G2D/G20Temperature Min (Tsmin) /G2D/G20Temperature Mix (Tsmax) /G2D/G20Time (min to max)(ts) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Tsmax to TL - Ramp-up Rate 3°C/second max Tsmax to TL /G2D/G20Temperature(TL) /G2D/G20Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak Temperature(Tp) 225 +0/-5°C 240 +0/-5 °C 245 +0/-5 °C 250 +0/-5 °C Time within 5°C of actual Peak Temperature(tp) 10-30 seconds 10-30 seconds 10-30 seconds 20-40 seconds Ramp-down Rate 6°C/second max. 6 °C/second max. Time 25°C to Peak Temperature 6 minutes max. 8 minutes max. Note: All temperatures refer to topside of the package. Measured on the body surface. /G50/G68/G79/G73/G69/G63/G61/G6C/G20/G53/G70/G65/G63/G69/G66/G69/G63/G61/G74/G69/G6F/G6E/G73

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G31/G30 /G52/G65/G6C/G69/G61/G62/G69/G6C/G69/G74/G79/G20/G74/G65/G73/G74/G20/G70/G72/G6F/G67/G72/G61/G6D Test item Method Description SOLDERABILITY MIL-STD-883D-2003 245°C , 5 SEC HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @ 125 °C PCT JESD-22-B, A102 168 Hrs, 100 % RH , 121°C TST MIL-STD-883D-1011.9 -65°C ~ 150°C, 200 Cycles ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V Latch-Up JESD 78 10ms , I tr > 100mA /G43/G61/G72/G72/G69/G65/G72/G20/G54/G61/G70/G65/G20/G26/G20/G52/G65/G65/G6C/G20/G44/G69/G6D/G65/G6E/G73/G69/G6F/G6E/G73 A J B C t Ao E W Po P Ko Bo D F Application A B D0 D1 E F P0 P1 P2 T T2 W W1 C1 C2 T1 T2 C SSOP-16 ( m m )

Copyright  ANPEC Electronics Corp. Rev. A. /G52/G65/G76/G2E/G41/G2E/G31 - Dec., 2001 APW7055 /G77/G77/G77/G2E/G61/G6E/G70/G65/G63/G2E/G63/G6F/G6D/G2E/G74/G77/G31/G31 /G43/G6F/G76/G65/G72/G20/G54/G61/G70/G65/G20/G44/G69/G6D/G65/G6E/G73/G69/G6F/G6E/G73 Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 /G43/G75/G73/G74/G6F/G6D/G65/G72/G20/G53/G65/G72/G76/G69/G63/G65 Application Carrier Width Cover Tape Width Devices Per Reel SOP- 16 24 21.3 1000 /G20