APL78L05-KC-TB

APL78L12 ANPEC | Alldatasheet

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Technical content

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw1 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Three-Terminal Low Current Positive Voltage Regulator

• •••• 3-Ternimal Regulators
• •••• Maximum Input Voltage : 30V
• •••• Output Voltages of 5V,12V
• •••• Output Current Up to 100mA
• •••• No External Components
• •••• Internal Thermal Overload Protection
• •••• Internal Short-Circuit Limiting
• •••• Output Voltage Offered in 4% tolerance
• •••• SOP-8, SOT-89 and TO-92 Packages. Features General Description Pin Description VIN GND VOUT TO-92 (Top View) This series of fixed-voltage monolithic integrated-cir- cuit voltage regulators is designed for a wide range of applications. These applications include on-card regulation for elimination of noise and distribution problems associated with single-point regulation. In addition, they can be used with power-pass elements to make high-current voltage regulators. Each of these regulators can deliver up to 100mA of output current. The internal limiting and ternal shutdown fea- tures of these regulators make them essentially im- mune to overload. When used as a replacement for a Zener diode-resistor combination, an effective im- provement in output impedance can be obtained to- gether with lower-bias current. SOP-8 (Top View) 4 5 8VOUT GND GND NC GND GND NC VIN

Applications

• Battery-Powered Circuitry
• Post Regulator for Switching Power Supply Ordering and Marking Information Package Code E : TO -92 K : S O P -8 D : S O T-89 Tem p. Range C : 0 to 70 C Handli ng Code TU : Tube TR : Tape & Reel PB : Pl asti c Bag TB : Tape & Box Lead Free Code L : Lead Free Device Blank : Origi nal Devi ce APL78L05/12 - Handli ng Code Tem p. Range Package Code APL78L05/12 D/K : APL78L05/12 XXXXX XXXXX - Date Code APL 78L05/12 XXXXX XXXXX - Date CodeAPL78L05/12 E : Lead Free Code VINGND 213 VOUT SOT-89 (Front View)

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw2 Symbol Parameter Rating Unit VIN Input Voltage 30 V DC TJ Operating Junction Temperature Range Control Section Power Transistor 0 to 125 0 to 150 TSTG Storage Temperature Range -65 to +150 °C θJA Thermal Resistance from Junction to Ambient in Free Air SOP-8 SOT-89/TO-92 160 180 °C/W Absolute Maximum Ratings

Electrical Characteristics

VIN=10V, IOUT=40mA, TJ=25°C, CIN=0.33µF, COUT=0.1µF, unless otherwise specified APL78L05Symbol Parameter Test Condition Min. Typ. Max. Unit VO Output Voltage 4.8 5.0 5.2 Vdc 1.0mA≤IOUT≤40mA 7.0Vdc≤VIN≤20VdcVO Output Voltage (0° to +125°C) VIN=10V, 1.0mA≤IOUT≤40mA 4.75 5 5.25 Vdc 7.0Vdc≤VIN≤20Vdc 29 150Regline Line Regulation 8.0Vdc≤VIN≤20Vdc 26 100 mV 1.0mA≤IOUT≤100mA 96 0Regload Load Regulation 1.0mA≤IOUT≤40mA 53 0 mV IB Quiescent Current 2.8 6.0 mA VIN-VO Dropout Voltage I OUT=100mA 1.9 Vdc APL78L12Symbol Parameter Test Condition Min. Typ. Max. Unit VO Output Voltage 11.5 12 12.5 Vdc 1.0mA≤IOUT≤40mA 14Vdc≤VIN≤27VdcVO Output Voltage (0° to +125°C) VIN=19V, 1.0mA≤IOUT≤40mA 11.4 12 12.6 Vdc Regline Line Regulation 14.5Vdc≤VIN≤27Vdc 250 mV 1.0mA≤IOUT≤100mA 100Regload Load Regulation 1.0mA≤IOUT≤40mA 50 mV IB Quiescent Current 6.5 mA 16Vdc≤VIN≤27Vdc 1.5∆ IB Quiescent Current Change 1.0mA ≤IOUT≤40mA mA VIN-VO Dropout Voltage I OUT=100mA 1.9 Vdc

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw3 Application Circuit V OUTAPL78L05/12 C OUT = 0.1 µ F V IN Ci n= 0.33 µ F Note1 : A common ground is required between the input and the output voltage. The input voltage must remain typically 2V above the output voltage even during the low point on the input ripple voltage. Note2 : Cin is required if regulator is located an appreciable distance from power supply filter. Note3 : C OUT is not needed for stability; however, it does improve transient response.

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw4 2.2 2.4 2.6 2.8 3.0 0 25 50 75 100 125 02468 1 0 APL78L05 APL78L05 0.5 1.5 2.5 3.5 0 5 10 15 20 25 30 35 1.25 1.5 1.75 2.25 02 5 5 0 7 5 1 0 0 1 2 5 Typical Characteristics Dropout Voltage vs. Junction Temperature Dropout of Regulation is defined as when IO=1mA Quiescent Current vs. Ambient Temperature Ambient Temperature (°C) Quiescent Current (mA) Quiescent Current (mA) Quiescent Current vs. Input Voltage Input Voltage (V) Output Voltage vs. Input Voltage Output Voltage (V) Input Voltage (V) IO=40mA IO=100mA Dropout Voltage (V) Junction Temperature (°C) IO=1mAIO=40mA IO=70mA VIN=10V IO=40mA No Load APL78L05 APL78L05

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw5 1.6 1.65 1.7 1.75 1.8 1.85 1.9 02 0 4 0 6 0 8 0 1 0 0 -80 -70 -60 -50 -40 -30 -20 -10 10 100k100 1k 10k 0.5 1.5 2.5 0 2 04 06 08 0 1 0 0 Typical Characteristics (Cont.) Dropout Voltage vs. Output Current Load-Transient Response Time (20µs/div) Quiescent Current vs. Output Current Quiescent Current (mA) Output Current (mA) Dropout Voltage (V) Output Current (mA) IOUT= 10mA~80mA VOUT(100mv/div) COUT=0.1µF PSRR vs. Frequency PSRR (dB) Frequency (Hz) VIN=10V IOUT=10mA APL78L05 APL78L05 APL78L05APL78L05 VIN=10V Dropout of Regulation is defined as when VOUT(100mv/div) COUT=0.1uF IOUT=10mA~80mA

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw6 0.01 0.1 0 2 04 06 08 0 1 0 0 4.995 5.005 5.01 5.015 5.02 0 25 50 75 100 125 100 300 500 700 900 1100 1300 25 50 75 100 125 150 Typical Characteristics (Cont.) Maximum Power Dissipation vs. Ambient Temperature TO-92 Type Package No Heat Sink Line Transient Response VIN=9.5V~10.5V COUT=0.1µF IOUT=10mA Time (100us/div) VOUT=10(mV/div) Maximum Power Dissipation (mW) Ambient Temperature (°C) APL78L05 APL78L05 Ambient Temperature (°C) Output Voltage(V) VIN=10V IO=40mA Output Voltage vs. Ambient Temperature Region of Stable ESR vs. Output Current Output Current(mA) COUTESR(Ω ) COUT=0.1uF Stable Region APL78L05 APL78L05 Untested

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw8 Packaging Information Millimeters InchesDim Min. Max. Min. Max. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 H 5.80 6.20 0.228 0.244 L 0.40 1.27 0.016 0.050 e1 0.33 0.51 0.013 0.020 e2 1.27BSC 0.50BSC φ 18 ° 8° HE e1 e2 0.015X45 D AA1 0.004max. L SOP-8 pin ( Reference JEDEC Registration MS-012)

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw9

Package Information

A b L SEATING PLANE e1eJ E S D S Millimeters Inches Dim Min. Max. Min. Max. A 4.58 5.33 0.170 0.210 φ b 0.41 0.53 0.160 0.021 φ b2 0.41 0.48 0.160 0.019 φ D 4.96 5.20 0.175 0.205 E 3.94 4.19 0.125 0.165 e 2.42 2.66 0.095 0.105 e1 1.15 1.39 0.045 0.055 J 3.43 0.135 L 12.70 0.500 L1 1.27 0.050 L2 6.35 0.250 Q 2.93 0.115 S 2.42 2.66 0.080 0.105 TO-92

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw10 SOT-89 (Reference EIAJ ED-7500A Reg stration SC-62) D e B 12 3 L H E C a a A Millimeters InchesDim Min. Max. Min. Max. A 1.40 1.60 0.055 0.063 B 0.40 0.56 0.016 0.022 B1 0.35 0.48 0.014 0.019 C 0.35 0.44 0.014 0.017 D 4.40 4.60 0.173 0.181 D1 1.35 1.83 0.053 0.072 e 1.50 BSC 0.059 BSC e1 3.00 BSC 0.118 BSC E 2.29 2.60 0.090 0.102 H 3.75 4.25 0.148 0.167 L 0.80 1.20 0.031 0.047 α 10 ° 10 °

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw11 t 25 C to Peak tp Ramp-up tL Ramp-down ts Preheat Tsmax Tsmin TL TP Temperature Time Critical Zone TL to T P Physical Specifications Terminal Material Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Lead Solderability Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. Reflow Condition (IR/Convection or VPR Reflow) Classificatin Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate (TL to TP) 3°C/second max. 3 °C/second max. Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: - Temperature (TL) - Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak/Classificatioon Temperature (Tp) See table 1 See table 2 Time within 5°C of actual Peak Temperature (tp) 10-30 seconds 20-40 seconds Ramp-down Rate 6°C/second max. 6 °C/second max. Time 25°C to Peak Temperature 6 minutes max. 8 minutes max. Notes: All temperatures refer to topside of the package .Measured on the body surface.

Copyright  ANPEC Electronics Corp. Table 2. Pb-free Process – Package Classification Reflow Temperatures including the stated classification temperature (this means Peak reflow temperature +0 °C. For example 260 °C+0 °C) at the rated MSL level. Table 1. SnPb Entectic Process – Package Peak Reflow Temperatures

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw13 Application A B C J T1 T2 W P E 330±16 2 ± 1.5 12.75 + F D D1 Po P1 Ao Bo Ko tSOP-8 ( m m ) H H1 W1 W H2H2AH2H2 T F1F2 P D L L1 M B2 B1 205 330 UNIT : mm Box Dimensions A J B C Carrier Tape & Reel Dimensions(Cont.)

Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 APL78L05/12 www.anpec.com.tw14 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Application A A1 A2 A3 B0 B1 B2 C0 C1 3.18~12 90±1 76 ±1 30 ±1 90 ±1 31 ±1 76 ±1 5.8 3.8 C2 H3 H4 L L1 P P1 P2 T T1 T2 T3 T4 W W1 W2 TO-92 ( m m ) Cover Tape Dimensions Application Carrier Width Cover Tape Width Devices Per Reel SOP- 8 12 9.3 2500 TO-92 17.5~19 5.0~7.0 2000 Carrier Tape & Reel Dimensions(Cont.)