APL3212A ANPEC | Alldatasheet

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Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 APL3212A/B/C www.anpec.com.tw1 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Li+ Charger Protection IC

  • Provide Input Over-Voltage Protection
  • Programmable Input Over-Current Protection
  • Battery Over-Voltage 4.35V/4.435V Protection
  • Over-Temperature Protection
  • High Immunity of False Triggering
  • High Accuracy Protection Thresholds
  • Fault Status Indication
  • Enable Input
  • Available in TDFN2x2-8 Package
  • Lead Free and Green Devices Available (RoHS Compliant) The APL3212A/B/C provide complete Li+ charger protec- tions against over-voltage, over-current, and battery over- voltage. The IC is designed to monitor input voltage, in- put current, and battery voltage. When any of the moni- tored parameters are over the threshold, the IC removes the power from the charging system by turning off an in- ternal switch. All protections also have deglitch time against false triggering due to voltage spikes or current transients. The APL3212A/B/C also provide over-tempera- ture protection, a FAULT output pin to indicate the fault conditions, and the EN pin to allow the system to disable the IC. Features General Description

Applications

  • Smart Phones and PDAs
  • Digital Still Cameras
  • Portable Devices Pin Configuration Simplified Application Circuit = Exposed Pad (connected to ground plane for better heat dissipation) TDFN2x2-8 (Top View) ACIN 1 BATSL 3

8 OUT

6 BAT

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw2 APL3212A/B/C Ordering and Marking Information Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings (Note 1) Symbol Parameter Rating Unit VACIN IN Input Voltage (ACIN in to GND) -0.3 to 30 V VOUT, VBAT OUT, BAT Pins to GND Voltage -0.3 to 7 V V LIM, VFAULT, VEN, VBATSL ILIM, FAULT, EN,BATSL to GND Voltage -0.3 to 7 V TJ Maximum Junction Temperature 150 oC TSTG Storage Temperature Range -65 to 150 o C TSDR Maximum Lead Soldering Temperature,10 Seconds 260 oC Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom- mended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. APL3212A/B/C Package Code QB : TDFN2x2-8 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device Handling Code Temperature Range Package Code APL3212A QB: X - Date Code Assembly Material L12A X APL3212B QB: X - Date CodeL12B X APL3212C QB: X - Date CodeL12C X Thermal Characteristics Symbol Parameter Typical Value Unit θ JA Junction to Ambient Thermal Resistance in Free Air (Note 2) TDFN2x2-8 °C/W Note 2 :θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air.

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw3 APL3212A/B/C Recommended Operating Conditions (Note3) Symbol Parameter Range Unit VACIN ACIN Input Voltage 4.5 to 5.5 V IOUT OUT Output Current 0 to 2 A TJ Junction Temperature -40 to 125 °C TA Ambient Temperature -40 to 85 °C Note 2 : Refer th the typical application circuit. APL3212A/B/C Symbol Parameter Test Conditions Min. Typ. Max. Unit ACIN INPUT CURRENT AND POWER-ON-RESET(POR) EN = Low - 250 350 IACIN ACIN Supply Current EN = High - 100 150 µA VACIN ACIN POR Threshold VIN rising 2.4 2.6 2.8 V ACIN POR Hysteresis 200 250 300 TB(ACIN) ACIN Power-On Blanking Time VIN rising to VOUT rising - 8 - ms INTERNAL SWITCH ON RESISTANCE RON Power Switch On Resistance IOUT = 0.8A - 130 - mΩ OUT Discharge Resistance VOUT = 3V - 500 - Ω INPUT OVER-VOLTAGE PROTECTION (OVP) APL3212A, TJ=-40~125oC 5.7 5.85 6.0 APL3212B, TJ=-40~125oC 6.6 6.8 7.0 VOVP Input OVP Threshold APL3212C TJ=-40~125oC 7.0 7.2 7.4 V Input OVP Hysteresis - 250 - mV Input OVP Propagation Delay VACIN=5 to 12V, IUT=10mA - 1 - µs TON(OVP) Input OVP Recovery Time - 8 - ms OVER-CURRENT PROTECTION (OCP) OCP Threshold ROCSET=25kΩ , TJ=25oC 900 1000 1100 mA IOCP OCP Accuracy IOCP=800mA~2500mA(or 1A~1.5A), IOCP(MAX) Maximum OCP Threshold ROCSET=0Ω , TJ=25oC - 3 - A TB(OCP) OCP Blanking Time - 176 - µs TON(OCP) OCP Recovery Time - 64 - ms Refer to the typical application circuit. These specifications apply over V IN=5V, TA= -40~85°C, unless otherwise specified. Typical values are at TJ=25°C.

Electrical Characteristics

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw4 APL3212A/B/C Refer to the typical application circuit. These specifications apply over V IN=5V, TA= -40~85°C, unless otherwise specified. Typical values are at TA=25°C. Symbol Parameter Test Conditions Min. Typ. Max. Unit BATTERY OVER-VOLTAGE PROTECTION BATSL = Low or Floating, TJ = -40 ~ 125oC 4.4 4.435 4.47 V VBOVP Battery OVP Threshold BATSL = High, TJ = -40 ~ 125oC 4.30 4.35 4.40 V Battery OVP Hysteresis 200 250 300 mV IBAT BAT Pin Leakage Current VBAT = 4.4V - - 20 nA TB(BOVP) Battery OVP Blanking Time - 176 - µs BATSL LOGIC LEVELS BATSL Input Logic High 1.4 - - V VBATSL BATSL Input Logic Low - - 0.4 V IBATSL BATSL Input Current VBATSL = 3.3V - 1.5 - µA EN LOGIC LEVELS EN Input Logic High 1.4 - - V VEN EN Input Logic Low - - 0.4 V EN Internal Pull-Low Resistor - 500 - kΩ FAULT LOGIC LEVELS AND DELAY TIME VFAULT FAULT Output Low Voltage Sink 5mA current - - 0.4 V FAULT Leakage Current VFAULT = 5V - - 1 µA Thermal Shutdown Protection TOTP Thermal Shutdown Threshold - 140 - °C Thermal Shutdown Hysteresis - 20 - °C

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw5 APL3212A/B/C Typical Operating Characteristics Input OVP Threshold vs. Junction Temperature Input OVP Threshold,VOVP (V) Junction Temperature (oC) 6.2 6.3 6.4 6.5 6.6 6.7 6.8 -40 0 40 80 120 VIN Decreasing VIN Increasing Battery OVP Threshold vs. Junction Temperature Battery OVP Threshold,VBOVP (V) Junction Temperature (oC) 4.1 4.2 4.3 4.4 4.5 4.6 -40 0 40 80 120 BATSL=Low VBAT Decreasing VBAT Increasing Battery OVP Threshold vs. Junction Temperature Battery OVP Threshold,VBOVP (V) Junction Temperature (oC) 3.9 4.1 4.2 4.3 4.4 4.5 -40 0 40 80 120 BATSL=High VBAT Decreasing VBAT Increasing IN Supply Current vs. Junction Temperature IN Supply Current,ICC (µA) Junction Temperature (oC) 180 200 220 240 260 280 -40 0 40 80 120 POR Threshold vs. Junction Temperature Junction Temperature (oC) POR Threshold,VPOR (V) 2.1 2.2 2.3 2.4 2.5 2.6 -40 0 40 80 120 VIN Decreasing VIN Increasing OCP Threshold vs. Junction Temperature OCP Threshold,IOCP (A) Junction Temperature (oC) 0.5 0.7 0.9 1.1 1.3 1.5 -40 0 40 80 120

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw6 APL3212A/B/C Typical Operating Characteristics Power Switch On Resistance vs. Junction Temperature Power Switch On Resistance,RDS,ON(mΩ ) Junction Temperature (oC) 100 150 200 250 300 -40 0 40 80 120 Power Switch On Resistance,RDS,ON(mΩ ) Power Switch On Resistance vs. Input Voltage Input Voltage (V) IOUT=0.5A 100 150 200 250 300 2.5 3 3.5 4 4.5 5 5.5

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw7 APL3212A/B/C Operating Waveforms Normal Power On VIN=0 to 5V COUT=1µF,CIN=1µF,ROUT=10Ω CH1:VIN,5V/Div, DC CH2:VOUT,2V/Div, DC CH3:IOUT,0.5A/Div, DC TIME:2ms/Div VIN VOUT IOUT OVP at Power On VIN=0 to 7V COUT=1µF,CIN=1µF,ROUT=10Ω CH1:VIN,5V/Div, DC CH2:VOUT,2V/Div, DC CH3:VFAULT,5V/Div, DC TIME:2ms/Div VFAULT VIN VOUT Input Over-Voltage Protection VIN=5 to 7V COUT=1µF,CIN=1µF,ROUT=50Ω CH1:VIN ,5V/Div, DC CH2:VOUT,2V/Div, DC CH3:VFAULT ,5V/Div, DC TIME:20µs/Div VFAULT VIN VOUT Recovery from Input OVP VIN=7V to 5V COUT=1µF,CIN=1µF,ROUT=50Ω CH1:VIN,5V/Div, DC CH2:VOUT,5V/Div, DC CH3:VFAULT,5V/Div, DC TIME:2ms/Div VFAULT VIN VOUT

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw8 APL3212A/B/C Operating Waveforms Battery Over-Voltage Protection VBAT=3.6V to 4.4V to 3.6V COUT=1µF,CIN=1µF,ROUT=33Ω CH1:VBAT,2V/Div, DC CH2:VOUT,2V/Div, DC CH3:VFAULT,5V/Div, DC TIME:10ms/Div VFAULT VBAT VOUT Battery Over-Voltage Protection VBAT=3.6V to 4.4V COUT=1µF,CIN=1µF,ROUT=33Ω CH1:VBAT,2V/Div, DC CH2:VOUT,2V/Div, DC CH3:VFAULT ,5V/Div, DC TIME:40µs/Div VFAULT VBAT VOUT Recovery from Battery OVP VBAT=4.4V to 3.6V COUT=1µF,CIN=1µF,ROUT=33Ω CH1:VBAT,2V/Div, DC CH2:VOUT,2V/Div, DC CH3:VFAULT,5V/Div, DC TIME:100µs/Div VFAULT VBAT VOUT Over-Current Protection COUT=1µF,CIN=1µF CH1:IOUT,0.5A/Div, DC CH2:VOUT,5V/Div, DC CH3:VFAULT ,5V/Div, DC TIME:100µs/Div VFAULT IOUT VOUT

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw9 APL3212A/B/C PIN NO. NAME FUNCTION 1 ACIN Power Supply Input, connect to external DC supply. Connect external 1µF ceramic capacitor (minimum) to GND. 2 GND Ground pin of the circuitry. All voltage levels are measured with respect to this pin.

3 BATSL

Battery OVP threshold selection: VBATSL = High, VBOVP = 4.30V ~ 4.4V. VBATSL = Low, VBOVP = 4.4V ~ 4.47V. 4 FAULT Fault Indication Pin. This pin goes low when input OVP, OCP or battery OVP is detected. 5 EN Enable Input. Pull this pin to high to disable the device and pull this pin to low to enable device. 6 BAT Battery OVP Sense Pin. Connect to positive terminal of battery through a resistor. 7 ILIM Over-current Protection Setting Pin. Connect a resistor (ROCSET) to GND to set the over-current threshold. When left open, the internal power FET will be turned off. 8 OUT Output Pins. Output Voltage Pin. The output voltage follows the input voltage when no fault is detected Exposed Pad - Exposed Thermal Pad. Connect this pad to system ground plane for good thermal conductivity. Pin Description Block Diagram Gate Driver and Control Logic POR ACIN BAT ILIM OUT OTP Charge Pump FAULT EN GND 0.5V 1.2V BATSL 0.8V BAT OVP ACIN OVP OCP Battery OVP Threshold Selection

Copyright  ANPEC Electronics Corp. Figure 1. The Typical Protection Circuit for Charger Systems.

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw11 APL3212A/B/C The output current is monitored by the internal OCP circuit. When the output current reaches the OCP threshold, the device limits the output current at OCP threshold level. If the OCP condition continues for a blanking time of TB(OCP), the internal power FET is turned off. After the recovery time of TON(OCP), the FET will be turned on again and the output current is monitored again. The OCP threshold is programmed by a resistor R ILIM connected from ILIM pin to GND. The OCP threshold is calculated by the following equation: The APL3212A/B/C provide an open-drain output to indi- cate that a fault has occurred. When any of input OVP, OCP, battery OVP, is detected, the FAULT goes low to indicate that a fault has occurred. Since the FAULT pin is an open-drain output, connecting a resistor to a pull high voltage is necessary. Enable/Shutdown Pull the EN pin voltage above 1.4V to disable the device and pull EN pin voltage below 0.4V to enable the device. The EN pin has an internal pull-down resistor and can be left floating. When the IC is latched off due to the total count of OCP or battery OVP reaches 16, disable and re- enable the device with the EN pin can clear the counter. Over-Temperature Protection When the junction temperature exceeds 140ο C, the inter- nal thermal sense circuit turns off the power FET and allows the device to cool down. When the device’s junc- tion temperature cools by 20ο C, the internal thermal sense circuit will enable the device, resulting in a pulsed output during continuous thermal protection. Thermal protec- tion is designed to protect the IC in the event of over tem- perature conditions. For normal operation, the junction temperature cannot exceed T J=+125 ο C. The APL3212A/B/C monitor the BAT pin voltage for battery over-voltage protection. The battery OVP threshold is in- ternally set to 4.35V. When the BAT pin voltage exceeds the battery OVP threshold for a blanking time of T B(BOVP), Battery Over-Voltage Protection Function Description ACIN Power-On-Reset (POR) The APL3212A/B/C have a built-in power-on-reset circuit to keep the output shutting off until internal circuitry is operating properly. The POR circuit has hysteresis and a de-glitch feature so that it will typically ignore undershoot transients on the input. When input voltage exceeds the POR threshold and after 8ms blanking time, the output voltage starts a soft-start to reduce the inrush current. ILIM ILIM OCP R KI = Over-Current Protection (OCP) Input Over-Voltage Protection (OVP) The input voltage is monitored by the internal OVP circuit. When the input voltage rises above the input OVP threshold, the internal FET will be turned off within 1µs to protect connected system on OUT pin. When the input voltage returns below the input OVP threshold minus the hysteresis, the FET is turned on again after 8ms recovery time. The input OVP circuit has a 250mV hysteresis and a recovery time of T ON(OVP) to provide noise immunity against transient conditions.(see Figure 2.) the internal power FET is turned off. When the BP voltage returns below the battery OVP threshold minus the hysteresis, the FET is turned on again. The APL3212A/B/ C have a built-in counter. When the total count of battery OVP fault reaches 16, the FET is turned off permanently, requiring either a VIN POR or EN re-enable again to restart. FAULT Output where KILIM=25000AΩ ESD Tests The APL3212A/B/C VIN input pin fully supports the IEC61000-4-2. That means the VIN pin has immunity of +15kV ESD discharge in Air condition, and immunity of +8kV ESD discharge in Contact condition.

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw12 APL3212A/B/C Function Description (Cont.) Powering an Accessory Device In some applications, such as USB On-The-Go, users need to power an accessory device by using the portable device’s battery through the jack holes of AC adapter. The APL3212A/B/C provide reverse current flow path from OUT to IN. If VOUT > VPOR + 0.7V, FET Q1 is turned on, and the reverse current does not flow through the diode but through Q1. Q1 will then remain ON as long as V OUT > VPOR-VPOR_HYS + RDS_ON*ISUPPLY. Within this voltage range, the reverse current capability is the same as the forward capability, 1.5A. It should be noted that there is no overcurrent protection in this direction. APL 3212 Charger Battery Accessory Power Supply to system Enable Disable JackAccessory Device Portable Device IN OUT Gate Driver and Logic Control ISUPPLY VOUT

Copyright  ANPEC Electronics Corp. Figure 4. Battery OVP Timing Chart

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw15 APL3212A/B/C

Application Information

Connect the BAT pin to the positive terminal of battery through a resistor RBAT for battery OVP function. The RBAT limits the current flowing from BAT to battery in case of BAT pin is shortened to VIN pin under a failure mode. The recommended value of RBAT is 100kΩ . In the worse case of an IC failure, the current flowing from the BAT pin to the battery is: (30V-3V)/ 100kΩ =270µA where the 30V is the maximum IN voltage and the 3V is the minimum battery voltage. The current is so small and can be absorbed by the charger system. The disadvantage with the large R BAT is that the error of the battery OVP threshold will be increased. The addi- tional error is the voltage drop across the R BAT because of the BAT bias current. When R BAT is 100kΩ, the worse- case additional error is 100k Ω x20nA=2mV, which is ac- ceptable in most applications. REN Selection Since the IO voltage is divided by REN and EN internal pull low resistor for EN voltage. It has to be ensured that the EN voltage is above the EN logic high voltage when the GPIO output of the MCU is high. FAULT Output Since the FAULT pin is an open-drain output, connecting a resistor RUP to a pull high voltage is necessary. It is also recommended that connect the FAULT to the MCU GPIO through a resistor R FAULT. The RFAULT prevents damage to the MCU under a failure mode. The recommended value of the resistors should be between 10k Ω to 100k Ω . Capacitor Selection The input capacitor is for decoupling and prevents the input voltage from overshooting to dangerous levels. In the AC adapter hot plug-in applications or load current step-down transient, the input voltage has a transient spike due to the parasitic inductance of the input cable. A 25V, X5R, dielectric ceramic capacitor with a value be- tween 1 µF and 4.7 µF placed close to the IN pin is recommended. The output capacitor is for output voltage decoupling, and also can be as the input capacitor of the charging circuit. At least, a 1µF, 10V, X5R capacitor is recommended. For the same reason as the BAT pin case, the EN pin should be connected to the MCU GPIO pin through a resistor. The value of the R EN is dependent on the IO voltage of the MCU. In some failure modes, a high voltage may be applied to the device. Make sure the clearance constraint of the PCB layout must satisfy the design rule for high voltage. The exposed pad of the TDFN2x2-8 performs the func- tion of channeling heat away. It is recommended that connect the exposed pad to a large copper ground plane on the backside of the circuit board through several ther- mal vias to improve heat dissipation. The input and output capacitors should be placed close to the IC. RILIM also should be placed close to the IC. The high current traces like input trace and output trace must be wide and short. Layout Consideration BAT Li+ Battery EN FAULT MCU RUP RFAULT REN RBAT VIO GPIO GPIO Figure 5. RUP, RFAULT, REN and RBAT

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw16 APL3212A/B/C

Package Information

MIN. MAX. 0.80 0.00 0.18 0.30 1.00 1.60 0.05 0.60 A b D E e L MILLIMETERS A3 0.20 REF TDFN2x2-8 0.30 0.45 1.00

0.008 REF

MIN. MAX. INCHES 0.031 0.000 0.007 0.012 0.039 0.063 0.024 0.012 0.018 0.70 0.039 0.028 0.002 0.50 BSC 0.020 BSC SYMBOL 1.90 2.10 0.075 0.083 1.90 2.10 0.075 0.083 D E A b E2L e Pin 1 Corner

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw17 APL3212A/B/C Package Type Unit Quantity TDFN2x2-8 Tape & Reel 3000 Carrier Tape & Reel Dimensions Application A H T1 C d D W E1 F -0.00 13.0+0.50 -0.20 P0 P1 P2 D0 D1 T A0 B0 K0 TDFN2x2-8 (mm) H A d A AB W F T P0OD0 B SECTION B-B SECTION A-A OD1 Devices Per Unit

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw18 APL3212A/B/C Taping Direction Information Classification Profile TDFN2x2-8 USER DIRECTION OF FEED

Copyright  ANPEC Electronics Corp. (Tsmax to TP) 3 °C/second max. 3°C/second max. Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. Time 25°C to peak temperature 6 minutes max. 8 minutes max.

  • Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.

** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 2. Pb-free Process – Classification Temperatures (Tc) Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)

Copyright  ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 www.anpec.com.tw20 APL3212A/B/C Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838