APL3204A ANPEC | Alldatasheet
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Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 APL3204A/B www.anpec.com.tw1 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Li+ Charger Protection IC
- Input Over-Voltage Protection
- Programmable Input Over-Current Protection
- Battery Over-Voltage Protection
- Over-Temperature Protection
- High Immunity of False Triggering
- High Accuracy Protection Thresholds
- Fault Status Indication
- Enable Input
- Available in TDFN4x3-12 Package
- Lead Free and Green Devices Available (RoHS Compliant) The APL3204A/B provide complete Li+ charger protec- tions against over-voltage, over-current, and battery over- voltage. The IC is designed to monitor input voltage, in- put current, and battery voltage. When any of the moni- tored parameters are over the threshold, the IC removes the power from the charging system by turning off an in- ternal switch. All protections also have deglitch time against false triggering due to voltage spikes or current transients. The APL3204A/B also provide over-tempera- ture protection, a FAULT output pin to indicate the fault conditions, and the EN pin to allow the system to disable the IC. Features General Description
Applications
- Smart Phones and PDAs
- Digital Still Cameras
- Potable Devices Pin Configuration Simplified Application Circuit IN ILIM OUT BAT GND APL3204A/B Li+ Battery EN FAULT 5V Adapter or USB Charger Input Charger Output and System GND 3 10 OUT IN 1 IN 2 NC 5
9 ILIM
8 BAT
TDFN4X3-12 (Top View) EP FAULT 4 NC 6
11 OUT
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw2 APL3204A/B Ordering and Marking Information Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD- 020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings (Note 1) Symbol Parameter Rating Unit VIN IN Input Voltage (IN Pin to GND) -0.3 to 30 V VOUT, VBAT OUT, BAT Pins to GND Voltage -0.3 to 7 V VILIM, VFAULT, VEN, ILIM, FAULT, EN, Pins to GND Voltage -0.3 to 7 V IOUT OUT Output Current 2 A TJ Maximum Junction Temperature 150 oC TSTG Storage Temperature Range -65 to 150 oC TSDR Maximum Lead Soldering Temperature,10 Seconds 260 oC Note 1 : Stresses beyond the absolute maximum rating may damage the device and exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol Parameter Typical Value Unit θ JA Junction to Ambient Thermal Resistance in Free Air TDFN4x3-12 °C/W Recommended Operating Conditions Symbol Parameter Range Unit VIN IN Input Voltage 4.5 to 5.5 V IOUT OUT Output Current 0 to 1.5 A TJ Junction Temperature -40 to 125 °C TA Ambient Temperature -40 to 85 °C Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel L : Lead Free Device Handling Code Temperature Range Package Code APL3204A QB: XXXXX - Date Code Assembly Material L04A XXXXX Assembly Material G : Halogen and Lead Free Device QB : TDFN4x3-12APL3204B APL3204B QB: XXXXX - Date CodeL04B XXXXX
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw3 APL3204A/B APL3204A/B Symbol Parameter Test Conditions Min. Typ. Max. Unit POWER-ON-RESET (POR) AND SUPPLY CURRENT VPOR IN POR Threshold VIN rising 2.5 - 2.8 V IN POR Hysteresis - 230 - mV EN = Low - 250 350 ICC IN Supply Current EN = High - 100 150 µA TB(IN) Input Power-On Blanking Time VIN rising to VOUT rising - 8 - ms INTERNAL POWER SWITCH AND OUT DISCHARGE RESISTANCE Power Switch On Resistance IOUT = 0.5A - 250 450 mΩ OUT Discharge Resistance VOUT = 3V - 500 - Ω INPUT OVER-VOLTAGE PROTECTION (OVP) APL3204A, VIN rising 5.67 5.85 6.00 VOVP Input OVP Threshold APL3204B, VIN rising 6.60 6.80 7.00 V Input OVP Recovery Hysteresis - 200 - mV Input OVP Propagation Delay - - 1 µs TON(OVP) Input OVP Recovery Time - 8 - ms OVER-CURRENT PROTECTION (OCP) IOCP OCP Threshold RILIM = 25kΩ 930 1000 1070 mA OCP Threshold Accuracy IOCP = 300mA to 1500mA -10 - +10 % TB(OCP) OCP Blanking Time - 176 - µs TON(OCP) OCP Recovery Time - 64 - ms BATTERY OVER-VOLTAGE PROTECTION VBOVP Battery OVP Threshold VBAT rising 4.30 4.35 4.4 V Battery OVP Hysteresis - 270 - mV IBAT BAT Pin Leakage Current VBAT = 4.4V - - 20 nA TB(BOVP) Battery OVP Blanking Time - 176 - µs EN LOGIC LEVELS EN Input Logic High 1.4 - - V EN Input Logic Low - - 0.4 V EN Internal Pull-Low Resistor - 500 - kΩ FAULT LOGIC LEVELS AND DELAY TIME FAULT Output Low Voltage Sink 5mA current - - 0.4 V FAULT Pin Leakage Current VFAULT = 5V - - 1 µA OVER-TEMPERATURE PROTECTION (OTP) TOTP Over-Temperature Threshold - 140 - °C Over-Temperature Hysteresis - 20 - °C Refer to the typical application circuit. These specifications apply over V IN=5V, TA= -40~85°C, unless otherwise specified. Typical values are at TA=25°C.
Electrical Characteristics
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw4 APL3204A/B Typical Operating Characteristics Battery OVP Threshold vs. Junction Temperature Battery OVP Threshold, VBOVP (V) Junction Temperature (oC) -50 -25 0 25 50 75 100 125 4.00 4.05 4.10 4.15 4.20 4.25 4.30 4.35 4.40 VBAT Increasing VBAT Decreasing OCP Threshold, IOCP (mA) Junction Temperature (oC) OCP Threshold vs. Junction Temperature -50 -25 0 25 50 75 100 125 800 850 900 950 1000 1050 1100 1150 1200 IN Supply Current vs. Junction Temperature IN Supply Current, ICC (µΑ ) Junction Temperature (oC) EN = high 100 125 150 -50 -25 0 25 50 75 100 125 POR Threshold, VPOR (V) POR Threshold vs. Junction Temperature Junction Temperature (oC) -50 -25 0 25 50 75 100 125 2.20 2.30 2.40 2.50 2.60 2.70 2.80 VIN Increasing VIN Decreasing )oC Input OVP Threshold , VOVP (V) Junction Temperature ( Input OVP Threshold vs. Junction Temperature -50 -25 0 25 50 75 100 125 5.55 5.60 5.65 5.70 5.75 5.80 5.85 5.90 5.95 6.00 VIN Increasing VIN Decreasing APL3204A Input OVP Threshold , VOVP (V) Junction Temperature ( )oC Input OVP Threshold vs. Junction Temperature -50 -25 0 25 50 75 100 125 VIN Increasing VIN Decreasing 6.50 6.55 6.60 6.65 6.70 6.75 6.80 6.85 6.90 6.95 7.00 APL3204B
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw5 APL3204A/B Typical Operating Characteristics (Cont.) Power Switch On Resistance, RDS,ON (Ω ) Input Voltage, VIN (V) Power Switch On Resistance vs. Input Voltage 0.10 0.15 0.20 0.25 0.30 0.35 Power Switch On Resistance vs. Junction Temperature 150 200 250 300 350 400 Junction Temperature (oC) -50 -25 0 25 50 75 100 125 Power Switch On Resistance, RDS,ON (mΩ )
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw6 APL3204A/B Operating Waveforms Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Normal Power On VIN VOUT CH1: VIN, 5V/Div, DC CH2: VOUT, 2V/Div, DC TIME: 2ms/Div COUT =1µF, CIN =1µF, ROUT = 10Ω CH3: IOUT, 0.5A/Div, DC IOUT VIN = 0 to 5V OVP at Power On VIN VOUT CH1: VIN, 10V/Div, DC CH2: VOUT, 2V/Div, DC COUT =1µF, CIN =1µF, ROUT = 10Ω CH3: VFAULT, 5V/Div, DC TIME: 2ms/Div VFAULT VIN = 0 to 12V CH1: VIN, 5V/Div, AC CH2: VOUT, 2V/Div, DC TIME:20µs/Div COUT = 1µF, CIN=1µF, ROUT=50Ω Input Over-Voltage Pretection VOUT VIN VIN = 5V to 12V VFAULT CH3: VFAULT, 5V/Div, DC APL3204B CH1: VIN, 5V/Div, AC CH2: VOUT, 2V/Div, DC TIME: 20µs/Div COUT = 1µF, CIN=1µF, ROUT=50Ω Input Over-Voltage Pretection VOUT VIN VFAULT CH3: VFAULT, 5V/Div, DC APL3204A
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw7 APL3204A/B Operating Waveforms (Cont.) Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Recovery from Input OVP VOUT VIN VFAULT CH1: VIN, 5V/Div, AC CH2: VOUT, 5V/Div, DC TIME: 2ms/Div COUT = 1µF, CIN=1µF, ROUT=50Ω VIN = 12V to 5V CH3: VFAULT, 5V/Div, DC APL3204B Battery Over-Voltage Pretection VBAT VOUT VFAULT CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC TIME: 5ms/Div VBAT = 3.6V to 4.4V to 3.6V, ROUT=33.3Ω CH3: VFAULT, 5V/Div, DC COUT =1µF, CIN =1µF CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC TIME: 50µs/Div VBAT = 3.6V to 4.4V, ROUT=33.3Ω COUT =1µF, CIN =1µF Battery Over-Voltage Pretection VBAT VOUT VFAULT CH3: VFAULT, 5V/Div, DC Recovery from Battery OVP CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC TIME: 50µs/Div VBAT = 4.4V to 3.6V, ROUT=33.3Ω COUT =1µF, CIN =1µF CH3: VFAULT, 5V/Div, DC VBAT VOUT VFAULT
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw8 APL3204A/B Operating Waveforms (Cont.) Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. CH1: IOUT, 0.5A/Div, DC CH2: VOUT, 2V/Div, DC TIME: 50µs/Div COUT =1µF, CIN =1µF, IOUT = 0.5A to 1.2A Over-Current Pretection IOUT VOUT VFAULT CH3: VFAULT, 5V/Div, DC Over-Current Pretection CH1: VIN, 5V/Div, DC CH2: VOUT, 5V/Div, DC TIME: 200ms/Div COUT =1µF, CIN =1µF, ROUT = 2.5Ω CH3: IOUT, 0.5A/Div, DC CH4: VFAULT, 5V/Div, DC IOUT VIN VOUT VFAULT
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw9 APL3204A/B PIN NO. NAME FUNCTION 1,2 IN Power Supply Input. 3 GND Ground. 5,6,12 NC No Connection. FAULT Fault Indication Pin. This pin goes low when input OVP, OCP, or battery OVP is detected. EN Enable Input. Pull this pin to high to disable the device and pull this pin to low to enable device. 8 BAT Battery OVP Sense Pin. Connect to positive terminal of battery through a resistor. 9 ILIM Over-current Protection Setting Pin. Connect a resistor to GND to set the over-current threshold. 10,11 OUT Output Voltage Pin. The output voltage follows the input voltage when no fault is detected. - EP Exposed Thermal Pad. Must be electrically connected to the GND pin. Pin Description Block Diagram Gate Driver and Control Logic POR IN BAT ILIM OUT OTP Charge Pump FAULT EN GND 0.5V 1.2V
Copyright ANPEC Electronics Corp. Figure 1. The Typical Protection Circuit for Charger Systems.
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw11 APL3204A/B Enable/Shutdown Pull the EN pin voltage above 1.4V to disable the device and pull EN pin voltage below 0.4V to enable the device. The EN pin has an internal pull-down resistor and can be left floating. When the IC is latched off due to the total count of OCP or battery OVP reaches 16, disable and re- enable the device with the EN pin can clear the counter. Over-Temperature Protection When the junction temperature exceeds 140ο C, the inter- nal thermal sense circuit turns off the power FET and allows the device to cool down. When the device’s junc- tion temperature cools by 20ο C, the internal thermal sense circuit will enable the device, resulting in a pulsed output during continuous thermal protection. Thermal protec- tion is designed to protect the IC in the event of over tem- perature conditions. For normal operation, the junction temperature cannot exceed T J=+125 ο C. The APL3204A/B monitor the BAT pin voltage for battery over-voltage protection. The battery OVP threshold is in- ternally set to 4.35V. When the BAT pin voltage exceeds the battery OVP threshold for a blanking time of T B(BOVP), Battery Over-Voltage-Protection Function Description Power-Up The APL3204A/B have a built-in power-on-reset circuit to keep the output shuting off until internal circuitry is oper- ating properly. The POR circuit has hysteresis and a de- glitch feature so that it will typically ignore undershoot transients on the input. When input voltage exceeds the POR threshold and after 8ms blanking time, the output voltage starts a soft-start to reduce the inrush current. ILIM ILIM OCP R KI = Over-Current Protection (OCP) The output current is monitored by the internal OCP circuit. When the output current reaches the OCP threshold, the device limits the output current at OCP threshold level. If the OCP condition continues for a blanking time of TB(OCP), the internal power FET is turned off. After the recovery time of TON(OCP), the FET will be turned on again and the output current is monitored again. The APL3204A/B have a built-in counter. When the total count of OCP fault reaches 16, the FET is turned off permanently, requiring either a V IN POR or EN re-enable again to restart. The OCP threshold is programmed by a resistor R ILIM con- nected from ILIM pin to GND. The OCP threshold is cal- culated by the following equation: Input Over-Voltage Protection (OVP) The input voltage is monitored by the internal OVP circuit. When the input voltage rises above the input OVP threshold, the internal FET will be turned off within 1µs to protect connected system on OUT pin. When the input voltage returns below the input OVP threshold minus the hysteresis, the FET is turned on again after 8ms recovery time. The input OVP circuit has a 200mV hysteresis and a recovery time of T ON(OVP) to provide noise immunity against transient conditions. the internal power FET is turned off. When the BP voltage returns below the battery OVP threshold minus the hysteresis, the FET is turned on again. The APL3204A/B have a built-in counter. When the total count of battery OVP fault reaches 16, the FET is turned off permanently, requiring either a VIN POR or EN re-enable again to restart. FAULT Output The APL3204A/B provide an open-drain output to indi- cate that a fault has occurred. When any of input OVP, OCP, battery OVP, is detected, the FAULT goes low to indicate that a fault has occurred. Since the FAULT pin is an open-drain output, connecting a resistor to a pull high voltage is necessary. where KILIM=25000AΩ
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw12 APL3204A/B Function Description (Cont.) Figure 3 OCP Timing Chart IOUT VOUT VFAULT TB(OCP) TON(OCP) TB(OCP) Count 13 times Total count 16 times IC is latched off OCP Threshold TB(OCP) Figure2. OVP Timing Chart TB(IN) VIN VOUT TON(OVP) VOVP VPOR VFAULT
Copyright ANPEC Electronics Corp. Figure 4. Battery OVP Timing Chart
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw14 APL3204A/B
Application Information
Connect the BAT pin to the positive terminal of battery through a resistor RBAT for battery OVP function. The RBAT limits the current flowing from BAT to battery in case of BAT pin is shorted to VIN pin under a failure mode. The recommended value of RBAT is 100kΩ . In the worse case of an IC failure, the current flowing from the BAT pin to the battery is: (30V-3V)/ 100kΩ =270µA where the 30V is the maximum IN voltage and the 3V is the minimum battery voltage. The current is so small and can be absorbed by the charger system. The disadvantage with the large R BAT is that the error of the battery OVP threshold will be increased. The addi- tional error is the voltage drop across the R BAT because of the BAT bias current. When R BAT is 100kΩ, the worse- case additional error is 100k Ω x20nA=2mV, which is ac- ceptable in most applications. REN Selection Since the IO voltage is divided by REN and EN internal pull low resistor for EN voltage. It has to be ensured that the EN voltage is above the EN logic high voltage when the GPIO output of the MCU is high. FAULT Output Since the FAULT pin is an open-drain output, connecting a resistor RUP to a pull high voltage is necessary. It is also recommended that connect the FAULT to the MCU GPIO through a resistor R FAULT. The RFAULT prevents damage to the MCU under a failure mode. The recommended value of the resistors should be between 10k Ω to 100k Ω . Capacitor Selection The input capacitor is for decoupling and prevents the input voltage from overshooting to dangerous levels. In the AC adapter hot plug-in applications or load current step-down transient, the input voltage has a transient spike due to the parasitic inductance of the input cable. A 25V, X5R, dielectric ceramic capacitor with a value be- tween 1 µF and 4.7 µF placed close to the IN pin is recommended. The output capacitor is for output voltage decoupling, and also can be as the input capacitor of the charging circuit. At least, a 1µF, 10V, X5R capacitor is recommended. For the same reason as the BAT pin case, the EN pin should be connected to the MCU GPIO pin through a resistor. The value of the R EN is dependent on the IO voltage of the MCU. In some failure modes, a high voltage may be applied to the device. Make sure the clearance constraint of the PCB layout must satisfy the design rule for high voltage. The exposed pad of the TDFN4x3-12 performs the func- tion of channeling heat away. It is recommended that connect the exposed pad to a large copper ground plane on the backside of the circuit board through several ther- mal vias to improve heat dissipation. The input and output capacitors should be placed close to the IC. RILIM also should be placed close to the IC. The high current traces like input trace and output trace must be wide and short. Layout Consideration BAT Li+ Battery EN FAULT MCU RUP RFAULT REN RBAT VIO GPIO GPIO Figure 5. RUP, RFAULT, REN and RBAT
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw15 APL3204A/B
Package Information
Note : Follow JEDEC MO-229 WGED-4. E D A b e L Pin 1 Corner S Y M B O L MIN. MAX. 0.80 0.00 0.18 0.30 3.00 3.70 0.05 1.40 A b D E e L MILLIMETERS A3 0.20 REF 0.30 0.50 1.80
0.008 REF
MIN. MAX. INCHES 0.031 0.000 0.007 0.012 0.118 0.146 0.055 0.012 0.020 0.70 0.071 0.028 0.002 4.00 BSC 0.157 BSC 3.00 BSC 0.118 BSC 0.50 BSC 0.020 BSC 0.20 0.008K TDFN4x3-12
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw16 APL3204A/B Devices Per Unit Package Type Unit Quantity TDFN4x3-12 Tape & Reel 3000 Carrier Tape & Reel Dimensions Application A H T1 C d D W E1 F -0.00 13.0+0.50 -0.20 P0 P1 P2 D0 D1 T A0 B0 K0 TDFN3x4-12 (mm) H A d A AB W F T P0OD0 B SECTION B-B SECTION A-A OD1
Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 www.anpec.com.tw17 APL3204A/B Test item Method Description SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125°C PCT JESD-22-B,A102 168 Hrs, 100%RH, 121°C TST MIL-STD-883D-1011.9 -65°C~150°C, 200 Cycles ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V Latch-Up JESD 78 10ms, 1tr > 100mA Reflow Condition (IR/Convection or VPR Reflow) Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate (TL to TP) 3°C/second max. 3°C/second max. Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: - Temperature (TL) - Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak/Classification Temperature (Tp) See table 1 See table 2 Time within 5°C of actual Peak Temperature (tp) 10-30 seconds 20-40 seconds Ramp-down Rate 6°C/second max. 6°C/second max. Time 25°C to Peak Temperature 6 minutes max. 8 minutes max. Note: All temperatures refer to topside of the package. Measured on the body surface. t 25 C to Peak tp Ramp-up tL Ramp-down ts Preheat Tsmax Tsmin TL TP Temperature Time Critical Zone TL to TP Reliability Test Program
Copyright ANPEC Electronics Corp. Table 2. Pb-free Process – Package Classification Reflow Temperatures Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures