APA2068

APA2068 ANPEC | Alldatasheet

Document overview

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• PDF pages: 27

Technical content

Features

• Low Operating Current with 9mA
• Improved Depop Circuitry to Eliminate Turn-on and Turn-off Transients in Outputs
• High PSRR
• 32 Steps Volume Adjustable by DC Voltage with Hysteresis
• 2.6W per Channel Output Power into 4Ω Load at 5V,BTL Mode
• Two Output Modes Allowable with BTL and SE Modes Selected by SE/BTL pin
• Low Current Consumption in Shutdown Mode (1µA)
• Short Circuit Protection
• Thermal shutdown protection and over current protection circuitry
• Maximum Output Swing Clamping Function
• SOP-16-P Packages with Thermal Pad Package
• Lead Free Available (RoHS Compliant)

Applications

Ordering and Marking Information APA2068 is a monolithic integrated circuit, which provides precise DC volume control, and a stereo bridged audio power amplifiers capable of producing 2.6W (1.8W) into 4Ω with less than 10% (1.0%)THD+N. The attenuator range of the volume control in APA2068 is from 20dB (DC_Vol=0V) to -80dB (DC_Vol=3.54V) with 32 steps. The advantage of internal gain setting can be less components and PCB area. Both of the depop circuitry and the thermal shutdown protection circuitry are integrated in APA2068, that reduce pops and clicks noise during power up or shutdown mode operation. It also improves the power off pop noise and protects the chip from being destroyed by over temperature and short current failure. To simplify the audio system design, APA2068 combines a stereo bridge-tied loads (BTL) mode for speaker drive and a stereo single-end (SE) mode for headphone drive into a single chip, where both modes are easily switched by the SE/BTL input control pin signal.

• NoteBook PC
• LCD Monitor or TV APA2068 Handling Code Temp. Range Package Code Package Code KA : SOP-16-P Operating Ambient Temp. Range I : - 40 to 85 C Handling Code TU : Tube TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device APA2068 KA : APA2068 XXXXX XXXXX - Date Code Lead Free Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature.

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw2 Block Diagram (Over operating free-air temperature range unless otherwise noted.) Symbol Parameter Rating Unit VDD Supply Voltage Range -0.3 to 6 V VIN Input Voltage Range, SE/BTL, SHUTDOWN, Mute -0.3 to VDD+0.3 V TA Operating Ambient Temperature Range -40 to 85 °C TJ Maximum Junction Temperature Intermal Limited*1 °C TSTG Storage Temperature Range -65 to +150 °C TS Soldering Temperature,10 seconds 260 °C VESD Electrostatic Discharge -3000 to 3000*2 -200 to 200*3 V PD Power Dissipation Intermal Limited Absolute Maximum Ratings Notes: 1.APA2068 integrated internal thermal shutdown protection when junction temperature ramp up to 150°C 2.Human body model: C=100pF, R=1500Ω , 3 positives pulse plus 3 negative pulses 3.Machine model: C=200pF, L=0.5µF, 3 positive pulses plus 3 negative pulses Shutdown ckt Power and Depop circuit SE/BTL LOUT+ LOUT- LIN- SE/BTL SHUTDOWN BYPASS Mute MUTE Volume Control VOLUME APA2068_Block ROUT+ RIN- BYPASS ROUT- GND VDD VOLMAX Min. Max. Unit Supply Voltage, VDD 4.5 5.5 V SHUTDOWN, Mute 2 High level threshold voltage, VIH SE/BTL 4 V SHUTDOWN, Mute 1.0 Low level threshold voltage, VIL SE/BTL 3 V Common mode input voltage, VICM VDD-1.0 V Recommended Operating Conditions

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw3 VDD=5V, -20°C<TA<85°C (unless otherwise noted)

Electrical Characteristics

APA2068 Symbol Parameter Test Condition Min. Typ. Max. Unit VDD Supply Voltage 4.5 5.5 V SE/BTL=0V 9 20 IDD Supply Current SE/BTL=5V 4 10 mA ISD Supply Current in Shutdown Mode SE/BTL=0V SHUTDOWN=0V 1 µA IIH High input Current 900 nA IIL Low Input Current 900 nA VOS Output Differential Voltage 5 mV Symbol APA2068 Unit Parameter Test Condition Min. Typ. Max. PO THD=10%, RL=3Ω , Fin=1kHz 2.9 THD=10%, RL=4Ω , Fin=1kHz 2.6 THD=10%, RL=8Ω , Fin=1kHz 1.6 THD=1%, RL=3Ω , Fin=1kHz 2.4 THD=1%, RL=4Ω , Fin=1kHz 1.8 Maximum Output Power THD=0.5%, RL=8Ω , Fin=1kHz 1 1.3 W THD+N PO=1.2W, RL=4Ω , Fin=1kHz 0.07 Total Harmonic Distortion Plus Noise PO=0.9W, RL=8Ω , Fin=1kHz 0.08 PSRR Power Ripple Rejection Ratio VIN=0.1Vrms, RL=8Ω , CB=1µF, Fin=120Hz 60 dB Xtalk Channel Separation CB=1µF, RL=8Ω , Fin=1kHz 90 dB S/N Signal to Noise Ratio PO=1.1W, RL=8Ω , A_wieght 95 dB Symbol Parameter Value Unit RTHJA Thermal Resistance from Junction to Ambient in Free Air SOP -16-P °C/W Operating Characteristics, BTL mode VDD=5V,TA=25°C,RL=4Ω , Gain=2V/V (unless otherwise noted)

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw4 Electrical Characteristics (Cont.) Operating Characteristics, SE mode. VDD=5V,TA=25°C, Gain=1V/V (unless otherwise noted) APA2068 Symbol Parameter Test Condition Min. Typ. Max. Unit THD=10%, RL=16Ω , Fin=1kHz 220 THD=10%, RL=32Ω , Fin=1kHz 120 THD=1%, RL=16Ω , Fin=1kHz 160 PO Maximum Output Power THD=1%, RL=32Ω , Fin=1kHz 95 mW PO=125mW, RL=16Ω , Fin=1kHz 0.09 THD+N Total Harmonic Distortion Plus Noise PO=65mW, RL=32Ω , Fin=1kHz 0.09 PSRR Power Ripple Rejection Ratio VIN=0.1Vrms, RL=8Ω , CB=1µF, Fin=120Hz 60 dB Xtalk Channel Separation CB=1µF, RL=32Ω , Fin=1kHz 60 dB S/N Signal to Noise Ratio PO=75mW, SE, RL=32Ω , A_wieght 100 dB Pin Description BYPASS 4 13 SE/BTL VOLMAX 8 GND 5

15 VDD

12 GND

14 ROUT+RIN- 3

16 ROUT-

11 LOUT+

10 VDDVOLUME 7

9 LOUT-APA2068

＝Thermal Pad (Connected to GND for better heat dissipation) Pin Function Description Pin No. Name Config Function Description

1 MUTE I Mute control signal input, hold low for normal operation, hold high

to mute. 2 SHUTDOWN I It will be into shutdown mode when pull low. ISD = 1µA

3 RIN- I Right channel input terminal

4 BYPASS I Bias voltage generator

5,12 GND - Ground connection, Connected to thermal pad.

6 LIN- I Left channel input terminal

7 VOLUME I Input signal for internal volume gain setting.

8 VOLMAX I

Setting the maximum output swing. Input a non -zero voltage (VC) to this pin, the output voltage swing will be clamped between V OH (the maximum positive v alue) - VC & V OL (the minimum negative value) + V C. Disable this function when tie this pin to GND. Maximum input voltage ≤ 1/2 VDD.

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw5 Pin No. Name Config Function Description 9 LOUT- O Left channel positive output in BTL mode and SE mode. 10,15 VDD - Supply voltage

11 LOUT+ O Left channel negative output in BTL mode and high impedance in

SE mode.

13 SE/BTL I Output mode control i nput, high for SE output mode and low for

BTL mode.

14 ROUT+ O Right channel negative output in BTL mode and high impedance

in SE mode. 16 ROUT- O Right channel positive output in BTL mode and SE mode. Pin Function Description (Cont.) SHUTDOWN Mute SE/BTL Operating mode L X X Shutdown mode H L L BTL out H L H SE out H H X Mute Control Input Table Typical Application Circuit SE/BTL Signal 4 Ω Ring Headphone Jack Sleeve Control Pin Tip SE/BTL Signal1 µF 220 µF 220 µF 1k Ω 1k Ω R-Ch Input VDD 100k Ω Shutdown Signal 1 µF L-CH Input VDD VDD GND 100 µF0.1 µF 100k Ω Shutdown ckt SE/BTL LOUT+ LOUT- LIN- SE/BTL SHUTDOWN BYPASS Mute MUTE Volume Control VOLUME A2068_AppCkt ROUT+ RIN- BYPASS ROUT- VOLMAX MUTE Signal VDD 50k Ω VOLMAX Signal 2.2 µF

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw6 Volume Control Table_BTL Mode Gain(dB) High(V) Low(V) Hysteresis(mV) Recommended Voltage(V) 20 0.12 0.00 0 18 0.23 0.17 52 0.20 16 0.34 0.28 51 0.31 14 0.46 0.39 50 0.43 12 0.57 0.51 49 0.54 10 0.69 0.62 47 0.65 8 0.80 0.73 46 0.77 6 0.91 0.84 45 0.88 4 1.03 0.96 44 0.99 2 1.14 1.07 43 1.10 0 1.25 1.18 41 1.22 -2 1.37 1.29 40 1.33 -4 1.48 1.41 39 1.44 -6 1.59 1.52 38 1.56 -8 1.71 1.63 37 1.67 -10 1.82 1.74 35 1.78 -12 1.93 1.85 34 1.89 -14 2.05 1.97 33 2.01 -16 2.16 2.08 32 2.12 -18 2.28 2.19 30 2.23 -20 2.39 2.30 29 2.35 -22 2.50 2.42 28 2.46 -24 2.62 2.53 27 2.57 -26 2.73 2.64 26 2.69 -28 2.84 2.75 24 2.80 -30 2.96 2.87 23 2.91 -32 3.07 2.98 22 3.02 -34 3.18 3.09 21 3.14 -36 3.30 3.20 20 3.25 -38 3.41 3.32 18 3.36 -40 3.52 3.43 17 3.48 -80 5.00 3.54 16 5 Supply Voltage Vdd=5V

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw7 Typical Characteristics THD+N (%) Output Power (W) Output Power (W) THD+N (%) Output Power (W) Output Power (W) THD+N (%) THD+N (%) 0.01 0.1 0 3.50.5 1 1.5 2 2.5 3 VDD = 5V Av =20dB f = 1KHz BTL RL = 8Ω RL = 4Ω RL = 3Ω 0.01 0.1 0 240m40m 80m 120m 160m 200m VDD = 5V Av =14dB f = 1KHz SE RL = 32Ω RL = 16Ω 0.01 0.1 0 3.50.5 1 1.5 2 2.5 3 VDD = 5V F =1KHz RL =3Ω BTL Av = 20dB Av = 6dB 0.05 0.1 10m 5100m 1 VDD = 5V Av =20dB RL =3Ω BTL f = 20KHz f = 20Hz f = 1KHz THD+N vs. Output Power THD+N vs. Output Power THD+N vs. Output Power THD+N vs. Output Power

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw8 Typical Characteristics (Cont.) THD+N (%) THD+N (%) Output Power (W) Output Power (W) THD+N (%) THD+N (%) Frequency (Hz) Frequency (Hz) 0.01 0.1 20 20k100 1k 10k VDD = 5V RL =3Ω Po = 1.8W BTL Av = 20dB Av = 6dB 0.01 0.1 20 20k100 1k 10k VDD = 5V Av = 6dB RL =3Ω BTL Po = 0.9W Po = 1.8W 0.01 0.1 0 3.50.5 1 1.5 2 2.5 3 VDD = 5V F =1KHz RL =4Ω BTL Av = 20dB Av = 6dB 0.01 0.1 10m 5100m 1 VDD = 5V Av =20dB RL =4Ω BTL F = 20KHz F = 20Hz F = 1KHz THD+N vs. Output Power THD+N vs. Output Power THD+N vs. Frequency THD+N vs. Frequency

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw9 Typical Characteristics (Cont.) THD+N (%) THD+N (%) Output Power (W) Output Power (W) THD+N (%) THD+N (%) Frequency (Hz) Frequency (Hz) 0.01 0.1 20 20k100 1k 10k VDD = 5V RL=4Ω Po=1.5W BTL Av = 20dB Av = 6dB 0.01 0.1 20 20k100 1k 10k VDD = 5V Av= 6dB RL=4Ω BTL Po = 0.8W Po = 1.5W 0.01 0.1 0 3.50.5 1 1.5 2 2.5 3 Av = 20dB Av = 6dB VDD = 5V F= 1KHz RL=8Ω BTL 0.01 0.1 10m 5100m 1 F = 20KHz F = 20Hz F = 1KHz VDD = 5V Av = 20dB RL=8Ω BTL THD+N vs. Output Power THD+N vs. Output Power THD+N vs. Frequency THD+N vs. Frequency

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw10 Typical Characteristics (Cont.) THD+N (%) THD+N (%) Output Power (W) Output Power (W) THD+N (%) THD+N (%) Frequency (Hz) Frequency (Hz) 0.01 0.1 20 20k100 1k 10k Po = 0.5W VDD = 5V Av = 6dB RL=8Ω BTL Po = 0.9W 0.01 0.1 20 20k100 1k 10k Av = 6dB Av = 20dB VDD=5V RL=8Ω Po=0.9W BTL 0.01 0.1 0 240m40m 80m 120m 160m 200m VDD=5V F=1KHz RL=16Ω SE Av = 0dB Av = 14dB 0.01 0.1 10m 300m50m 100m 200m VDD=5V Av=14dB RL=16Ω Co=1000µf SE F = 20KHz F = 1KHz F = 20Hz THD+N vs. Output Power THD+N vs. Output Power THD+N vs. Frequency THD+N vs. Frequency

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw11 Typical Characteristics (Cont.) THD+N (%) THD+N (%) Output Power (W) Output Power (W) THD+N (%) THD+N (%) Frequency (Hz) Frequency (Hz) 0.01 0.1 20 20k100 1k 10k VDD=5V RL=16Ω Po=125mW Co=1000µf SE Av = 0dB Av = 14dB 0.01 0.1 20 20k100 1k 10k VDD=5V Av=0dB RL=16Ω Co=1000 µf SE Po = 125mW Po = 60mW 0.01 0.1 0 240m40m 80m 120m 160m 200m VDD=5V F=1KHz RL=32 Ω SE Av = 0dB Av = 14dB 0.01 0.1 10m 300m50m 100m 200m VDD=5V Av=14dB RL=32 Ω Co=1000 µf SE F = 20Hz F = 1KHz F = 20KHz THD+N vs. Output Power THD+N vs. Output Power THD+N vs. Frequency THD+N vs. Frequency

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw12 Typical Characteristics (Cont.) THD+N (%) THD+N (%) Amplitude(dB) Frequency (Hz) Frequency (Hz) Frequency (Hz) Frequency (Hz) Amplitude(dB) Phase(Degress) Phase(Degress) 0.01 0.1 20 20k100 1k 10k VDD=5V RL=32Ω Po=65mW Co=1000 µf SE Av = 0dB Av = 14dB 0.01 0.1 20 20k100 1k 10k VDD=5V Av=14dB RL=32Ω Co=1000 µf SE Po = 65mW Po = 30mW +160 +330 +170 +180 +190 +300 +310 +320 +20 +12 +16 10 200k100 1k 10k 100k Phase( 6dB) Amplitude( 20dB) Amplitude( 6dB) Phase( 20dB) VDD=5V RL=4Ω Po=0.8W BTL +160 +330 +170 +180 +190 +300 +310 +320 +20 +12 +16 10 200k100 1k 10k 100k Amplitude( 20dB) Phase( 20dB) Phase( 6dB) Amplitude( 6dB)VDD=5V RL=8Ω Po=0.5W BTL THD+N vs. Frequency THD+N vs. Frequency Frequency Response Frequency Response

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw13 Typical Characteristics (Cont.) Amplitude(dB) Frequency (Hz) Frequency (Hz) Frequency (Hz) Frequency (Hz) Amplitude(dB) Phase(Degress) Phase(Degress) Crosstalk(dB) Crosstalk(dB) +120 +300 +140 +160 +180 +200 +220 +240 +260 +280 -10 +14 +10 20 200k100 1k 10k 100k Amplitude(14dB) Phase(14dB) VDD=5V RL=16Ω Co=1000µf Po=60mW SE Amplitude(0dB) Phase(0dB) +165 +220 +170 +180 +190 +200 +210 -10 +14 +10 20 200k100 1k 10k 100k Amplitude(14dB) Amplitude(0dB) Phase(14dB) Phase(0dB)VDD=5V RL=32Ω Co=1000µf Po=30mW SE -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k100 1k 10k VDD=5V RL=8Ω Po=0.9 W BTL Right to Left Left to Right -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k100 1k 10k Right to Left Left to Right VDD=5V RL=4Ω Po=1.5 W BTL Frequency Response Frequency Response Crosstalk vs. Frequency Crosstalk vs. Frequency

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw14 Typical Characteristics (Cont.) Output Noise Voltage(V) Frequency (Hz) Frequency (Hz) Frequency (Hz) Frequency (Hz) Output Noise Voltage(V) Crosstalk(dB) Crosstalk(dB) -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k100 1k 10k Right to Left Left to Right VDD=5V RL=16Ω Co=1000 µf Po=125mW SE -100 -80 -60 -40 -20 20 20k100 1k 10k -10 -30 -50 -70 -90 VDD=5V RL=32Ω Co=1000µf Po=65mW SE Right to Left Left to Right 100u 10u 20u 20 20k100 1k 10k VDD=5V Av=6dB RL=4Ω BTL A-Weight Filter BW<22KHz 100u 10u 20u 20 20k100 1k 10k Filter BW<22KHz A-Weight VDD=5V Av=0dB RL=32Ω SE Crosstalk vs. Frequency Crosstalk vs. Frequency Output Noise Voltage vs. Frequency Output Noise Voltage vs. Frequency

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw15 Typical Characteristics (Cont.) Mute Attenuation(dB) Frequency (Hz) Frequency (Hz) Frequency (Hz) Frequency (Hz) Shutdown Attenuation(dB) PSRR(dB) PSRR(dB) -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k100 1k 10k VDD=5V RL=4Ω Vin=200mV Av=20dB BTL -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k100 1k 10k VDD=5V RL=32Ω Vin=200mV Av=14dB SE -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k100 1k 10k TVDD=5V RL=8Ω Vin=1V RMS Av=6dB BTL -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k100 1k 10k VDD=5V RL=8Ω Vin=1V RMS Av=6dB BTL PSRR vs. Frequency PSRR vs. Frequency Mute Attenuation vs. Frequency Shutdown Attenuation vs. Frequency

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw16 -80 -70 -60 -50 -40 -30 -20 -10 Up Down VDD=5V No Load BTL Typical Characteristics (Cont.) Power Dissipation(W) DC volume (V) Supply Voltage(V) Output Power(W) Gain (dB) Supply Current(mA)Power Dissipation(W) Output Power(W) 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 BTL SE No Load 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 RL=3Ω RL=4Ω RL=8Ω VDD=5V THD<1% BTL 100 120 140 160 180 200 0 50 100 150 200 250 RL=8Ω RL=32Ω RL=16Ω VDD=5V THD<1% SE Power Dissipation vs. Output Power Power Dissipation vs. Output Power Supply Current vs. Supply VoltageGain vs. DC volume Voltage

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw20 Application Descriptions (Cont.) Cbypass x 125kΩ << 1 100kΩ x Ci (6) Tstart up = 5 x (Cbypass x 125KΩ ) (7) FC(highpass)= 2π RLCC (8)1 maintained. The bypass capacitor is fed thru from a 125kΩ resistor inside the amplifier and the 100kΩ is maximum input resistance of (Ri+ Rf). Bypass capacitor, Cb, values of 3.3µF to 10µF ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance. The bypass capacitance also effects to the start up time. It is determined in the following equation : Output Coupling Capacitor, Cc In the typical single-supply SE configuration, an output coupling capacitor (Cc) is required to block the DC bias at the output of the amplifier thus preventing DC currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by equation. For example, a 330µF capacitor with an 8Ω speaker would attenuate low frequencies below 60.6Hz. The main disadvantage, from a performance standpoint, is the load impedance is typically small, which drives the low-frequency corner higher degrading the bass response. Large values of CC are required to pass low frequencies into the load. Power Supply Decoupling, Cs The APA2068 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents the oscillations causing by Effective Bypass Capacitor, Cbypass (Cont.) long lead length between the amplifier and the speaker. The optimum decoupling is achieved by using two different type capacitors that target on different type of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1µF placed as close as possible to the device VDD lead works best. For filtering lower-frequency noise signals, a large aluminum electrolytic capacitor of 10µF or greater placed near the audio power amplifier is recommended. Optimizing Depop Circuitry Circuitry has been included in the APA2068 to minimize the amount of popping noise at power-up and when coming out of shutdown mode. Popping occurs whenever a voltage step is applied to the speaker. In order to eliminate clicks and pops, all capacitors must be fully discharged before turn-on. Rapid on/off switching of the device or the shutdown function will cause the click and pop circuitry. The value of Ci will also affect turn-on pops (Refer to Effective Bypass Capacitance). The bypass voltage ramp up should be slower than input bias voltage. Although the bypass pin current source cannot be modified, the size of Cbypass can be changed to alter the device turn-on time and the amount of clicks and pops. By increasing the value of Cbypass, turn-on pop can be reduced. However, the tradeoff for using a larger bypass capacitor is to increase the turn-on time for this device. There is a linear relationship between the size of Cbypass and the turn-on time. In a SE configuration, the output coupling capacitor, CC, is of particular concern. This capacitor discharges through the internal 10kΩ resistors. Depending on the size of CC, the time

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw21 Application Descriptions (Cont.) constant can be relatively large. To reduce transients in SE mode, an external 1kΩ resistor can be placed in parallel with the internal 10kΩ resistor. The tradeoff for using this resistor is an increase in quiescent current. In the most cases, choosing a small value of Ci in the range of 0.33µF to 1µF, Cb being equal to 4.7µF and an external 1kΩ resistor should be placed in parallel with the internal 10kΩ resistor should produce a virtually clickless and popless turn-on. A high gain amplifier intensifies the problem as the small delta in voltage is multiplied by the gain. So it is advantageous to use low-gain configurations. Shutdown Function In order to reduce power consumption while not in use, the APA2068 contains a shutdown pin to externally turn off the amplifier bias circuitry. This shutdown feature turns the amplifier off when a logic low is placed on the SHUTDOWN pin. The trigger point between a logic high and logic low level is typically 2.0V. It is best to switch between ground and the supply VDD to provide maximum device performance. By switching the SHUTDOWN pin to low, the amplifier enters a low-current state, IDD<1µA. APA2068 is in shutdown mode, except PC-BEEP detect circuit. On normal operating, SHUTDOWN pin pull to high level to keeping the IC out of the shutdown mode. The SHUTDOWN pin should be tied to a definite voltage to avoid unwanted state changes. Mute Function The APA2068 mutes the amplifier outputs when logic high is applied to the MUTE pin. Applying logic low to the MUTE pin returns the APA2068 to normal operation. Prevent unanticipated mute behavior by connecting the Mute pin to logic high or low. Do not let the Mute pin float. Maximum Output Swing Clamping Function (VolMax) The APA2068 provide the maximum output swing clamping function to protect the speaker. When input a non-zero voltage (Vx) to VolMax pin, the amplifier’s output amplitude (Vo) is be limited at Vo = Vdd – Vx. This function can effective to limited the output power across the speaker, and avoid damaging the speaker. The maximum setting voltage of VolMax is Vdd/2, and when this function is not used, place the VolMax connect to GND. BTL Amplifier Efficiency An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power supply to the power delivered to the load. The following equations are the basis for calculating amplifier efficiency. Where : Efficiency of a BTL configuration : Table 1 calculates efficiencies for four different output power levels. Note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the Optimizing Depop Circuitry (Cont.) Efficiency = PSUP (9)PO VORMS = √ 2 VP (10) (11)PSUP = VDD x IDDAVG = VDD x 2VP π RL ( ) / (VDD x ) =PO PSUP = VPxVP 2RL 2VP π RL π VP 4VDD (12) PO = L ORMSORMS R VV × L PP VV ×=PO = L ORMSORMS R VV × L PP VV ×=

Copyright  ANPEC Electronics Corp. dissipation over the normal operating range. efficiency equation to utmost advantage when possible. indicates that as VDD goes down, efficiency goes up. **High peak voltages cause the THD to increase. Table 1. Efficiency Vs Output Power in 5-V/8Ω BTL given conditions is 4 times as in SE mode. resistance (θ JA) is equal to 45ο C/W. handle can be obtained from equation15. creased or the ambient temperature should be reduced.

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw23 Application Descriptions (Cont.) design issues are not properly addressed, the APA2068 4Ω will go into thermal shutdown when driving a 4Ω load. The thermal pad on the bottom of the APA2068 should be soldered down to a copper pad on the circuit board. Heat can be conducted away from the thermal pad through the copper plane to ambient. If the copper plane is not on the top surface of the circuit board, 8 to 10 vias of 13 mil or smaller in diameter should be used to thermally couple the thermal pad to the bottom plane. For good thermal conduction, the vias must be plated through and solder filled. The copper plane used to conduct heat away from the thermal pad should be as large as practical. If the ambient temperature is higher than 25°C, a larger copper plane or forced-air cooling will be required to keep the APA2068 junction temperature below the thermal shutdown temperature (150°C). In higher ambient temperature, higher airflow rate and/or larger copper area will be required to keep the IC out of thermal shutdown. Thermal Considerations Linear power amplifiers dissipate a significant amount of heat in the package under normal operating conditions. To calculate maximum ambient temperatures, first consideration is that the numbers from the Power Dissipation vs. Output Power graphs are per channel values, so the dissipation of the IC heat needs to be doubled for two-channel operation. Given θ JA, the maximum allowable junction temperature (TJMAX), and the total internal dissipation (PD), the maximum ambient temperature can be calculated with the following equation. The maximum recommended junction temperature for the APA2068 is 150°C. The Thermal Pad Considerations (Cont.) internal dissipation figures are taken from the Power Dissipation vs. Output Power graphs. TAMax = TJMax -θ JAPD (16) The APA2068 is designed with a thermal shutdown protection that turns the device off when the junction temperature surpasses 150°C to prevent damaging the IC.

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw24

Package Information

SOP-16-P (150mil) 123 N 0.015x45 TOP VIEW SIDE VIEW BOTTOM VIEW END VIEW 0.018 typ. E HE 0.016 typ. D 0.050 typ. A L Millimeters Inches Dim Min. Max. Min. Max. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 D 9.80 10.0 0.386 0.394 D1 4.115 REF 0.162 REF E 3.81 3.99 0.150 0.157 E1 2.184 REF 0.086 REF H 5.79 6.20 0.228 0.244 L 0.41 1.27 0.016 0.050 φ 0° 8° 0° 8°

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw25 Physical Specifications t 25 C to Peak tp Ramp-up tL Ramp-down ts Preheat Tsmax Tsmin TL TP Temperature Time Critical Zone TL to T P Terminal Material Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) , 100%Sn Lead Solderability Meets EIA Specification RSI86 -91, ANSI/J -STD-002 Category 3. Reflow Condition (IR/Convection or VPR Reflow) Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate (TL to TP) 3°C/second max. 3°C/second max. Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: - Temperature (TL) - Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak/Classificatioon Temperature (Tp) See table 1 See table 2 Time within 5°C of actual Peak Temperature (tp) 10-30 seconds 20-40 seconds Ramp-down Rate 6°C/second max. 6°C/second max. Time 25°C to Peak Temperature 6 minutes max. 8 minutes max. Notes: All temperatures refer to topside of the package .Measured on the body surface.

Copyright  ANPEC Electronics Corp. Table 1. SnPb Entectic Process – Package Peak Reflow Temperature s Table 2. Pb -free Process – Package Classification Reflow Temperatures including the stated classification temperature (this means Peak reflow temperature +0 °C. For example 260 °C+0 °C) at the rated MSL level.

Copyright  ANPEC Electronics Corp. Rev. A.2 - Jul., 2005 APA2068 www.anpec.com.tw27 Application A B C J T1 T2 W P E 330 ± 1 100 +2 13+ 0.5 2 ± 0.5 16.4 +0.3 F D D1 Po P1 Ao Bo Ko t SOP- 16-P (mm) Application Carrier Width Cover Tape Width Devices Per Reel SOP- 16-P 24 21.3 1000 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Carrier Tape & Reel Dimensions(Cont.) A J B C Cover Tape Dimensions