AN6554NS

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Technical content

The AN6554 and the AN6554NS are quadruple opera- tional amplifiers with phase compensation circuits built-in. They are suitable for application to various electronic circuits such as active filters and audio pre-amplifiers. n Features

• Phase compensation circuit built-in
• High voltage gain, low noise
• Output short-circuit protection built-in AN6554, AN6554NS Quadruple Operational Amplifiers Unit:mmAN6554NS 14-pin PANAFLAT Plastic Package (SOP014-P-0225A) 1 240 4–0 251 27 0 1–0 1 0 3 1 5–0 2 0 45 0 15 6 5–0 3 4 2–0 3 10 1–0 3 –++– –++– V O1 V CC 1 2345 6 7 4 3 1 2 13 12 11 V EE 10 9 8 V in1+V in1– V O2V in2–V in2+ V O4 (GND)V in4+ V in3+V in4– V O3V in3– Unit mm 14-pin DIL Plastic Package (DIP014-P-0300D) 19 06–0 3 3 to 15˚ 6 35–0 3 0 5–0 11 22–0 252 54 3 05–0 254 7–0 25 7 62–0 25 0.3 + 0.1 – 0.05 1 1–0 25 AN6554

–V in4 V CC +V in4 V O4 –V in1 GND (V EE ) V O1 V in1 R 21 Q 33 Q 29 C 3 Q 34 R 23 R 25 Q 37 Q 36 Q 39 Q 42 Q 56 Q 53 J2 Q 55 R 30 Q 47Q 41 Q 52 Q 51 Q 44 Q 43 C 4R 27 R 35 R 26 D 6 D 5 D 7 D 8 Q 38 R 24 Q 32Q 31 R 19 R 20 R 22 Q 35 Q 49 Q 50 Q 46 Q 45 R 31 Q 48 R 29 R 28 Q 54 R 34 R 32 R 36 R 33 Q 40 Q 30 –V in3 +V in3 V O3 –V in2 V O2 V in2 ■ Pin Descriptions Pin No. Pin name Ch.1 output Ch.1 inverting input Ch.1 non inverting input V CC Ch.2 non inverting input Ch.2 inverting input Ch.2 output Pin No. Pin name Ch.3 output Ch.3 inverting input Ch.3 non inverting input V EE (GND) Ch.4 non inverting input Ch.4 inverting input Ch.4 output V CC V ID V ICM PD Topr Tstg V V V mW C C Parameter Symbol Rating Unit ■ Absolute Maximum Ratings (Ta=25˚C) –30 –15 570 380 –20 to +75 –55 to +150 –55 to +125 Voltage Power dissipation Temperature Supply voltage Differential input voltage Common-mode input voltage Operating ambient temperature Storage temperature AN6554 AN6554NS AN6554 AN6554NS

Parameter Symbol Condition min typ max ■ Electrical Characteristics (VCC =15V, VEE =–15V, Ta=25˚C) Input offset voltage V I (offset) 5m V0.5R S 10kΩ Input offset current IIO 50 nA5 Input bias current Ibias 300 nA Voltage gain 88G V dBR L 2kΩ, VO =–10V Maximum output voltage –12V O (max.1) V O (max.2) V–14 –10 V –13 Common-mode input voltage width –12V CM V–14 100 Common-mode rejection ratio 70CMR dB 90 Supply voltage rejection ratio SVR µV/V30 Power consumption PC 240 mW Slew rate Equivalent input noise voltage SR V/ µs 100 100 1.6 Channel separation Sep dB 110f=10kHz V ni µVrms2.5R S=1kΩ, B=10Hz to 30kHz Unit R L 10kΩ R L 2kΩ 120 100 1 10 100 1k 10k Frequency f (Hz) Voltage Gain GV (dB) 100k 1M 10M 100M V CC =15V V EE =–15V Ta=25˚C V CC =15V V EE =–15V Ta=25˚C G V – f 100 1k 10k 100k Load Resistance RL (Ω) Maximum Output Voltage VO (max.) (V) V CC =15V V EE =–15V Ta=25˚C V O (max ) –R L 10 100 1k 10k Frequency f (Hz) Equivalent Input Noise Voltage Vni (nV/Hz) V CC =15VV EE =–15V R S=1kΩ, GV =40dB, Ta=25˚C V ni – f 1 10 100 1k 10k 100k 1M Frequency f (Hz) 0 4 8 12 16 20 Supply Voltage VCC =–V EE (V) Maximum Output Voltage VO (max.) (V) R L=2kΩ Ta=25˚C V CC =15V V EE =–15V V O (max ) –f –10 –15 –20 –25 Maximum Output Voltage VO (max.) (V) V O (max ) –V CC , VEE 240 200 160 120 2 103 104 Frequency f (Hz) Channel Separation Sep (dB) Sep – f

Supply Voltage VCC = –VEE (V) Supply Current ICC (mA) V CC =15V V EE =–15V ICC –V CC 0 1 02 03 04 05 06 07 08 09 0 1 0 0 Time t (µs) Output Voltage VO (V) V O – t V CC =15V V EE =–15V R L=2kΩ Ta=25˚C Ta=–25˚C V EE V CC R L+ 2kΩ 25˚C 50˚C