AN6535 PANASONIC | Alldatasheet

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The AN6535 is a monolithic 4-pin negative adjustable voltage regulator. With an external resistor, it provides any stabilized output voltages between –5V and–30V, and is optimum for the power circuits with a current capaci- tance of up to 0.5A. With various protective circuits built in, it has high reliability and is provided in a 4-lead SIL plastic package. n Features

  • Wide range of output voltages:VO = –5 to –30V
  • Interal thermal overload protection
  • Interal short-circuit protection
  • Output transistor safe area compensation AN6535 4-pin Negative Adjustable V oltage Regulator n Block Diagram Unit:mm 12.5max. ø 3.1 2.0 4.0 3–1.0 0.7–0.2 0.5 –0.1 4-pin SIL Plastic Package with Fin (SSIP004-P-0000) 1.8 9.0min. 3.3max. 9.6 + 0.5 – 0.1 Common 1 2 3 4 Error Amp. Input Output Control Output Pass Tr. Thermal Protection Start Circuit Ref. Voltage Short Circuit Protection Rsc

ICC *1 PD Topr Tstg Supply voltage Supply current Power dissipation Operating ambient temperature Storage V A W Parameter Symbol Rating Unit ■ Absolute Maximum Ratings (Ta=25˚C) –40 7.5 –20 to +80 –55 to +150 *1 The internal circuit is provided with a current limiting circuit. *2 Maximum power dissipation value when there is no heat sink (The value varies depending on the external heat dissipation state) Parameter Symbol Condition min typ max ■ Electrical Characteristics (Ta=25˚C) V O 4% %V O =–5V, IO =200mA, V I=–7.5 to –25V, Tj=25˚C Line regulation REG IN 0.75 %V O =–18V, IO =5mA, V I=–21 to –33V, Tj=25˚C %V O =–18V, IO =200mA, V I=–21 to –25V, Tj=25˚C mATj=25˚CBias current IBias µATj=25˚C Note 1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10 ms) so that the drift in the characteristic value due to a temperature rise at chip junction can be ignored. Note 2) Unless otherwise specified, V I=–10V, VO =–5V, IO =350mA, CI=2µF, and CO =1µF Control pin current Icont dBV I=–8 to –18V, VO =–5V, f=120HzRipple rejection ratio RR µVOutput noise voltage V no V1.1 V O =–5V, f=10Hz to 100kHz Minimum input/output voltage differenceV DIF (min.) mA100 IO =500mA, T j=25˚C 600 1.4 0.67 Short-circuit current IOS V I=–35V, VO =–5V, Tj=25˚C A0.8V O =–5V, Tj=25˚CPeak output current IOP mV/˚C0.2Output voltage temperatrue coefficientΔV O /Ta V–3 V O =–5V Control pin voltage V cont Tj=25˚C –2.88 1.5 Load regulation REG L %1 –3.12 0.4 Tj=–20 to +25˚C – 0.3IO =5mA Tj=25 to 150˚C IO =5 to 500mA V O =–5V, VI=–12V Tj=25˚C V O =–18V, VI=–25V Unit Output voltage tolerance V I=V O –3V to VO –15V, IO =5 to 350mA, Tj=25˚C

Time t (µs) –10 –20 –20 –15 –10 Output Voltage Fluctuation (mV) Input Voltage V (V) Line Transient Response 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 01 0 2 0 T j=25˚C I/O Voltage Difference VDIF (V) Peak Output Current IOP (A) IOP –V DIF 0 20 40 60 80 100 120 140 160 Ambient Temperature Ta (˚C) Power Dissipation PD (W) PD –Ta (1) Te=Ta (2) With a 10˚C/W heat sink (3) With a 20˚C/W heat sink (4) Without heat sink (4) (3) (2) (1) 1.4 1.2 1.0 0.8 0.6 0.4 –50 0 50 100 150 Juction Temperature Tj (˚C) Min. I/O Voltage Difference VDIF (min.) (V) V DIF (min.) –Tj 120 100 10 100 1k 10k 100k Frequency f (Hz) Ripple Rejection Ratio RR (dB) RR– f I=500mAIO =200mA IO =100mA IO =10mA IO =100mA V O =5V 0 1 02 03 04 05 0 Time t (µs) 0.5 Output Voltage Fluctuation (V) Load Current IO (A) Load Transient Response Output Current IO (A) Output Voltage VO (V) Output Current Limit 10 100 1k 10k 100k 1M Frequency f (Hz) Output Impedance ZO (mΩ ) ZO – f V I=–10V V O =–5V Tj=25˚C 104 103 102 V I=–10V V O =–5V IO =20mA C O =1µF Ta=25˚C

+V O V O =V cont C I : Necessary when the VI line is long. C O : Improves the transient response. C O 1µF V cont C I : 2µF +V I AN6535 R 1 R 2 Control Input Output Common R 1 R 1+R 2 (Vcont ≅3V, R1=3kΩ )– V O 2µF 1µF V I IO IPIR R 3 R 2 R 1 3kΩ Control Input Output Common Q 1 AN6535 V O 2µF 1µF V I IO IP IR Ie2 Ie1 R 3 R SC R 2 R 13kΩ Control Input Output Common Q 1 Q 2 AN6535 (1) Current Boost Circuit (2) Current Boost Circuit (With Current Limiting Circuit) 6Ω– R 3= V BE (Q1) · β ( β+1) IP – IO R SC = V BE (Q1) Ie1 (max.) R 3= V BE (Q1)+Ie1R SC IO – Ie1 Ie1 (max.)=IP (max.) – V BE (Q1)+BE (Q1) R 3