AN6448NFBP

AN6448NFBP PANASONIC | Alldatasheet

Document overview

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Technical content

The AN6448NFBP is a speech network IC suitable for multi- function cordless telephones. It incorporates a cross-point switch controlled by serial input. It allows speech path switch- ing and mixing, and provides for three- or four-person commu- nication and other sophisticated functions. It also incorporates REC/PLAY amplifiers with VOX circuits. n Features

• The speech block can operate on line voltage, with no exter- nal power supply, and is operational even during a commer- cial power failure.
• Incorporates auto. PAD, dial mute, DC voltage regulation, and other basic speech functions.
• The cross-point switch can be operated independently.
• Each output of the cross-point switch can correspond to mul- tiple inputs, allowing three-or four-person communication.
• The REC/PLAY amplifiers incorporate ALC and VOX circuits.
• Receiver volume can be increased by 6 dB or 9 dB. AN6448NFBP Speech Network IC Incorporating Cross-Point Switch Unit : mm QFP package with 64 pins (QFH064-P-1414A) 17.2–0.4 14.0–0.3 17.2–0.4 14.0–0.3 48 33 11 6 2.85–0.2 1.3–0.11.3–0.1 0.1–0.1 0.2 +0.1 -0.05 0.35 +0.1 -0.050.8(0.8) SEATING PLANE 16123456789 1 0 1 1 1 2 1 3 1 4 1 5 10dB dB dB dB dB Comp 0dB 0dB 0dB 0dB 0dB0dB 0dB 0dB 0dB 0dB V REF VOX Det. I N J ACL DetACL Line Supply Monitor Hold off Latch Decoder Power Supply Control V REF AP APAP Cont. DM Cont. DC Cont. D dB 3348 47 46 45 44 43 42 41 40 39 38 37 36 35 34 P.O.R n Block Diagram

Supply voltage (1) Supply current (1) Supply voltage (2) Supply current (2) Pow er dissipation N ote) O perating am bient tem perature Storage tem perature V m A V m A m W n A bsolute M axim um R atings (Ta=25˚C ) 7.0 12.0 135 640 –20 to +75 –55 to +150 N ote) In a free-air condition w ith Ta=75˚C . Param eter Sym bol R ating U nit n R ecom m ended O perating C onditions (Ta=25˚C ) O perating supply voltage range (1) O perating supply voltage range (2) C lock frequency V C C V L fC LK 4.5 5 5.5 250 V V kH z Param eter Sym bol C ondition m in typ m ax U nit n Electrical C haracteristics (Ta=25˚C ) Speech netw ork block R ec. gain G V –ER 1 34.5 dBIL=30m A , V C C =5V , V in=–42dB m 30.5 32.5 R ec. autom atic PA D w idth A P–ER 5 dBIL=30 to 80m A , V C C =5V , V in=–42dB m 2.5 3.7 Trans. gain G V –EM 1 31.7 dBIL=30m A , V C C =5V , V in=–38dB m 27.7 29.7 Trans. autom atic PA D w idth A P–EM 5 dBIL=30 to 80m A , V C C =5V , V in=–38dB m 2.5 4 D TM F gain G V –ED 1 20.9 dBIL=30m A , V C C =5V , D M =O N , V in=–30dB m IL=30 to 80m A , V C C =5V , V –D M C =LO W , V in=–30dB m 16.9 18.9 D TM F autom atic PA D w idth A P–ED T 5.5 dB2.5 4.1 R EC /PLA Y am p. block Sw itch block H ead bias current 145I–R EC µA180 215 R EC pream p. output –13.4V O –R P dB mV in=–45dB m , R in=10kΩ –11.4 –9.4 EQ am p. gain 27.8G V –EQ dBV in=–40dB m 29.8 31.8 SP out m ax output 0V O –SP dB mInput L-SP IN , TH D =5% 4 D H out m ax output 0V O –D H dB mInput R F1 IN , TH D =5% 4 R F1 out m ax output 0V O –R F1 dB mInput R F2 IN , TH D =5% 4 R F2 out m ax output 0V O –R F2 dB mInput R F1 IN , TH D =5% 4 L-R EC out m ax output 0V O –LR dB mInput A U X IN , TH D =5% 4 Param eter Sym bol C ondition m in typ m ax U nit

tw h (C LK ) 90% 10% 10%2.5V 90% 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V tW L (C LK ) tr (C LK ) tf (C LK ) tsu (D A TA ) th (D A TA ) tsu (STB ) tsr (STB ) tW (STB ) n Pin D escriptions Pin N o. D escription G round Line pow er (+) input Side-tone adjustm ent Line voltage control (1) Int. ref. voltage output (1) Int. ref. voltage output (2) H old-reset control Trans. pream p. output A uto. PA D control R ec. pream p. input R ec. pream p. output R ec. am p. input R ec. am p. output (1) R ec. am p. output (2) M IC pream p. output M IC pream p. input (1) M IC pream p. input (2) D TM F signal input B T signal input D ial m ute control Line voltage control Line interruption detector output H old-reset signal output N o connection Strobe signal input C lock signal input N o connection D ata input G round Logic pow er supply input V O X detector output SP link output Pin N o. D escription R F2 link output R F1 link output Intercom link output V O X detection control V O X am p. input Tim e stam p link output R ecording link output A LC input A LC detection control Loudspeaker link input R ecording input R ecording inverse input R ecording pream p. output R ecording bias current control To recording head EQ am p. inverse input EQ am p. output R EC /PLA Y int. ref. voltage output G round M IX pream p. output M IX link input A U X pream p. output A U X link input Intercom link input R F1 link input R F2 link input Pow er-O N reset control External supply voltage input Internal supply voltage output C ircuit voltage control (2) Line current bypass (2) Line current bypass (1)

1 G N D

2 V L I

V L–C O N T I O V R EF– SN H C O H C C A PC V reg-R · I IL T–FILTER

5 V R EF O

O O I I O O O

10 R V IN

R VPR E–O U T R VFILTER R V O U T (1) R V O U T (2) D escriptionW aveform R em arksPinN o. Sym bol I/O Equivalent C ircuit TO 30kΩ 120kΩ – 23 6kΩ IχIL I 10 11 10kΩ 5 6 24kΩ kΩ V reg D C 3 to 10V D C 0.3V D C 1V (C onst) (C onst) IL D C 1V V R EF V R EF V R EF V R EF V R EF V C C H old-reset signal G round :

• This is the ground pin for the speech netw ork. G N D for R EC /PLY , V R ER SPEEC H and LIN K . Side-tone adjustm ent :
• G rounded through R 1 (27Ω ).
• Connects to the side-tone adjust- ing circuit to adjust side tone and receiver level. Int. ref. voltage output (1) :
• O utputs half the V reg reference voltage.
• G rounded through a 0.01µF capacitor. Line voltage control (1) : C 2 and the internal resistance determ ine the f. characteristics. The larger the capacitance of C 10, the low er the high band gain as w ith a LPF. The larger the capacitance of C 5, the w ider the pulse w idth. C 6 and the 6-kΩ internal resistance as illustrated on the left form a low -pass filter. The receiver pream plifier gain (G ) is : The line drive gain (G ) is : ZLine//ZTel R 1 A lso assum ing ZLine 600Ω ZTel 600Ω R 1=27Ω : G =20log =20.9dB Int. ref. voltage output (2) :
• O utput im pedance=50Ω Line pow er input :
• C onnects to the positive output of the diode bridge. H old-reset control :
• G rounded through C 5. A djusts the output tim e of control sig- nals. H old-reset signal output :
• This is an open-collector out- put to a m icroprocessor.
• R equires a pull-up resistor. Trans. pream p. output :
• C 6 as connected betw een this pin and the ground form s a low -pass filter. A uto. PA D control :
• C onnects through a resistance to Pin61 (V reg). If the resistance increases, the PA D operates closer to the near end. If the resistance decreases, the PA D operates closer to the far end. R ec. pream p. input :
• R eceiver signals are input from the side-tone circuit to this pin.
• R 7 and C 8 connected betw een Pin11 and this pin determ ine R ec. pream p. output :
• R 7 and C 8 connected betw een Pin10 and this pin determ ine the f. characteristics.
• The output im pedance is 100 –50Ω . R ec. am p. outputs (1 and 2) :
• A ceram ic or dynam ic receiv- er is connected.
• The output circuit is a B TL con- figuration.
• The output im pedance is 50– 30Ω . R ec. am p. input : 300 G = –20log R 7 +ω C 81 ω C 9R 6 + 1 G =

n Pin D escriptions (cont.)

15 M IC

O M IC IN (+) M IC IN (–) I I

18 M F–

B T– IN D M C D C – C O N T I I I O I I I

22 C PC

M IC pream p. input (1) :

• A bias resistor and a m icrophone connect to this pin. M IC pream p. output :
• R 11 and C 13 connected betw een Pin17 and this pin determ ine the f. characteristics.
• The output im pedance is 300 –100Ω . Feedback is input to this pin through a capacitor. The capacitor and R 9 to R 11, and C 12 and C 13 determ ine the f. characteristics. The input im pedance (10kΩ ) and C 14 or C 15 form an input H PF.
• R eferring to the left figure, the voltage, V C PC , at w hich T rC PC turns O N is calculated as follow s: V C PC (O N ) D TM F signal input :
• D TM F signals are input through a coupling capacitor C 14.
• W hen D M C is low at Pin20, D TM F is enabled.
• Input im pedance is 10kΩ . D ial m ute control :
• N orm al speech m ode w hen Pin20 is high or open (M IC am p. O N and rec. am p. O N ).
• D TM F m ode w hen Pin20 is low (D TM F am p. O N and B T am p. O N ). Line voltage control :
• Line voltage is norm al w hen this pin is high. Line voltage increas- es by 1 to 1.5V w hen this pin is low . Line interruption detector output :
• This is an open collector output to a m icroprocessor, requiring a pull-up resistor connected to the m icroprocessor's pow er supply. This pin goes low w hen line voltage is 3.0V or m ore, and goes high w hen 1.5V or less. N o connection N o connection M IC pream p. input (2) :
• R 11 and C 13 connected betw een Pin15 and this pin determ ine the f. characteristics. B T signal input :
• B eep tone (B T) signals are input through a coupling capacitor C 15.
• Input im pedance is 10kΩ . Strobe signal input :
• The strobe signal for serial control data is input to this pin. The rising edge of the strobe signal deter- m ines the tim ing at w hich internal control address or O N /O FF status is validated. C lock signal input :
• The clock signal for serial control data is input to this pin. The rising edge of the clock signal determ ines the tim ing at w hich data is read. × V B E (TrC PC )= = 2.5V (Ta=25˚C ) R 1 + R 2 R 1 D escriptionW aveform R em arksPinN o. Sym bol I/O Equivalent C ircuit 10kΩ V R EF 10kΩ V R EF/SN 10kΩ V R EF 200kΩ 100kΩ 300kΩ V C C 10kΩ 200kΩ 150kΩ21 144kΩ V L R 2 R 1 56kΩ TrC PC 300kΩ V C C 10kΩ V R EF V R EF W ith signal O N V R EF W ith signal O N V R EF V C C 0.2V Line voltage increases V C C 0.2V Line interruption

28 ID A TA

L – V C C V O X . O U T O31 32 SP. O U T D H – O U T V O X D ET O O O I R F2 – O U T O33 R F1 – O U T O34 V O X IN37 D ata input :

• Serial data is input to this pin. D ata is read into the internal shift register in synchroniza- tion w ith clock signals. G round :
• This is the ground pin for the logic circuits. V O X detector output :
• This is an open collector out- put.
• This pin goes low w hen voice signals are input to Pin37. Loudspeaker link output :
• This is a link sw itch output to an external loudspeaker am plifier.
• The output am plifier gain is selectable betw een 12 and 0dB .
• O utput im pedance is 50–30Ω .
• O utput w aveform s are shaped stable internally (by the threshold circuit). W hen address 2F of the cross- point sw itch is O FF, the output am plifier gain is set to 12 dB . Logic pow er supply input : R F2 link output :
• This is a link sw itch output.
• O utput im pedance is 50–30Ω . Intercom link output :
• This is a link sw itch output to a intercom .
• O utput im pedance is 50–30Ω . V O X detection control :
• A sm oothing capacitor (C17) and a resistor (R19) connect in parallel to this pin to adjust the attack and recovery tim es of the V O X detec- tor. V O X am p. input :
• V O X (voice detection) signals are input to this pin.
• Input im pedance is 500Ω .
• V O X detection can be done in tw o w ays : A ) W ith sm all C 17 (560pF) and sm all R 19 (39kΩ ) V O X input V O X output B ) W ith large C 17 (22µF) and large R 19 (100kΩ ) V O X input V O X output
• Input sensitivity is calculat- ed as follow s : A djust the f. characteristics and sensitivity based on the above calculation. G = R 2//ZC 1 R 1 D escriptionW aveform R em arksPinN o. Sym bol I/O Equivalent C ircuit R F1 link output :
• This is a link sw itch output.
• O utput im pedance is 50–30Ω . 300kΩ V C C 10kΩ 68kΩ10kΩ 50kΩ V R EF 30kΩ10kΩ 50kΩLIN K From LIN K SW LIN K From LIN K SW 0/12dB V R EF V R EF 90kΩ10kΩ 50kΩLIN K From LIN K SW V R EF 500Ω 500Ω R 1 R 2C 1 V R EF V C C V oice on V R EF V R EF V R EF V R EF H alf-w ave rectification (w ith no capacitor) D C (w ith a capacitor) Pin36 output Pin37 input n Pin D escriptions (cont.)

40 A LC . IN I 41 A LC . D ET O

42 SP –

PR E – IN I R D PR E – N F I R EC PR E – O U T O

46 B IA S

48 EQ . N F I 49 EQ . O U T O

50 V R EF –

47 H EA D I/O

A LC input :

• Pin45 connects through a cou- pling capacitor to this pin.
• Input im pedance is 10kΩ .
• G round Pin41 if no A LC cir- cuit is used.
• The larger C 20, the longer the attack tim e. The sm aller R 22, the shorter the recovery tim e.
• A ddress 07 of the cross-point SW determ ines the O N /O FF status of the rec. pream p.
• The bias current to the head is : IH = × 3 V ref = V R EG
• The gain of the equalizer am p. is calculated the sam e w ay as the receiver pream p.
• A ddress 0F of the cross-point SW determ ines the O N /O FF status of the EQ am p. The gain (G ) of the recording pream plifier is : G = – A LC detection control :
• A sm oothing capacitor (C20) and a resistor (R22) connect in parallel to this pin to adjust the attack and recovery tim es of the A LC. Loudspeaker link input :
• SP signals to this pin are output through a coupling capacitor to the link sw itch.
• Input im pedance is 50kΩ . R ecording input :
• R ecording signals are input through a coupling capacitor to this pin.
• Input im pedance is norm ally 10 kΩ . It decreases during A LC operation. Recording pream p. inverse input :
• A C /R com bination betw een Pin45 and this pin determ ines the gain and f. charac- teristics of the recording pream plifier. R ecording pream p. output :
• O utputs am plified recording sig- nals.
• O utput im pedance is 50–30Ω . To recording head :
• A recording head connects to this pin. EQ am p. inverse input :
• A C /R com bination betw een pin49 and this pin determ ines the equalizer characteristics. EQ am p. output :
• O utputs am plified equalizer sig- nals.
• O utput im pedance is 50–30Ω . R EC /PLA Y int. ref. voltage output :
• The pin5 ref. voltage is buf- fered and output from this pin. R ecording bias current control :
• A C/R com bination connected to this pin determ ines the recording bias current and gain of a recording head.
• The sm aller the resistance of the C/R com bi- nation, the greater the bias current and gain. R 26 R 24 + 1 ω C 23 V ref R 27 Full-w ave rectification (w ith no capacitor) V R EF V R EF V R EF V R EF V R EF D uring recording D uring playing B ias voltage V R EF V R EF V R EF (C O N ST) 2kΩ V C C V R EF LIN K To LIN K SW 50kΩ V R EF From A LC 22kΩ10kΩ 10kΩ V R EF V C C R 27 From recording head V R EF 505 V R EF O OLTS – O U T LR C – O U T Tim e stam p link output :
• This is a buffered link sw itch output.
• O utput im pedance is 50–30Ω . D escriptionW aveform R em arksPinN o. Sym bol I/O Equivalent C ircuit R ecording link output :
• This is a buffered link sw itch output.
• O utput im pedance is 50–30Ω . V R EF V R EF D C (w ith a capacitor) Pin$1 output Input LIN K To LIN K SW + n Pin D escriptions (cont.)

n Pin D escriptions (cont.) A U X O U T O A U X IN D H IN I I

57 R F1

I I I O

62 V LC

Internal supply voltage output :

• A pow er supply derived from line voltage is output from this pin to the internal speech netw ork. C ircuit voltage control (2) :
• This pin is grounded through C 38. 2-5 V D C depending on V L The gain of the A U X pream p. is calculated the sam e w ay as the rec. pream p. The input im pedance as illus- trated left and C 33, C 34, or C 35 form a H PF.
• The larger C 36, the longer the pow er-O N reset tim e.
• The pow er-O N reset signal is out- put w hen the supply voltage reaches 4V . C 38 (typically 47µF) deter- m ines how the circuit voltage fluctuates. R F2 link input :
• R F1 signals are input through a coupling capacitor C 34 to this pin.
• Input im pedance is 10kΩ . Pow er-O N reset control :
• C 36 betw een this pin and G N D determ ines the pow er-O N reset tim e of the logic circuits. A U X link input :
• A U X signals are input through a coupling capacitor to this pin. External supply voltage input :
• 5 – 0.5 V pow er supply is input to this pin. To LIN K SW V R EF V R EF V R EF V R EF 10kΩ To LIN K SW56 V R EF V R EF 57/58 10kΩ To LIN K SW V R EF V C C R eset signal 50kΩ 150kΩ Com parator –0.5V D C V C C – 0.2V 2V during pow er failure V L

52 M IX

53 M IX

The gain of the M IX pream p. is calculated the sam e w ay as the rec. pream p. M IX pream p. output :

• A C/R com bination betw een Pin53 and this pin determ ines the gain and f. characteristics of the M IX pre- am p.
• O utput im pedance is 50–30Ω . M IX link input :
• M IX signals are input through a coupling capacitor to this pin. A U X pream p. output :
• A C/R com bination betw een Pin55 and this pin determ ines the gain and f. characteristics of the A U X pre- am p.
• O utput im pedance is 50–30Ω . Intercom link input :
• Intercom signals are input through a coupling capacitor C33 to this pin.
• Input im pedance is 10kΩ . R F1 link input :
• R F1 signals are input through a coupling capacitor C 34 to this pin.
• Input im pedance is 10kΩ . V R EF To LIN K SW V R EF

51 G N D G round :

• O utput im pedance is 50–30Ω . D escriptionW aveform R em arksPinN o. Sym bol I/O Equivalent C ircuit

(B asic B lock D iagram s) Latch circuit O utput (cross-point SW and other controls) D ecoder (6 bit, 48 channels) A 6 A 5 A 4 A 3 A 2 A 1 C lock C lock D ata Strobe D ata Strobe D 1 0 0 1 1 0 1 R eset D ecoder Shift register Tim e charts (assum ing the address h26 latch is to be set) 1. D ata is read into the shift register in synchronization w ith a rising edge of the clock, w ith the higher data being shifted sequentially on a first-com e highest-bit basis. 2. W hen the strobe is low , data is shifted sequentially on the sift register in synchronization w ith the clock. D ata on the latch circuit w ill not change. 3. W hen the strobe goes high, the latched data w hose address is represented by the highest 6-bit of the shift register is updated. Latched data is set w hen the least significant bit is 1, and reset w hen the bit is 0. 4. R eferring to 3 above, if the address is h00 (the highest 6- bit of the shift register are all 0s), the latch circuit is cleared (all reset) regardless of the data content. 5. A t pow er-on, the latch circuit is cleared (by pow er-O N reset). n Pin D escriptions (cont.) I OPD 2 PD I 0 to 3V depending on V L Sam e as above V L– 33Ω × IL ZTel is 1.5 to 2kΩ on the IC side. It m ust be adjusted to 600Ω by inserting a 820Ω resistor betw een V L and G N D . D C D C V L 33Ω 15Ω Pow er supply 33Ω 820Ω R 40 100µ

64 V L

Line current bypass (2) :

• Line current is bypassed from this pin through R 39 to G N D . R 39 m ust be 1/2 W or m ore. Line current bypass (1) :
• Line current is bypassed from this pin through R 40 to Pinw . R 40 m ust be 1/2 W or m ore. D escriptionW aveform R em arksPinN o. Sym bol I/O Equivalent C ircuit

1. O ther control sw itches (A ddress) (D escription)

00 A ll reset

07 R ecording am p. O N 0F Playing am p. O N

17 R eceiver volum e 6 dB up

1F R eceiver volum e 9 dB up (w hen address 17 is on) 27 H andset receiver am p. m ute 2F Loudspeaker am p. gain 12 dB dow n N ote) A ddress is in hexadecim al. N ote) Em pty space m eans “not applicable.” A ddress is in hexadecim al. Input O utput Line outputH andset rec. Loudspeaker Intercom R F1 R F2 R ecording Tim e stam p n Logic C ircuits A ddress Specifications 1. C ross-point sw itch Loudspeaker M icrophone R eceiver Intercom R F1 R F2 M IX A U X n Package power dissipation 200 0 150125100 900m W A m bient Tem perature Ta (˚C ) 640m W Pow er D issipation PD (m W ) 755025 1600 1400 1200 1000 800 600 400 PD – Ta

161 2 3 4 5 6 7 8 9 10 11 12 13 14 15 3348 47 46 45 44 43 42 41 40 39 38 37 36 35 34 10dB dB dB dB dB C O M P 0dB 0dB 0dB 0dB 0dB 0dB 0dB 0dB 0dB 0dB V ref V O X D et. I N J A LC D etA LC P.O .R V ref A PLine Supply A P A P C ont. D M C ont. D C C ont. D –+ –+ dB R F2. O U T R F1. O U T D H . O U T V O X . D ET V O X . IN TS. O U T A LC . IN R EC . IN R EC . PR E. N F R EC . PR E. O U T R EC . A D J P.R . H EA D EQ . IN A LC . D ET LIN K . R EC . O U T JP30.068µF 0.068µF 0.15µF 22µF 0.47µF 0.1µF C 17 560pF 0.033µF 10kΩ 10kΩ C 18 C 19 C 20 22µF R 21 R 23 100kΩ 10kΩ 10kΩ 1kΩ56kΩ R 24 C 21 C 23 C 24R 25 R 27 R 26 47kΩ R 26 C 25 12kΩ C 22 R 19R 20 V O X IN JP2 LIN K R – O U T A LC INLIN K SP– INPLA Y IN R EC O U T EQ . O U T C 42 22µF 0.01µF 100µF C 28 P/R . V R EF P/R . G N D M IX . IN A U X . IN D H . IN R F1. IN (R 36 to 38 : for level adjustm ent) R F2. IN A U X . O U T M IX . O U T 0.068µF 0.068µF 0.068µF R 33 R 35 R 38 10kΩ 10kΩ C 30 C 32 C 33 0.068µF R 37 C 34 0.068µF 10µF 100µF PR C R 38 C 35 C 36 C 39 100µF 47µF 100 µF R 4 2.7kΩ R 5 121kΩ JP1 C 1 0.022µF R 3 4.7kΩ Side-tone circuit 820kΩ C 37 C 38 R 15 R 33 C 39 R 40 V L V C C V R EG V LC PD 2 PD 1 G N D G N D V L R 1 27 22µFC 2 0.01µF C 3 100µF C 4 22µF 0.01µF 0.1µF 0.068µF 0.0015µF 0.068µF C 12 0.068µF M IC 10kΩ 0.001µF 0.1µF C 11 C 8 R 7 47kΩ R 8 6.8kΩ C 5 C 6 C 7 12kΩ R 6C 9 R 2 470 ST V L. C O N T V ref1 V ref2 H C O A PC T. FILTER R . FILTER R . PreO U T R – O U T (1) R – O U T (2) 10kΩ 27kΩ R 9 R 11 C 13 C 14 0.068µF C 15 R 13 C PC H C C STR C LK D A TA LO G IC . G N D LO G IC . V C C V O X . O U T SP. O U T C 16 N C N C SW 2 O pen V R EG 10kΩR 10 M IC . O U T M IC . IN M IC . IN (–) M IC . IN (+) D Y M F. IN B T. IN D M . C O N T D C . C O N T R . PreIN 20kΩ R 32 20kΩ R 34 C 26R 29 R 30 C 27 R 31 1kΩ 330kΩ 10kΩ 1µF + + + 100µF 120kΩ R 43 SP SP LIN R EC O U T TS O U T Latch Pow er Supply C ontrol H old off D ecoder M IC LIN D H D H R F1 R F2 R F1 R F2 M IX A U X To test the circuit, short R 41 and use a 1kΩ resistor for a head.