AN5693K PANASONIC | Alldatasheet
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Technical content
Luminance,Chroma and Sync. Signals Processing IC(with Built-in I2C- bus Interface)for PAL/NTSC Color-TV n Overview The AN5693K is an IC that processes PAL-and NTSC- compatible video,chroma,RGB and sync. signals. n Features
- Built-in I2C-bus control interface.
- SECAM-compatible together with the AN5637 SECAM signal processing IC. n Applications
- TV(Multi-system compatible) SDIP052-P-0600A Unit : mm 26 27 47.7±0.3 13.7±0.3 (15.24)3 to 15˚ 3 to 15˚ (0.7) 3.85±0.3 (3.3) 1.778 0.5±0.1 1.0±0.25
*4-bit *7-bit *1-bit *1-bit *4-bit *7-bit *2-bit *1-bit *6-bit *7-bit *1-bit *1-bit *8-bit *7-bit *Drive 8-bit *Cut off 9-bit *1-bit 28Video In N.C. 29Video Out 30BL Det. Y In 31 32Ver. Clamp 33Ver. Sync. In 34Hor. Sync. In GND(VCJ) 35V CC3 (VCJ) 39V CC2 40AFC2 41AFC1 42Hor. VCO 43X-ray 44H-Out 4550/60Hz Det. Out 46V-Out 47SECAM 48-(B-Y)Out 49-(R-Y)Out -(B-Y)In -(R-Y)In 50SCP 38FBP In C In CV clamp Video adjust Hor. sync. sep. Ver. BGP sync. sep. LPF Y contrast Y DAC out I2C bus interface drive cut off B BPF Chroma SW NTSC BPF PALSW System FF det. ACC Tint APC amp. ACC generate CW HVBLK HBLK SCPHVCO drive cut off R cut off G SW out clamp Black expansion Trap Ext. DAC1 *9-bit Ext. DAC2 *7-bit Ext. DAC3 Sharpness (Service) Hor. lock det. Hor. AFC2 AFC1 reg. count down 50/60Hz (50/60Hz) detect Killer ident Hor. count down Ver.demod B-Y demod Brightness +/- R-Y contrast Chroma Saturation out Ver. SW PN/S down Shut clamp R-Y clamp G-Y clamp B-Y G-Y 1 R-Clamp
2 G-Clamp
3 B-Clamp
4 Killer
5 Killer Out
6 APC
7 VCO 4.43MHz 8 VCO 3.58MHz
9 Spot Killer
10 Y S
14 V CC1 9V
15 R-Out
16 G-Out
17 B-Out
18 Lock Det.
19 GND(RGB)
20 ACL
21 SDA
22 SCL
23 GND(Ext. DAC) 26 Ext. DAC3 Ext. DAC2 Ext. DAC1 (8-bit)
Pin No. Description 1( R -Y)Clamp 2( G -Y)Clamp 3( B -Y)Clamp
4 Killer Filter
5 Killer Output
6 Chroma APC Filter
7 Chroma VCO 4.43 MHz 8 Chroma VCO 3.58 MHz
10 Y S Input(Fast Blanking)
11 External R Input
12 External G Input
13 External B Input
14 V CC1
15 R Output
16 G Output
17 B Output
18 Hor. Lock Detect
19 GND(RGB/I 2C/DAC)
23 GND(EXT DAC)
24 External DAC 1 DC
25 External DAC 2 DC
26 External DAC 3 DC
Pin No. Description 27 N.C.
28 Video Level Adjust Input
29 Video Level Adjust Output
30 Black Level Det/Blank Off SW
31 Y Input
32 Ver. Sync. Clamp 33 Ver. Sync. Input 34 Hor. Sync. Input
35 V CC3 (Chroma/Jungle/DAC)
36 Chroma Input/Black Exp. Start
37 GND(Video/Chroma/Jungle)
38 FBP Input
39 V CC2 (Hor. Stability Supply) 40 Hor. AFC 2 Filter 41 Hor. AFC 1 Filter 42 Hor. VCO(32 f H )
43 X-Ray Protection Input
44 Hor.Pulse Output 45 Ver. 50/60 Hz Detect Output 46 Ver. Pulse Output
47 SECAM Interface/CW Output
48 -(B-Y)Output 49 -(R-Y)Output
50 Sandcastle Pulse Output
51 -(B-Y)Input 52 -(R-Y)Input
n Absolute Maximum Ratings Parameter Symbol Rating Unit Power supply voltage V CC V CC1 (14) 10.5 V V CC3 (35) 6.0 Power supply current I CC I14 77 mA I35 119 I39 27 Power dissipation *2 PD 1 372 mW Operating ambient temperature *1 Topr -20 to +70 °C Storage temperature *1 Tstg -55 to +150 °C n Recommended Operating Range Parameter Symbol Range Unit Operating supply voltage range V CC1 8.1 to 9.9 V V CC3 4.5 to 5.5 Operating supply pin voltage V 5 0 to 6 V V 9 0 to V14 V 10 0 to 6 V 11 0 to 6 V 12 0 to 6 V 13 0 to 6 V 21 0 to 6 V 22 0 to 6 V 24 0 to V14 V 25 0 to V14 V 36 0 to V14 V 38 0 to V47 V 43 0 to 2 V 45 0 to 6 V 47 0 to V14 Note) *1 : The temperature of all items shall be Ta = 25 °C, except storage temperature and operating ambient temperature. *2 : Power dissipation is at Ta = 70 °C(Refer to "Technical information") Note) Do not apply voltage or current externally to any pin not listed in this table. As for circuit current,(+)is the current flowing into the IC and(-)is the current flowing out of the IC.
n Electrical Characteristics at Ta = 25 °C Parameter Symbol Conditions Min Typ Max Unit Power supply DAC data is standard. Supply current 1 I 14 Current when V14 = 9 V 3 84 85 8m A Supply current 2 I 35 Current when V35 = 5 V 4 86 07 2m A Steady state supply voltage V39 When Pin39 current 5.8 6.5 7.2 V I = 15 mA,Pin39 voltage Steady state supply Current I39 Current when V39 = 5 V 2 5 7 mA Steady state supply input R 39 DC measurement input resistance when 1 5 10 W resistance I 39 = 10 mA ~ 25 mA Interface Video adjust gain V PO DC measurement 20 log output(0A = F8) 5 6 7 dB output(0A = 08) Video adjust output resistance RO29 DC measurement 70 120 170 W External DAC 1 DC voltage VEXT1max Pin24 DC voltage when DAC 0C = 00 3.10 3.40 3.70 V (max.) DC measurement External DAC 1 DC voltage VEXT1min Pin24 DC voltage when DAC 0C = 7F 2.10 2.40 2.70 V (min.) DC measurement External DAC 2 DC voltage VEXT2max Pin25 DC voltage DAC 0B = 00,04D7 = 0 7.8 8.1 8.7 V (max.) DC measurement External DAC 2 DC voltage VEXT2min Pin25 DC voltage DAC 0B = FF,04D7 = 1 0.1 0.8 1.0 V (min.) DC measurement n Recommended Operating Range Parameter Symbol Range Unit Operating supply circuit current I 39 10 to 25 mA I15 - 6.0 to + 0.6 I16 - 6.0 to + 0.6 I17 - 6.0 to + 0.6 I28 - 0.3 to + 0.1 I29 - 2.4 to + 0.8 I33 - 0.8 to + 0.1 I34 - 0.8 to + 0.1 I44 - 6.4 to + 0.1 I46 - 0.8 to + 0.1 I47 - 0.3 to + 0.1 Note) Do not apply voltage or current externally to any pin not listed in this table. As for circuit current,(+)is the current flowing into the IC and(-)is the current flowing out of the IC.
n Electrical Characteristics at Ta = 25 °C (continued) Parameter Symbol Conditions Min Typ Max Unit Interface(continued) External DAC 3 DC voltage VEXT3max Pin26 DC voltage when DAC 0D = 7F 5.50 6.00 6.50 V (max.) DC measurement External DAC 3 DC voltage VEXT3min Pin26 DC voltage when DAC 0D = 00 0.90 1.00 1.15 V (min.) DC measurement External DAC 1 maximum I EXT1max Pin24 DC current when DAC 0C = 7F 200 ¾¾m A output current DC measurement External DAC 3 maximum I EXT3max Pin26 DC current when DAC 0D = 7F 1.0 ¾¾ mA output current DC measurement Video signal processing Input 0.6 VPP stair step. Measure at G-out(VWB = 0.42 VOP ) Contrast variable range Y Cmax/min DAC 03 = 7F,DAC 03 = 00 20 25 33 dB Video frequency characteristics fYC f = 0.2 MHz as reference to -3 dB. 5.5 6.8 ¾ MHz DAC 0E D1 = 1,DAC 04 = 00(Sharp) Sharpness variable range YSmax/min f = 3.8 MHz,DAC 0E D1 = 1 9 13 17 dB Sharp : (04 3F)/(04 00) Pedestal variable range DV PED Difference between DAC 02 = 00 & FF 2.0 2.6 3.2 V (Brightness) Brightness control sensitivityDV BRT Average variable range of DAC 02 = 60 & A0 8 11 14 mV/step Video input clamp voltage VYCLP Pin31 clamp voltage 3.2 3.7 4.2 V increase Blanking off threshold voltage VBOFF Reduse Pin30 voltage ; the voltage when 0.3 0.5 0.9 V blanking is off Blanking level V YBL Blanking pulse DC voltage. 0.5 1.0 1.5 V DC transmission quantity T DC APL : 10 % to 90 %,TDC 9 100 110 % TDC (DAC - DDC)100 % DAC Video input clamp current IYCLP DC measurement IC : internal sink current 8 13 18 mA ACL start point V ACL ACL Pin20 voltage reduces from 5 V until 3.4 3.7 4.0 V output is lesser by 10 %
n Electrical Characteristics at Ta = 25 °C (continued) Parameter Symbol Conditions Min Typ Max Unit Color signal processing All tests on : Burst 300 mVPP(PAL),typ. : B-out Color difference output(typ.) VCOtyp Input : Color bar 2.6 3.3 4.0 V PP DAC 00 = 40(typ.),DAC 03 = 40(typ.) Color difference output(max.) VCOmax Input : Color bar 2.3 3.0 ¾ V OP DAC 00 = 7F,DAC 03 = 40 Color difference output(min.) VCOmin Input : Color bar 0 ¾ 100 mV PP DAC 00 = 00,DAC 03 =40 Chroma contrast variable range CCmax/min DAC 00 = 40,DAC 03 = 7F,DAC 03 = 00 20 25 33 dB ACC.characteristics 1 ACC1 Input : Rainbow 0.9 1.0 1.2 Times Burst increase from 300 mVPP fi 600 mVPP ACC.characteristics 2 ACC2 Input : Rainbow 0.7 1.0 1.1 Times Burst decrease from 300 mVPP fi 60 mVPP NTSC tint centre Dq C Difference -13 0 13 Step between DAC 01 = 40 & when tint is centre NTSC tint adjustable range 1Dq 1 Input : Rainbow,DAC 01 = 7F(Tint) 30 50 65 Deg NTSC tint adjustable range 2Dq 2 Input : Rainbow,DAC 01 = 00(Tint) -65 -50 -30 Deg Demodulation output ratio(R) R/B Input : Rainbow 0.71 0.83 0.95 Times PAL,NTSC Ratio of R-out/B-out Demodulation output ratio(G) G/B Input : Rainbow 0.31 0.37 0.43 Times PAL,NTSC Ratio of G-out/B-out Color difference output angle— R Input : Rainbow 78 90 102 Deg (R)ɹPAL,NTSC Color difference output angle— G Input : Rainbow 224 236 248 Deg (G)ɹPAL,NTSC Color killer tolerance(PAL) VKILLP Input : Color bar,0 dB = 300 mVPP -57 -44 -34 dB Attenuate input level Color killer tolerance(NTSC) VKILLN Input : Color bar,0 dB = 300 mVPP -57 -44 -34 dB Attenuate input level APC pull-in range(H) f CPH Input : Color bar 450 900 ¾ Hz PAL,NTSC High side pull-in range APC pull-in range(L) f CPL Input : Color bar ¾- 900 - 450 Hz PAL,NTSC Low side pull-in range Color killer detector output VKC Voltage at Pin5 when chroma signal is 4.5 5.0 ¾ V voltage(Color) inputed Color killer detector output VKBW Voltage at Pin5 when no chroma signal is 0 0.1 0.5 V voltage(B/W) inputed
n Electrical Characteristics at Ta = 25 °C (continued) Parameter Symbol Conditions Min Typ Max Unit Color signal processing All tests on : Burst 300 mVPP(PAL)typ.: B-out (continued) Demodulation output-(B-Y) V DB Input : Color bar(NTSC : Adjust to tint 555 695 835 mV PP PAL,NTSC centre)Measure Pin48 Demodulation output-(R-Y) V DR Input : Color bar(NTSC : Adjust to tint 430 540 650 mV PP PAL,NTSC centre)Measure Pin49 Demodulation output angle — R DB Input : Rainbow -5 0 5 Deg — B ɹPAL,NTSC Phase difference of B -Y axis Demodulation output angle — R DR Input : Rainbow 85 90 95 Deg — R ɹPAL,NTSC Phase difference of B -Y and R-Y axis CW output level(4.43 MHz) VCWP AC component at Pin47 when VCO is at 250 300 350 mV PP
4.43 MHz
CW output level(3.58 MHz) VCWN AC component at Pin47 when VCO is at¾ 05 0 m V PP
3.58 MHz
SECAM output CW period T CW Period of CW is outputed when in SECAM1.31 1.41 1.51 ms SECAM detector current I SECAM Minimum current from Pin47 when 50 100 150 ms SECAM is detected PAL/NTSC output DC voltage V47PN PAL/NTSC output DC voltage at Pin47 0.80 1.30 1.65 V SECAM output DC voltage V 47S SECAM output DC voltage at Pin47 4.1 4.6 5.1 V Demodulation output R O48,49PN Pin impadance of Pin48,49 in PAL/NTSC 390 480 570 W impedance(PAL/NTSC) mode -(R-Y), -(B-Y) Demodulation output R O48,49S Pin impadance of Pin48,49 in SECAM 100 ¾¾ kW impedance(SECAM) mode -(R-Y), -(B-Y) RGB processing DAC data standard Pedestal difference voltageDV IPL R,G,B out pedestal difference voltage 0 ¾ 0.3 V Brightness voltage trackingDV BL DAC 02 = 40 to C0(Brightness). 0.9 1.0 1.1 Times Ratio of variable level Video voltage gain ratio DG YC R,B out output ratio with G-oth 0.8 1.0 1.2 Times Video voltage gain trackingDTCONT DAC 03 = 20 to 60 ratio(contrast)of gain 0.9 1.0 1.1 Times Times Driver control characteristics GDV R,B out AC adj. amount 5.3 6.3 7.3 dB Driver DAC 08 = 00 to FF Driver DAC 09 = 00 to FF Cut-off control characteristics VCUTOFF R,G,B output DC cut off DAC range from 1.9 2.4 2.9 V min.to max. Y S threshold voltage V YS Smallest level when YS is on 0.7 1.0 1.3 V
n Electrical Characteristics at Ta = 25 °C (continued) Parameter Symbol Conditions Min Typ Max Unit RGB processing DAC data standard (continued) External RGB DC Voltage V EPL Y S is on 1.7 2.3 2.9 V External RGB pedestal DV EPL Y S is on 0 ¾ 250 mV difference voltage(R/B)(G/B) Internal/External pedestalDV PL/IE Internal-External 50 200 400 mV difference voltage External RGB output Voltage VERGB Input 3 VPP,DAC 03 = 7F(Contrast) 4.3 5.4 6.5 V PP External RGB output DV ERGB Input 3 VPP,DAC 03 = 7F(Contrast) - 0.6 0 + 0.6 V difference voltage External RGB contrast E Cmax/min DAC 03 = 7F,DAC 03 = 00 10 13 16 dB control characteristics External RGB frequency f RGBC Input 0.2 VPP,DC = 1 V 8 12 ¾ MHz characteristics Synchronizing signal processing Horizontal output free run fHO No input signal 15.33 15.63 15.93 kHz frequency The frequency at Pin44 Horizontal output pulse dutytHO Horizontal output pulse's high level's 31 37 43 % duty Horizontal output pull-in range fHP Horizontal sync. sep. freq. pull-in approach-– 500 – 650 ¾ Hz ing 15.625 kHz Vertical free run frequency fVO-P Forced 50 Hz mode, DAC 0E-D2 = 1 4 85 05 2H z (PAL) D3 = 0,No sync.signal input Vertical free run frequency fVO-N Forced 60 Hz mode, DAC 0E-D2 = 1 5 86 06 2H z (NTSC) D3 = 1,No sync.signal input Vertical output pulse widthtVO Hor. & Ver.sync. condition,the pulse width 9 10 11 1/fH NTSC,PAL at Pin46 Vertical pull-in range(PAL) fVPP fH = 15.625 kHz,Forced 50 Hz mode 46 ¾ 54 Hz Vertical pull-in range(NTSC) fVPN fH = 15.75 kHz,Forced 60 Hz mode 56 ¾ 64 Hz Horizontal output voltage(H) V44H Horizontal output pulse's high level's DC 3.2 3.5 3.8 V voltage Horizontal output voltage(L) V44L Horizontal output pulse's low level's DC 0 ¾ 0.3 V voltage Vertical output voltage(H) V46H Vertical output pulse's high level's DC 3.9 4.2 4.5 V voltage Vertical output voltage(L) V46L Vertical output pulse's low level's DC 0 ¾ 0.3 V voltage Screen centre variable rangeDTHC Variable amount of phase between HSYNC 2.6 3.2 4.4 ms & H OUT DAC 0A = 80 to 8F
n Electrical Characteristics at Ta = 25 °C (continued) Parameter Symbol Conditions Min Typ Max Unit Synchronizing signal processing(continued) Shut down operating V 43L Pin43 minimum voltage when H-out does 0.60 0.68 0.76 V not appear Vertical frequency f 50 Vertical input freq.when the DC level at 47¾ 55 Hz detection operation(50 Hz) Pin45 = "L"(< 0.5 V) Vertical frequency f 60 Vertical input freq. when the DC level at 57¾ 63 Hz detection operation(60 Hz) Pin45 = "H"(> 4.5 V) Sync. separation input clamp V33 V 33 clamp voltage 1.0 1.3 1.6 V voltage(Vertical) Sync. separation input clamp V34 V 34 clamp voltage 1.0 1.3 1.6 V voltage(Horizontal) Horizontal output start voltage V fHS Minimum V 38 when horizontal output is 3.4 4.2 5.0 V above 1 VPP,fo > 10 kHz I2C interface Sinking current at ACK I ACK When ACK,Pin21 pin current with 2.2 kW 1.8 2.5 5.0 mA pull-up to 5 V SCL,SDA signal input high V IHI ¾ 3.1 ¾ 5.0 V level SCL,SDA signal input low V ILO ¾ 0 ¾ 0.9 V level Input possible maximum f Imax ¾ 100 ¾¾ Kbit/s frequency
- Reference data for design Note) The characteristic values below are theoretical values for designing and not guaranteed. Parameter Symbol Conditions Min Typ Max Unit Video signal processing (VWB = 0.42 VOP ) Input 0.6 VPP stair step. Measure at G-out Y signal delay time t DL Measure output's delay time with input 620 690 760 ns (PAL = 4.43 MHz) Black level correction 1 V BLC1 All black input. Find the diff.of G-out when-100 0 +100 mV Pin30 is 9 V & open Black level correction 2 V BLC2 All black input. Find the diff.of G-out when 500 8001100 mV Pin30 is 3 V & 9 V Black level correction 3 V BLC3 Input : About 20 IRE the diff.of G-out when 100 300 500 mV Pin30 is open & 9 V Contrast variation with DV CS Y-out output level difference when -300 0 +300 mV sharpness sharpness = max. to min. Brightness variation with DV BS Pedestal DC level difference when -250 0 +250 mV sharpness sharpness = max. to min.
n Electrical Characteristics at Ta = 25 °C (continued)
- Reference data for design (continued) Note) The characteristic values below are theoretical values for designing and not guaranteed. Parameter Symbol Conditions Min Typ Max Unit Video signal processing (VWB = 0.42 VOP )Input 0.6 VPP stair step. Measure at G-out(continued) Y input dynamic range V Imax Contrast DAC 03 = 40 1.0 1.7 ¾ V PP Measure at video input Pin31 Y S/N ratio SN Y Contrast DAC 03 = 7 F 51 56 ¾ dB Black level expansion start VBLS Start point when 37 42 47 IRE point V 36 = 4.5 V Trap on/off gain differenceDG TRAP Trap on/off ratio -10 +1d B Trap on/off delay time variationDtTRAP Trap on/off 480 530 580 ns Trap frequency tolerance DfTRAP When chroma input is 4.43 MHz, trap centre-70 0 +70 kHz frequency from 4.43 M Trap attenuation 4.43 MHz ATTTRAPP When chroma input is 4.43 MHz, 4.43 MHz 26 30 ¾ dB component attenuation Trap attenuation 3.58 MHz ATTTRAPN When chroma input is 3.58 MHz, 3.58 MHz 26 30 ¾ dB component attenuation Trap automatic adjustment fTRAP VCO frequency of DfTRAP £ 70 kHz 3 ¾ 5 MHz range Trap set frequency f ST DAC 0 E -D6 = 1 4.7 5.5 6.3 MHz Trap's frequency Video signal output VCC DV Y /V V CC1 = 9 V (– 10 %) 0 100 200 mV/V variation Video signal output temperatureDV Y /T T a = -20 °C to +70 °C0 5 1 0 % variation PAL/NTSC delay time DtP/N Trap on(NTSC-PAL) -10 10 30 ns difference Color signal processing All tests on : Burst 300 mVPP(PAL)standard is B-out Demodulation output residue VCAR1 Pin48,49 output's 2nd harmonics 0 ¾ 30 mV carrier Color difference output residue VCAR2 Pin15,16,17 output's 2nd harmonics 0 ¾ 50 mV carrier VCO free run frequency f CP Compare with standard -300 0 +300 Hz (PAL) f = 4.433619 MHz VCO free run frequency f CN Compare with standard -300 0 +300 Hz (NTSC) f = 3.579545 MHz VCO V CC variation DfC V CC1 = 9 V (– 10 %) -300 0 +300 Hz V CC V CC3 = 5 V (– 10 %) Phase hold characteristic Dq P Tint change when 0 2 5 deg (PAL) DfC = -300 Hz to +300 Hz 100 Hz
n Electrical Characteristics at Ta = 25 °C (continued)
- Reference data for design (continued) Note) The characteristic values below are theoretical values for designing and not guaranteed. Parameter Symbol Conditions Min Typ Max Unit Color signal processing All tests on : Burst 300 mVPP(PAL)standard is B-out(continued) Phase hold characteristic Dq N Tint change when 0 2 5 deg (NTSC) DfC = -300 Hz to +300 Hz 100 Hz Color difference output R P/N R out PAL/R out NTSC 0.8 1.0 1.2 Times PAL/NTSC ratio Line crawling DV PAL Pin49 : -(R-Y)out every 1 H output 0 ¾ 50 mV difference in voltage Color difference output f CC Bandwidth when gain reduces by 3 dB ¾ 1.0 ¾ MHz frequency characteristics Chroma BPF characteristics BPFP f = 4.43 MHz -2.00 MHz output level ¾ 32 ¾ dB (PAL) difference Chroma BPF characteristics BPFN f = 3.58 MHz to2.00 MHz output level ¾ 22 ¾ dB (NTSC) difference Color difference output DV C /V V CC1 = 9 V (– 10 %) ¾– 10 – 15 % V CC variation V CC3 = 5 V (– 10 %) Color difference output DV C /T Temperature : -20 °C to +70 °C ¾– 10 – 15 % Temperature variation Color variation to brightness VBC When color : max.to min. the difference- 250 0 + 250 mV variation in pedestal DC Color to brightness variationDV BC RGB output variation voltage difference 0 ¾ 20 mV voltage RGB processing Color : DAC 00 = 60 V PP C -Y,Y delay difference DtC/Y Input : Color bar, B-out -100 0 +100 ns Green = magenta delay Y S switching speed f YS External input 3 V output level when at 7 11 ¾ MHz -3 dB frequency Exeternal RGB input dynamic VDEXT DAC 03 = 7 F(Contrast : max.) 2.0 2.5 3.2 V OP range Internal/External RGB crosstalk CTRGB f = 1 MHz 1 VPP ¾- 60 -50 dB The crosstalk level when YS = 5 V Spot killer operation V SPK Voltage at Pin9 from V9 = 9 V reduces until 7.4 7.8 8.2 V spot killer is on Contrast variation to brightness VBAC When contrast is max.to min.,the diff. in-250 0 +250 mV variation pedestal DC
n Electrical Characteristics at Ta = 25 °C (continued)
- Reference data for design (continued) Note) The characteristic values below are theoretical values for designing and not guaranteed. Parameter Symbol Conditions Min Typ Max Unit RGB processing(continued) Contrast to brightness DV BAC RGB output variation voltage difference 0 ¾ 20 mV variation voltage RGB output color/BW DV CBW Difference in pedestal voltage between- 60 0 + 60 mV DC difference voltage burst on/off Pedestal level VCC variationDV PL /V Pedestal level change when 0 200 400 mV/V V CC1 = 9 V (– 10 %) Pedestal level temperatureDV PL /T Pedestal level change when temperature-2.6 -2.2 -1.8 mV/°C variation is -20 °C ~ +70 °C Pedestal level 2 V PD2 The pedestal level when G cutoff 2.1 2.7 3.3 V DAC 05 = 18 Synchoronizing signal processing Lock detector output voltage VLD Pin18 DC voltage when horizonal AFC is 5.7 6.3 6.9 V locked Lock detector charging current ILD DC measurement – 0.6 – 0.8 –1.1 mA FBP input slice level(RGB) VFBP Minimum voltage at which blacking of 0.40 0.75 1.10 V RGB outputs happens FBP input slice level (AFC2) VFBPH Minimum voltage at which AFC 2 operates 1.5 1.9 2.3 V Horizontal AFC mm H Calculate from AFC current 30 37 44 mA/ms DC measurement Horizontal VCO-b curve bH Slope of b curve near to f = 15.7 kHz 1.4 1.9 2.4 Hz/mV NTSC,PAL edge to the BGP rising edge Burst gate pulse width(PAL) WBGPP When hor. AFC is on, BGP's pulse width 3.4 4.0 4.6 ms Burst gate pulse width(NTSC) WBGPN When hor. AFC is on, BGP's pulse width 2.5 3.0 3.5 ms Burst gate pulse output voltage VBGP Pin50 DC voltage during BGP period 4.5 4.7 4.9 V Horizontal blanking pulse VHBLK Pin50 DC voltage during H-blanking period 2.1 2.4 2.7 V output voltage Vertical blanking pulse output VVBLK Pin50 DC voltage during V-blanking period 2.1 2.4 2.7 V voltage Vertical blanking pulse width W VP Pulse width when fH = 15.625 kHz 1.31 1.41 1.51 ms (PAL) Vertical blanking pulse width WVN Pulse width when fH = 15.73 kHz 1.01 1.11 1.21 ms (NTSC) FBP allowable range T FBP delay from hor. output rising edge to FBP 12¾ 19 ms centre
n Electrical Characteristics at Ta = 25 °C (continued)
- Reference data for design (continued) Note) The characteristic values below are theoretical values for designing and not guaranteed. Parameter Symbol Conditions Min Typ Max Unit I2C interface Bus free before start t BUF ¾ 4.0 ¾¾ m s Start condition set-up time tSU,STA ¾ 4.0 ¾¾ m s Start condition hold time tHD,STA ¾ 4.0 ¾¾ m s "L" period SCL, SDA t LOW ¾ 4.0 ¾¾ m s "H" period SCL t HIGH ¾ 4.0 ¾¾ m s Rise time SCL,SDA t r ¾¾ ¾ 1.0 ms Fall time SCL,SDA t f ¾¾ ¾ 0.35 ms Data set-up time(Write) t SU,DAT ¾ 0.25 ¾¾ m s Data hold time(Write) t HD,DAT ¾ 0 ¾¾ m s Acknowledge set-up time t SU,ACK ¾¾ ¾ 3.5 ms Acknowledge hold time t HD,ACK ¾ 0 ¾¾ m s Stop condition set-up time tSU,STO ¾ 4.0 ¾¾ m s DAC 4,6,7-bit DAC DNLE L 4,6,7 1 LSB = {Data(max.)-Data(00)}/15(4-bit), 0.1 1.0 1.9 LSB 63(6-bit), 127(7-bit) Step 8-bit DAC DNLE L 8 1 LSB = {Data(FF)-Data(00)}/255(8-bit) 0.1 1.0 1.9 LSB Step Cut off DAC overlap DStep The overlap between the two 8-bit sections 27 32 37 Step of R,B cutoff & AFT
n Electrical Characteristics at Ta = 25 °C (continued)
- Description of test circuits and test methods 1.Input signal (1) Video : 10 stairs waveform 0.6 VPP(VBW = 0.42 VOP ) (2) Chroma : Color bar signal : Burst level 300 mVPP Rainbow signal : Burst level 300 mVPP (3) Synchronous : Horizontal, vertical synchronous signal input are 1.5 VPP to 2.5 VPP 2.I2C bus condition : (PAL) Sub address Data(H) 00 40 01 40 02 80 03 40 04 80 05 00 06 00 07 00 08 80 09 80 0A 88 0B 01 0C 40 0D 40 0E 01 Control Data(H) Color 00 = 40 Tint 01 = 40 Brightness 02 = 80 Contrast 03 = 40 Sharpness 04 = 00 Cutoff R,B 05, 07 = 00 Cutoff G 06 = 00 Driver R,B 08, 09 = 80 Video output 0A(upper byte) = 8* Hor.centre 0A(lower byte) = *8 External DAC 2 0B = 01 (04-D7 =1) External DAC 1 0C = 40 External DAC 3 0D = 40
Pin No. Equivalent Circuit Function Status
1 Pin1 : Color Difference Clamp Pin(R -Y) DC
2 Pin2 : Color Difference Clamp Pin(G -Y) about 7 V
3 Pin3 : Color Difference Clamp Pin(B -Y)
- Input from Pin51, 52, the color difference signals are clamped according to brightness control voltage
- The clamp pulse uses internal clamp pulse
4 Killer Filter Pin : DC
- Killer detection circuit's filter pin about 3.3 V (operate during BGP period)
- Below 2.8 V, killer is on(no color output)
5 Killer Output Pin : DC
- Killer detection circuits output pin Killer on
- Pin5 pull-up resistor, 33 kW , is connected 0.2 V to MICOM's VCC . Killer off 5 V
6 APC Filter Pin : DC
- APC detector circuit's filter pin about 2.5 V (operate during BGP period)
- As external resistor, R, becomes larger, detection sensitivity becomes larger (pull in becomes easier. Interference by noise becomes easier)
- During SECAM mode, the 40 kW is shorted to stop APC circuit's operation n Pin Equivalent Circuit 150 mA 300 W 300 W 9V(VCC1 ) 0.068 mF Brightness control C-Y CCP Pin 1,2,3
5 V(VCC3 )
(VCC1 ) 2.8 V BGP 270 W 137 kW 2.5 V 1.0 MW 100 mA 3.3 V 0.47 mF 1 V 9 V Killer det. circuit 40 mA On Killer Off 10 kW 175 W Floating resistor to m-com. 33 kW (m-com. VCC )5 V det. circuit BGP 270 W 40 kW SW 2.5 V7.5 kW R 0.022 mF 2.2 mF VCO circuit max. 1mA 3.3 V 1 V b curve fC V 6
n Pin Equivalent Circuit(continued) Pin No. Equivalent Circuit Function Status 7 Pin7 : Chroma Oscillator Pin(4.43 MHz) AC 8 Pin8 : Chroma Osicillator Pin(3.58 MHz) f = fC
- At chroma oscillator pin, either about 0.3 VPP 4.43 MHz or 3.58 MHz oscillation takes place
- Oscillation frequency switching is done by I2C bus, 0E-D0 bit
- When 0E-D0 =1, IP1, IP2 is on.
3.58 MHz is oscillating
- The PCB layout pattern between the pin and the resonator must be as short as possible
9 Spot Killer Pin : DC
- When the set is power off, it is used about 9 V for discharging the electric charge from CRT quicky
- When V CC1 reduces, RGB output pin's DC voltage rise
10 Y S Input Pin : AC
- The fast blanking pulse input pin is for (Pulse) the OSD
- Above 1 VOP is on
11 Pin11 : External R Input Pin AC
12 Pin12 : External G Input Pin (Pulse)
13 Pin13 : External B Input Pin
- The external input pins are for the OSD
- The output level changes linearly with the input level
- The Input's limiting voltage changes according to the contrast control level 500 mA 500 mA100 mA100 mA 100 mA DC 2.7 V DC 2.7 V
C7, C8 have temperature characteristics(N750)
9 V(VCC1 )
1.7 kW 1 mF 100 kW V CC1 2.7 kW10 m-com. To RGB output circuit Output 2.5V (max.) Input Contrast min. Contrast max.Pin 11,12,132.7 kW m-com.
n Pin Equivalent Circuit(continued) Pin No. Equivalent Circuit Function Status 14 ¾ V CC1 (typ. 9 V) : DC
- IF circuit 9V
- Video circuit
- RGB circuit
15 Pin15 : R out Pin AC
16 Pin16 : G out Pin
17 Pin17 : B out Pin
- BLK level about 0.9 V
- Black(pedestal)level about 2.2 V
- If Pin30(Black level detection output pin)is 0 V, blanking is removed.
18 Horizontal Synchronous Detection DC
Output Pin : When
- The phase between horizontal synchronising synchronous signal and horizontal about output pulse is detected V CC2 -VSAT
- When synchronising comes off, Pin18 voltage goes low When
- When not synchronising,color synchronising control is minimum,and chroma output comes off disappears about 0.3 V
- In the case where Pin18 voltage is used by MICOM, impedance has to be taken care(Zo ‡ 1 MW is required)
- H sync. period, Pin44 level is "H" : I 1 on "L" : I2 on 19 ¾ GND : ¾
- RGB circuit
- DAC I2C circuit
- IF circuit (VCC1 ) 130 mA C out 500 mA 50 W Pin 15 100 W
5 V(VCC3 )(VCC2 )
2.8 V To chromacircuit 800 mA 800 mA ZO 10 kW0.022 mF1 M W Pin 44 H-out Pin 34 H-sync. in
n Pin Equivalent Circuit(continued) Pin No. Equivalent Circuit Function Status
20 ACL Pin : DC
- When Pin20 DC voltage is externally about decreased, contrast is limited 3 V
21 I 2C BUS DATA Input Pin : AC
(Pulse)
22 I 2C BUS CLOCK Input Pin : AC
(Pulse) 23 ¾ GND : ¾
- External DAC circuit
24 External DAC 1 Pin : DC
- External DAC 1 voltage is adjustable by using I2C bus 9 V (VCC1 ) 5.9 V To contrast circuit 2.1 V 3.5 V 60 kW 6.9 kW 60 kW 2.3 V 2.3 V – 1 V 6.9kW 7.1 kW 7.1 kW 6.9 kW 100 mA 4.7 mF Contrast control 100 mA100 mA 30 kW30 kW ACK (VCC3 ) 100 kW50 mA100 kW 1.7 V To logic circuit Fromm-com. Data 1 kW 30 kW30 kW 5 V (VCC3 ) 100 kW50 mA100 kW 1.7 V To logic circuit Clock Fromm-com. 1 kW 40 kW 5 V 100 mA 150 W
n Pin Equivalent Circuit(continued) Pin No. Equivalent Circuit Function Status
25 External DAC 2 Pin : DC
- External DAC 2 voltage is adjustable by using I2C bus through the change in DAC output current
26 External DAC 3 Pin : DC
- External DAC 3 voltage is adjustable by using I2C bus 27 ¾ N.C. Pin ¾
28 Video Input Pin : AC
- From VIF IC, the detected signal's 1 VPP (internal video signal)input pin (composite)
- Input by DC cut
- Standard input 1 V PP(max.1.5 VPP) DC level about 1.6 V
29 Video Output Pin : AC
- Adjustable to 2 VPP by I2C bus 1.75 V PP (use 0A upper 4-bit) 9 V (VCC1 )1.1 kW1.1 kW 370 W 40 kW 370 max. 350 mA 9 V To tuner 9 V (VCC1 )500 W 56.25 kW Ext. DAC 30 kW 26 10 W 9 V (VCC1 ) Int. video 2.35 V 10 mF 50 mA 680 kW 9 V (VCC1 ) 75 mA 800 mA
n Pin Equivalent Circuit(continued) Pin No. Equivalent Circuit Function Status
30 Black level detecion output pin blanking DC
off switch pin : abuot 5.1 V
- For black expansion circuit's black level detection output filter pin
- For removing the blanking period and holding the darkest Y level
- By changing the external resistor, R, the black level expansion sensitivity can be changed. When R is bigger, area of response is smaller
- To stop black expansion circuit, set Pin30 voltage to about V CC (9 V)
- If Pin30 voltage is GND, blanking is off.(Black expansion is also off)
31 Video Input Pin : AC
- Video signal input pin 0.6 V PP (Composite video also allowable)
- Standard input 0.6 VPP
- Sync. top is clamped to 3.5 V
- Video signal is inputed to low impedance inputs
32 Vertical Synchronous Signal Clamp Pin : AC
- This is the peak clamp pin for vertical f = fV synchronous signal separation
- The integration of the vertical synchronous signal is determined by the internal time constant, but the external time constant, R1, C1, is chosen according to the required trigger timing
- Using R1 > 200 kW
- R2 is the resistor which is used to control the emitter current 9 V (VCC1 ) 5 V (VCC3 ) 80 mA 80 kW 75 kW 100 mA 5.1 V 10 kW 10 kW 180 kW R 4.7 mF To black expansion circuit To blanking circuit 9 V (VCC1 )47 kW 4.3 V 43 kW 31 1.8 kW 10 mA 50 mA 5 V (VCC3 ) 3 kW 16 kW 4.3 V 4 kW 200 W 50 kW 270 W 680 kW 220 W 2.2 mF To ver. count down
n Pin Equivalent Circuit(continued) Pin No. Equivalent Circuit Function Status 33 Pin33 : Vertical Sync. Separation Input PinAC 34 Pin34 : Horizontal Sync. Separation 2 V PP Input Pin
- Pin33, 34 internal circuits are similar
- Usually, vertical synchronous threshold is deeper than horizontal synchronous' threshold. Thus R V > RH
- R H and CH determine cutoff frequency at about 500 kHz
- R fi big, threshold becomes deeper (Sync. compression is weaker). R fi small, threshold becomes shallower (fluctuation becomes weaker due to vertical sag) Sync. top is clamped at 1.3 V 35 ¾ V CC3 (typ.5V) : DC
- For chroma and jungle circuit 5 V
36 Chroma Signal Input Pin AC + DC
Black Expansion Starting Point Adjustment Pin : Burst typ.
- Pin36 is chroma signal input pin and 300 mV PP external DC voltage is applied to adjust the starting point of black expansion DC typ. 4.5 V 37 ¾ GND : DC
- For video,chroma and jungle circuit 0 V
38 FBP Input Pin : AC
- The FBP input pin is for horizontal FBP blanking and AFC circuit
- Threshold level for HBLK : 0.7 V AFC : 1.9 V
- External DC 1.3 V must be applied to become all blanking
- Input voltage below 0 V is prohibited 5 V (VCC3 ) 16 kW16 kW 1.3 V R V 560 W To H sync. sep. To V sync. sep. 20 mA 1 mF 0.1 mFC H 1200 pF C V 680 pF 16 kW 20 mA34 R H 270 W
2 VPP
(VCC3 ) 50 mA 12.5 pF 1000 pF 15 kW
2.5 V9 V
amp. To black level expansion 9 V (VCC1 ) 25 mA100 mA 10 kW 10 kW Chroma signal 1.9 V 0.7 V 24 kW
n Pin Equivalent Circuit(continued) Pin No. Equivalent Circuit Function Status
39 Horizontal Steady State Supply Pin : DC
- Steady state supply is used by horizontal6.5 V circuit startup. Internal voltage regulating circuit is present
40 Horizontal AFC 2 Filter Pin : DC
- FBP and IC internal pulse phase 1.5 V to 3.5 V difference is compared. At Pin40, a capacitor is connected for charging and discharging this current
- The current from the picture centre position adjustment DAC establishes DC by chaging and discharging current
- Time difference from Hout to FBP-in depends on V 40 which changes the slice level of internal sawtooth waveform 41 Horizontal AFC 1 Filter Pin : DC typ. 4.3 V
- Horizontal synchrous signal and IC internal pulse phase difference is compared. At Pin41, a capacitor is connected for charging and discharging current
- R1, R2, C1, C2, are lag-lead filter used by AFC 1 47 mF V oltage regulating circuit To hor. OSC typ. 15 mA I51 V CC2 V 39 6.5 V I39 (VCC2 ) V 52 1.9 V 3.3 V 2 kW 1 kW 1 kW 2 kW AFC2 det. circuit 0.022 mFmax. 500 mA 50 mA From DAC (hor. position) I To hor. out Horizontal b curve fH V 41 1000 mA (VCC2 ) 200 mA AFC1 det. circuit Hor. OSC 1.5V 4.3 V R127 kW 27 kW 0.018 mF 10 mF 2.2 kW Hor. sync.
n Pin Equivalent Circuit(Continued) Pin No. Equivalent Circuit Function Status
42 Horizontal Oscillator Pin : AC
- Oscillates by 32 · fH = 500 kHz f = 32 fH ceramic resonator (about
- Horizontal and vertical pulses are made500 kHz) by the IC internal count down circuit
43 Over Voltage Protection Input Pin : DC
- Input pin is used by X-ray protector usually circuit for over voltage 0 V
- By internal logic circuit, when H out pulse is low, shut down starts (Prevent damaging the horizontal drive transistor)
44 Horizontal Pulse Output Pin : AC
- Duty is about 37 % (Pulse)
45 Vertical Frequency Detection Output Pin : DC
- The output of the result of the internal 0 V counter of the vertical synchronous or signal period 5 V V = 60 Hz : V45 is "H" = 50 Hz : V45 is "L" (VCC2 ) 22 kW 10 kW10 kW 80 mA 220 pF 200 mA100 mA
300 W42
Temperature characteristics present for N750 N750 (VCC2 ) 3 V 4.3 V 20 kW 20 kW20 kW 40 kW To count down (VCC2 ) 4.3 V 40 kW Hor. out 19 kW 3.5 V 0 V 10 kW 50 W 5 V (VCC3 ) +5V(m-com VCC ) 100 kW33 kW To m-com
n Pin Equivalent Circuit(Continued) Pin No. Equivalent Circuit Function Status
46 Vertical Pulse Output Pin : AC
- Nagative polarity pulse width is 10H (Pulse)
47 SECAM Interface Pin : AD + DC
- The input and output pin for the interfacing with the SECAM IC AC
- When above 100 mA current is drawn 300 mVPP from Pin47, system becomes SECAM or mode 0 mV PP
- When in non-SECAM, DC 4.6 V + AC 300 mVPP DC
- When in non-SECAM, 4.6 V DC 1.3 V + AC 300 mVPP : 4.43 MHz or or 0 mVPP : 3.58 MHz 1.3 V
48 Pin48 : -(B-Y)Output Pin AC
49 Pin49 : -(R-Y)Output Pin -(B-Y)
- when in SECAM, output circuit is off and output impedance is high impedance
- The outputs to 1 HDL AC -(R-Y) DC level about 2.5 V 5 V (VCC3 ) 50 kW 43 kW 0 V 4.2 V
50 kW61.5 kW 12 kW 200 mA 56.2 kW 13.7 kW To SECAM IC SECAM det. circuit SECAM SECAM fC 5V(VCC3 ) 100 mA100 mA100 mA 0V 1.5 kW - (B-Y) To IHDL SECAM SECAM 1.5 kW - (R-Y) 2.5 kW
n Pin Equivalent Circuit(Continued) Pin No. Equivalent Circuit Function Status
50 Sandcastle Pulse Output Pin : AC
- Sandcastle pulse is outputed to1 HDL (Pulse) and SECAM IC
51 Pin51 : -(B-Y)Input Pin AC
52 Pin52 : -(R-Y)Input Pin -(B-Y)
- From 1 HDL, color difference signal outputs are inputed to these pins
- These pins are clamped at 4.7 V pedestal AC level from the clamp circuit -(R-Y)
- The input levels at Pin51, 20 are about 2 times the output amplitude of Pin48, 49 respectively DC level 4.7 V
4.7 V 2.4 V 9 V (VCC1 )
4 VPin51
n Application Circuit Example 52 R1 -(R-Y) In G-(B-Y) In BSCP Killer -(R-Y) Out -(B-Y) Out APC CW
4.43 MHzV-Out
R HOSC AFC1 AFC2 V CC1 9 V RFBP In G B C-In GND V CC3 Ver. Clamp GND ACL SDA SCLY-In Video Out 51 2 50 3 49 4 48 5 47 6 745 844 943 1042 41 12 40 13 39 14 38 15 33 20 32 21 31 22 30 23 29 24 28 25 27 26 0.068 mF 0.068 mF 0.068 mF 0.47 mF 47 mF 100 mF 0.022 mF 10 mF GND(Ext. DAC) 47 mF
1 M W
2.2 mF 4.7 mF 68 0kW 180 kW 3.3 kW 2.2 kW 1 kW 2 kW 220 W 180 W 6.8 kW 51 W 2.2 kW 680 kW 4.7 kW 150 kW 150 kW 4.7 kW 0.022 mF 2.2 mF 12 pF (N750) 47 mF G G 4.7 mF 1 mF 0.1 mF 680 pF 120 0pF 1 000 pF 560 W 15 kW 1.5 kW 15 kW 33 kW 15 pF (N750) (N750) G B 5674321 IO IO 10 mF 1.5 kW 10 mF 1.5 kW 10 kW 54321 1234 AN78M05AN78M09 Video In BL Det. AN5693K 10 kW 10 kW 47 mF 0.022 mF V CC2 V CC1 9 V V CC3 5 V 47 mF 270 W 33 pF 10 mF 0.018 mF 0.01 mF 0.1 mF 0.01 mF 0.1 mF1 mF 0.022 mF 220 pF 2.2 kW *1=TS116M20 *2=TS816M32 *3=TAFCSB500F48 (Notes) 10 kW 33 kW 321 12345 SECAM DECODER 47 mF 0.1 mF 0.22 mF 0.022 mF 22 mH (8 V) 1HDL IC 401 IC 402
- Package Allowable Loss PD ¾ Ta 200 0 25 Power dissipation (mW) Ambient temperature, Ta (°C) 50 75 100 125 150 400 600 800 1 000 1 200 1 400 1 600 1 800 2 000 2 200 2 400 2 600 2 800 3 000 Without external Heat-sink R thj = 54 °C/W PD = 2 315 mW(25 °C)
- Outline of major blocks
- Video (1) Y delay line built-in : total delay time is approximately 690 ns. (2) Sharpness control is by using delay line aperture control. (contour emphasis type) Together with black level extention circuit, high quality picture is achieved. (3) Chroma trap is built-in : Trap frequency is synchronised with the chroma VCO frequency at 4.43 MHz/3.58 MHz automatically. By I2C bus, the trap can be forced to by-pass. In SECAM mode, about 4.43 MHz free run frequency is obtained. When in black & white(B/W)mode(killer"On"), the trap is automatically by-passed. (4) Pedestal clamp filter is built-in. (5) Service switch : (Y contrast min., Vertical output stop). Can be switched by I2C bus. (6) Chart showing the modes of the trap : System(fC ) Color or B/W Trap Status 4.43 MHz(PAL) Color 4.43 MHz B/W 4.43 MHz free-run 3.58 MHz(NTSC) Color 3.58 MHz B/W 3.58 MHz free-run SECAM Color 4.43 MHz free-run B/W 4.43 MHz free-run Forced manual mode by I2C bus ¾ About 5.5 MHz Forced through mode by I2C bus ¾ No trap point
- Chroma (1) Using base-band 1H delay line(external 1HDL IC required), adjustment free is achieved. (2) BPF(4.43 MHz/3.58 MHz), ACC filters are built-in, thus external components are reduced. (3) By changing the following mode using the I2C bus : 1. PAL/NTSC 2. 4.43 MHz/3.58 MHz 3. Forced PN/Forced SECAM and together with the SECAM IC for automatic SECAM detection, multi-system application is possible.
n Technical Data (continued)
- Outline of major blocks (continued)
- Chroma (continued) (4) Killer output pin is available for system identification by MICOM. (Killer"On" fi 0 V : Either color signal is not properly detected due to wrong system settig, or the color signal field strength is too weak. Killer"Off" fi 5 V : Color signal is properly detected.) When killer is on, according to the MICOM control sequence,the mode and VCO frequency will be switched by means of the I2C bus. (5) During SECAM, the color difference output pins are put into high impedance. (6) AN5344(color-compensation IC)and other types of feature IC can be connected because color difference input pins are available. (7) It is possible for South American set application. (three-normal system : NTSC M,PAL M,PAL N). 7 8 47 V CC1 SW Note) For PAL M, crystal MEIDEN 3575 & C = 18 pF are used. For PAL N, crystal MEIDEN 3012-M & C = 22 pF are used. In order to extend downwards the b curve, a capacitor of 2 pF to 4 pF is added between Pin7 and GND. (8) PAL/NTSC, SECAM interface(Pin 47) Input Signal DC f C AC Level 4.43 MHz about 1.3 V 4.43 MHz 300 mV PP 3.58 MHz about 1.3 V X X SECAM *1 about 4.6 V 4.43MHz 300 mV PP B/W *2 about 1.3 V ¾ 300 mV PP Note) *1 : 4.43 MHz AC component is output during vertical retrace period, is as shown below. V-sync. 300 mV PP Pin47 V blank (RGB out) about DC 4.6 V Input 300 mV PP Pin47about DC 1.3 V about 80 ms Note) *2 : Eventhough the MICOM switches the VCO between 4.43MHz and 3.58MHz, only the 4.43 MHz CW will be outputed at periodic intervals as shown below.
n Technical Data (continued)
- Outline of major blocks (continued)
- RGB (1) OSD is made up of 3 colors of RGB, by using simple analog input, of which input at 0 V is fixed at the pedestal level.(The input dynamic range is controllable by contrast) (2) White balance(drive, cutoff)adjustment is implemented by I2C bus. (3) Spot killer is built-in : When power supply is off, R, G, B, output levels increase, the residue spot that is visible on the CRT is eliminated.
- Jungle (1) 2-pin are used for synchronous inputs(Horizontal, Vertical)to improve the synchronisation characteristics of horizontal and vertical synchronisation. (2) The horizontal circuit is based on countdown method using a 32 fH ceramic oscillator. AFC circuit is employing the doubler method. (3) The vertical circuit is employing the trigger method's countdown circuit, thereby resulting in no adjustment and stable vertical synchronisation. The pulse output will not be interfered by interlace which is caused by pattern layout. (4) Vertical frequency identification circuit is built-in : the output of 50/60 Hz identification is determined according to the vertical synchronous frequency.(60 Hz fi "H") Below 45 Hz and above 65 Hz, the previous state is hold. After 3 consecutive vertical period, if 60 or 50 Hz is identifield, the initial output will be changed. 50Hz (Low) 60Hz (High) 55 65Input frequency Hold Hold Idetification output voltage (5) Horizontal lock detection circuit and X-ray protection circuit(Shut down method)are built-in. (6) Picture centre position is adjustable by I2C bus.(–1.6 ms) (7) In the case of blue back in a weak field, the vertical trigger can be in off mode(I2C bus). Thus a stable picture is maintained.
- I2C Bus (1) There are 15 built-in DAC controls and 13 built-in switches to reduce adjustment for set maker. (2) Auto-increment function present :
- Sub address 0*: Auto-increment mode (When the data is sent in consecutive order, the sub-address will be changed in consecutive order, as data is inputed)
- Sub address 8*: Data refresh mode (When the data is sent consecutively, it is sent to the same sub-address) (3) I2C Bus Protocol
- Slave address : 10001010(8AH)
- Format(Usual) S Start condition 0A A AP Sub addressSlave address Data byte S0 A A AA PSub addressSlave address Data 1 AData 2 Data n Stop condition Write Acknowledge bit (4) Because DAC initial condition is not guaranteed, during power on, it is necessary to input the required standard data.
- Auto-increment mode/Data refresh mode
n Technical Data (continued)
- Outline of major blocks (continued)
- I2C Bus Addressing D7 D6 D5 D4 D3 Color00 (40H) P/N (0fi P) Tint01 (40H) PN/S (0fi PN) Brightness02 (80H) Contrast03 (40H) SSW (0fi Off) Sharpness04 (A0H) Ext. DAC2 (1fi typ.) Cutoff R05 (80H) Cutoff G06 (40H) Cutoff B07 (80H) Drive R08 (80H) Drive B09 (80H) (88H) Video adjust External DAC2 H center (01H) External DAC10C (40H) SECAM Enable (0 fi enable) External DAC30D (40H) (01H) Ver. OSC (0 fi 50) Ver. trig stop (0 fi normal) Chroma trap (0 fi normal) Chroma VCO (1 fi 4.43) Cut off B (0 fi typ.) Cut off R (0 fi typ.) Auto trap (0 fi auto) Ver. Auto trap (0 fi auto) D2 D1 D0 Data ByteSub Address Note) Items in the brackets are initial conditions.
n Technical Data (continued)
- Outline of major blocks (continued)
- I2C Bus Control Contents 1. For the Control information, for all sub-address, when data goes up, output increases. (Example : Contrast 00 fi contrast min., 7F fi contrast max., Brightness 00 fi pedestal low, FF fi pedestal high) 2. Other control supplementary (1) 00 : Color When Color data is 00, chroma output is completely cutoff so that color is off. (2) 01 : Tint When tint data is 00, the skin color approaches red.When tint data is 7F, the skin color approaches green. (3) 05, 06, 07(8-bit)and 0ED4, 0ED5(1-bit) : cutoff R, G, B The cutoff controllable range has increased resolution with 1 extra bit and is segmented into 2 sub-section, each section is variable by 8-bit DAC. (Cutoff G is 1 section of 8-bit DAC, that has the same variable range as R, B) Example : Case of R cutoff Output overlap by about1/8 G cutoff R cutoff 0E-D4 : 0 1 05 : 00 FF00 FF (4) 08, 09 : Drive R, B 8-bit DAC 1 section(no switching of sub-section). (5) 0A : Video Adjust Data 0*fi composite video min. F*fi composite video max. This control is used to adjust the composite video level. (6) 0A : Horizontal Centre Data *0fi picture moves left. *Ffi picture moves right. (7) 0B : External DAC2 and 04 D7 External DAC2 has 8-bits DAC of 2 sections adjustment. Data 01 fi DC voltage shifts down. Data FF fi DC voltage shifts up. (8) 0C : External DAC1 Data 00 fi DC voltage shifts down. Data 7F fi DC voltage shifts up. (9) 0D : External DAC3 Data 00 fi DC voltage shifts down. Data 7F fi DC voltage shifts up.
n Technical Data (continued)
- Outline of major blocks (continued)
- Switch Operation Data Bit SW Contents Detail Contents 00-D7 PAL/NTSC mode switch • Choroma signal delay line correction(PAL : short) (0 fi PAL) • BGP width change(PAL : wide) (1 fi NTSC) • CW switch to killer(PAL : 90/270 deg)
- Tint operation change(PAL : Tint off)
- Ident operation change(PAL : Operating) 01-D7 PAL, NTSC/SECAM mode switch • Demodulator Output mode switch (0 fi normal detection mode) In forced SECAM, color difference pin(48, 49) (1 fi forced SECAM mode) become high impedence. 03-D7 SSW(Service switch) • When in Service mode(1 H line white balance adjust) (0 fi normal) Vertical output pulse stop(DC about 4.3 V) (1 fi Service mode) Y output off, Chroma output present 04-D6 Not used 04-D7 External DAC2 • For External DAC2 2 section adjustment (0 fi no offset) (1 fi offset) 0C-D7 SECAM enable switch • SECAM error detection prevention switch (0 fi normal) 1 fi non-SECAM,SECAM detection input condition (1 fi forced disable SECAM) (Pin47)will not be received 0D-D7 Not used 0E-D0 Chroma VCO switch • Chroma oscillator circuit switch (0 fi 3.58 MHz) (video circuit trap frequency also switch) (1 fi 4.43 MHz) 0E-D1 Chroma trap switch • Video circuit's chroma trap switch (0 fi Trap present) (Y signal phase shift when through) (1 fi Through) 0E-D2 Vertical auto switch • Vertical frequency detection circuit switch (0 fi Auto switch) Auto switch : Auto detection mode by internal counter (1 fi Manual switch) M anual switch : Depending on 0E-D3 data to force into 50 or 60 Hz mode. 0E-D3 Vertical oscillator switch • Vertical frequency switch (0 fi 50 Hz) Only effective if 0E-D2 data is 1 (1 fi 60 Hz) 0E-D4 Cutoff R • Used to switch the cutoff R between 2 section (0 fi no offset) (1 fi offset) 0E-D5 Cutoff B • Used to switch the cutoff B between 2 section (0 fi no offset) (1 fi offset)
n Technical Data (continued)
- Outline of major blocks (continued)
- Switch Operation (continued) Data Bit SW Contents Detail Contents 0E-D6 Trap auto switch • Auto switch : Moves with chroma oscillating frequency. (0 fi Auto switch) Frequency fixed : fixed at about 5.7 MHz (1 fi frequency fixed) 0E-D7 Vertical trigger stop switch • Switch for prevention of vertical trigger input (0 fi normal) 1 fi trigger input off. In blue back etc., (1 fi trigger off) vertical dancing due to any noise is prevented.