AMP04GBC

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REV.B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AMP04 FUNCTIONAL BLOCK DIAGRAM IN(–) IN(+) INPUT BUFFERS REF 100k/H9024 11k/H9024 11k/H9024 RGAIN VOUT 100k/H9024

FEATURES

Low Supply Current: 700 /H9262A Max Wide Gain Range: 1 to 1000 Low Offset Voltage: 150 /H9262V Max Zero-In/Zero-Out Single-Resistor Gain Set 8-Lead Mini-DIP and SO Packages

APPLICATIONS

The AMP04 is a single-supply instrumentation amplifier designed to work over a +5 volt to ±15 volt supply range. It offers an excellent combination of accuracy, low power con- sumption, wide input voltage range, and excellent gain performance. Gain is set by a single external resistor and can be from 1 to 1000. Input common-mode voltage range allows the AMP04 to handle signals with full accuracy from ground to within 1 volt of the positive supply. And the output can swing to within 1 volt of the positive supply. Gain bandwidth is over 700 kHz. In addi- tion to being easy to use, the AMP04 draws only 700 µA of supply current. For high resolution data acquisition systems, laser trimming of low drift thin-film resistors limits the input offset voltage to under 150 µV, and allows the AMP04 to offer gain nonlinearity of 0.005% and a gain tempco of 30 ppm/ °C. A proprietary input structure limits input offset currents to less than 5 nA with drift of only 8 pA/ °C, allowing direct con- nection of the AMP04 to high impedance transducers and other signal sources. The AMP04 is specified over the extended industrial (–40 °C to +85°C) temperature range. AMP04s are available in plastic and ceramic DIP plus SO-8 surface mount packages. Contact your local sales office for MIL-STD-883 data sheet and availability. PIN CONNECTIONS 8-Lead Epoxy DIP (P Suffix) 8-Lead Narrow-Body SO (S Suffix) AMP04 RGAIN VOUT REF RGAIN –IN +IN AMP04 V+ RGAIN VOUT REF RGAIN –IN +IN Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000

AMP04–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

Parameter Symbol Conditions Min Typ Max Min Typ Max Unit OFFSET VOLTAGE Input Offset Voltage V IOS 30 150 300 µV –40°C ≤ TA ≤ +85°C 300 600 µV Input Offset Voltage Drift TCV IOS 36 µV/°C Output Offset Voltage V OOS 0.5 1.5 3 mV –40°C ≤ TA ≤ +85°C3 6 m V Output Offset Voltage Drift TCV OOS 30 50 µV/°C INPUT CURRENT Input Bias Current I B 22 30 40 nA –40°C ≤ TA ≤ +85°C5 0 6 0 n A Input Bias Current Drift TCI B 65 65 pA/ °C Input Offset Current I OS 15 1 0 n A –40°C ≤ TA ≤ +85°C1 0 1 5 n A Input Offset Current Drift TCI OS 8 8 pA/ °C INPUT Common-Mode Input Resistance 4 4 G Ω Differential Input Resistance 4 4 G Ω Input Voltage Range V IN 0 3.0 0 3.0 V Common-Mode Rejection CMR 0 V ≤ VCM ≤ 3.0 V G = 1 60 80 55 dB G = 10 80 100 75 dB G = 100 90 105 80 dB G = 1000 90 105 80 dB Common-Mode Rejection CMR 0 V ≤ V CM ≤ 2.5 V –40°C ≤ TA ≤ +85°C G = 1 55 50 dB G = 10 75 70 dB G = 100 85 75 dB G = 1000 85 75 dB Power Supply Rejection PSRR 4.0 V ≤ V S ≤ 12 V –40°C ≤ TA ≤ +85°C G = 1 95 85 dB G = 10 105 95 dB G = 100 105 95 dB G = 1000 105 95 dB GAIN (G = 100 K/RGAIN) Gain Equation Accuracy G = 1 to 100 0.2 0.5 0.75 % G = 1 to 100 –40°C ≤ T G = 1000 0.4 0.75 % Gain Range G 1 1000 1 1000 V/V Nonlinearity G = 1, R L = 5 kΩ 0.005 % G = 10, RL = 5 kΩ 0.015 % G = 100, RL = 5 kΩ 0.025 % Gain Temperature Coefficient ∆G/∆T 30 50 ppm/ °C OUTPUT Output Voltage Swing High V OH RL = 2 kΩ 4.0 4.2 4.0 V RL = 2 kΩ Output Voltage Swing Low V OL RL = 2 kΩ Output Current Limit Sink 30 30 mA Source 15 15 mA REV. B–2– (VS = 5 V, VCM = 2.5 V, TA = 25/H11543C unless otherwise noted)

REV. B –3– AMP04E AMP04F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit NOISE Noise Voltage Density, RTI e N f = 1 kHz, G = 1 270 270 nV/ √Hz f = 1 kHz, G = 10 45 45 nV/ √Hz f = 100 Hz, G = 100 30 30 nV/ √Hz f = 100 Hz, G = 1000 25 25 nV/ √Hz Noise Current Density, RTI i N f = 100 Hz, G = 100 4 4 pA/ √Hz Input Noise Voltage e N p-p 0.1 Hz to 10 Hz, G = 1 7 7 µV p-p 0.1 Hz to 10 Hz, G = 10 1.5 1.5 µV p-p 0.1 Hz to 10 Hz, G = 100 0.7 0.7 µV p-p DYNAMIC RESPONSE Small Signal Bandwidth BW G = 1, –3 dB 300 300 kHz POWER SUPPLY Supply Current I SY 550 700 700 µA –40°C ≤ TA ≤ +85°C 850 850 µA Specifications subject to change without notice. Parameter Symbol Conditions Min Typ Max Min Typ Max Unit OFFSET VOLTAGE Input Offset Voltage V IOS 80 400 600 µV –40°C ≤ TA ≤ +85°C 600 900 µV Input Offset Voltage Drift TCV IOS 36 µV/°C Output Offset Voltage V OOS 13 6 m V –40°C ≤ TA ≤ +85°C6 9 m V Output Offset Voltage Drift TCV OOS 30 50 µV/°C INPUT CURRENT Input Bias Current I B 17 30 40 nA –40°C ≤ TA ≤ +85°C5 0 6 0 n A Input Bias Current Drift TCI B 65 65 pA/ °C Input Offset Current I OS 25 1 0 n A –40°C ≤ TA ≤ +85°C1 5 2 0 n A Input Offset Current Drift TCI OS 28 28 pA/ °C INPUT Common-Mode Input Resistance 4 4 G Ω Differential Input Resistance 4 4 G Ω Input Voltage Range V IN –12 +12 –12 +12 V Common-Mode Rejection CMR –12 V ≤ VCM ≤ +12 V G = 1 60 80 55 dB G = 10 80 100 75 dB G = 100 90 105 80 dB G = 1000 90 105 80 dB Common-Mode Rejection CMR –11 V ≤ V CM ≤ +11 V –40°C ≤ TA ≤ +85°C G = 1 55 50 dB G = 10 75 70 dB G = 100 85 75 dB G = 1000 85 75 dB Power Supply Rejection PSRR ±2.5 V ≤ V S ≤ ±18 V –40°C ≤ TA ≤ +85°C G = 1 75 70 dB G = 10 90 80 dB G = 100 95 85 dB G = 1000 95 85 dB (VS = /H1155015 V, VCM = 0 V, TA = 25/H11543C unless otherwise noted)

REV. B–4– AMP04E AMP04F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit GAIN (G = 100 K/RGAIN) Gain Equation Accuracy G = 1 to 100 0.2 0.5 0.75 % G = 1000 0.4 0.75 % G = 1 to 100 –40°C ≤ T Gain Range G 1 1000 1 1000 V/V Nonlinearity G = 1, R L = 5 kΩ 0.005 0.005 % G = 10, RL = 5 kΩ 0.015 0.015 % G = 100, RL = 5 kΩ 0.025 0.025 % Gain Temperature Coefficient ∆G/∆T 30 50 ppm/ °C OUTPUT Output Voltage Swing High V OH RL = 2 kΩ 13 13.4 13 V RL = 2 kΩ Output Voltage Swing Low V OL RL = 2 kΩ Output Current Limit Sink 30 30 mA Source 15 15 mA NOISE Noise Voltage Density, RTI e N f = 1 kHz, G = 1 270 270 nV/ √Hz f = 1 kHz, G = 10 45 45 nV/ √Hz f = 100 Hz, G = 100 30 30 nV/ √Hz f = 100 Hz, G = 1000 25 25 nV/ √Hz Noise Current Density, RTI i N f = 100 Hz, G = 100 4 4 pA/ √Hz Input Noise Voltage e N p-p 0.1 Hz to 10 Hz, G = 1 5 5 µV p-p

0.1 Hz to 10 Hz, G = 10 1 1 µV p-p

0.1 Hz to 10 Hz, G = 100 0.5 0.5 µV p-p DYNAMIC RESPONSE Small Signal Bandwidth BW G = 1, –3 dB 700 700 kHz POWER SUPPLY Supply Current I SY 750 900 900 µA –40°C ≤ TA ≤ +85°C 1100 1100 µA Specifications subject to change without notice. WAFER TEST LIMITS Parameter Symbol Conditions Limit Unit OFFSET VOLTAGE Input Offset Voltage V IOS 300 µV max Output Offset Voltage V OOS 3m V m a x INPUT CURRENT Input Bias Current I B 40 nA max Input Offset Current I OS 10 nA max INPUT Common-Mode Rejection CMR 0 V ≤ VCM ≤ 3.0 V G = 1 55 dB min G = 10 75 dB min G = 100 80 dB min G = 1000 80 dB min Common-Mode Rejection CMR V S = ±15 V, –12 V ≤ VCM ≤ +12 V G = 1 55 dB min G = 10 75 dB min G = 100 80 dB min (VS = 5 V, VCM = 2.5 V, TA = 25/H11543C unless otherwise noted)

REV. B –5– Parameter Symbol Conditions Limit Unit G = 1000 80 dB min Power Supply Rejection PSRR 4.0 V ≤ VS ≤ 12 V G = 1 85 dB min G = 10 95 dB min G = 100 95 dB min G = 1000 95 dB min GAIN (G = 100 K/RGAIN) Gain Equation Accuracy G = 1 to 100 0.75 % max OUTPUT Output Voltage Swing High V OH RL = 2 kΩ 4.0 V min Output Voltage Swing Low V OL RL = 2 kΩ 2.5 mV max POWER SUPPLY Supply Current I SY VS = ±15 900 µA max 700 µA max NOTE Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and test ing. ABSOLUTE MAXIMUM RATINGS 1 Storage Temperature Range Operating Temperature Range Junction Temperature Range Package Type /H9258JA 3 /H9258JC Unit 8-Lead Cerdip (Z) 148 16 °C/W 8-Lead Plastic DIP (P) 103 43 °C/W 8-Lead SOIC (S) 158 43 °C/W NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2For supply voltages less than ± 18 V, the absolute maximum input voltage is equal to the supply voltage. 3θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket for cerdip, P-DIP, and LCC packages; θJA is specified for device soldered in circuit board for SOIC package. ORDERING GUIDE Temperature V OS @ 5 V Package Package Model Range T A = 25/H11543C Description Option AMP04EP XIND 150 µV Plastic DIP N-8 AMP04ES XIND 150 µV SOIC SO-8 AMP04ES-REEL7 XIND 150 µV SOIC SO-8 AMP04FP XIND 300 µV Plastic DIP N-8 AMP04FS XIND 300 µV SOIC SO-8 AMP04FS-REEL XIND 150 µV SOIC SO-8 AMP04FS-REEL7 XIND 150 µV SOIC SO-8 AMP04GBC 25 °C 300 µV DICE CHARACTERISTICS RGAIN RGAIN 7 V+

6 VOUT

5 REF

–IN 2 +IN 3 V– 4 AMP04 Die Size 0.075 × 0.99 inch, 7,425 sq. mils. Substrate (Die Backside) Is Connected to V+. Transistor Count, 81.

input pin is pro vided to allow offsetting of the input range. found in the management of offset errors and ground noise. racy of the carefully designed analog section is to be preserved. OS contribution of the AMP04. input symmetry will minimize many of these errors. from such techniques as ground planes, guard rings, and shields. cleaning and coating complete board assemblies. logic circuitry is the sworn enemy of the analog circuit designer. unusable in nearly all high performance analog applications. bypassing techniques should be observed. Figure 5. Cable Shield Drivers

Figure 13. 4-to-20 mA Line Receiver time can be achieved by omitting the filter capacitor.

2 VOUT

Figure 14. Pulsed Load Cell Bridge Amplifier in parallel to reduce the switch resistance. Figure 15. Single Supply Programmable Gain Instrumen- cient also improves with higher supply voltage.

3 RUNS

Figure 16. Input Offset (VIOS) Distribution @ 5 V

300 UNITS

Figure 17. Input Offset Drift (TCVIOS) Distribution @ 5 V Figure 18. Output Offset (VOOS) Distribution @ 5 V Figure 19. Input Offset (VIOS) Distribution @ ±15 V Figure 20. Input Offset Drift (TCVIOS) Distribution @ ±15 V Figure 21. Output Offset (VOOS) Distribution @ ±15 V

Figure 22. Output Offset Drift (TCVOOS) Distribution Figure 23. Output Voltage Swing vs. Temperature Figure 24. Input Bias Current vs. Temperature Figure 25. Output Offset Drift (TCVOOS) Distribution Figure 26. Output Voltage Swing vs. Temperature Figure 27. Input Offset Current vs. Temperature

REV. B–16– PRINTED IN U.S.A. OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) SEATING PLANE 0.060 (1.52) 0.015 (0.38)0.210 (5.33) MAX 0.022 (0.558) 0.014 (0.356) 0.160 (4.06) 0.115 (2.93) 0.070 (1.77) 0.045 (1.15) 0.130 (3.30) MIN PIN 1 0.280 (7.11) 0.240 (6.10) 0.100 (2.54) BSC 0.430 (10.92) 0.348 (8.84) 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.325 (8.25) 0.300 (7.62) 8-Lead Cerdip (Q-8) 1 4 0.310 (7.87) 0.220 (5.59)PIN 1 0.005 (0.13) MIN 0.055 (1.4) MAX 0.100 (2.54) BSC 15° 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) SEATING PLANE 0.200 (5.08) MAX 0.405 (10.29) MAX 0.150 (3.81) MIN 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 8-Lead Narrow-Body SO (SO-8) 0.1968 (5.00) 0.1890 (4.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.1574 (4.00) 0.1497 (3.80) 0.0500 (1.27) BSC 0.0688 (1.75) 0.0532 (1.35) SEATING PLANE 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8/H11543 0/H11543 0.0196 (0.50) 0.0099 (0.25) /H11547 45/H11543