AMMC-5618_13 AVAGO | Alldatasheet
Document overview
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- PDF pages: 8
Technical content
Features
- Frequency Range: 6 - 20 GHz
- High Gain: 14.5 dB Typical
- Output Power: 19.5 dBm Typical
- Input and Output Return Loss: < -12 dB
- Flat Gain Response: ± 0.3 dB Typical
- Single Supply Bias: 5 V @ 107 mA Symbol Parameters/ Conditions Units Min. Max. VD1, VD2 Drain Supply Voltage V 7 VG1 Optional Gate Voltage V -5 +1 VG2 Optional Gate Voltage V -5 +1 ID1 Drain Supply Current mA 70 ID2 Drain Supply Current mA 84 Pin RF Input Power dBm 20 Tch Channel Temp. °C +150 Tb Operating Backside Temp. °C -55 Tstg Storage Temp. °C -65 +165 Tmax Maximum Assembly Temp. (60 sec max) °C +300 Note: 1. Operation in excess of any one of these conditions may result in permanent damage to this device. Chip Size: 920 x 920 µm (36.2 x 36.2 mils) Chip Size Tolerance: ± 10µm (±0.4 mils) Chip Thickness: 100 ± 10µm (4 ± 0.4 mils) Pad Dimensions: 80 x 80 µm (3.1 x 3.1 mils or larger)
AMMC-5618 DC Specifications / Physical Properties [1] Symbol Parameters and Test Conditions Unit Min. Typical Max. VD1,VD2 Recommended Drain Supply Voltage V 3 5 7 ID1 First stage Drain Supply Current (V D1= 5V, VG1 = Open or Ground) mA 48 ID2 Second stage Drain Supply Current (V D2= 5V, VG2 = Open or Ground) mA 59 ID1 + ID2 Total Drain Supply Current (VG1 = VG2 = Open or Ground, VD1= VD2 = 5 V) mA 107 140 θ ch-b Thermal Resistance [2] (Backside temperature (Tb) = 25°C °C/W 22 Notes: 1. Backside temperature Tb = 25°C unless otherwise noted 2. Channel-to-backside Thermal Resistance (θch-b) = 32°C/W at Tchannel (Tc) = 150°C as measured using infrared microscopy. Thermal Resistance at backside temperature (Tb) = 25°C calculated from measured data. AMMC-5618 RF Specifications [3, 5] (Tb = 25°C, VDD= 5 V, IDD = 107 mA, Z0 = 50 Ω) Symbol Parameters and Test Conditions Unit Min. Typical Max. |S21|2 Small-signal Gain dB 12.5 14.5 D|S21|2 Small-signal Gain Flatness dB ± 0.3 RLin Input Return Loss dB 9 12 RLout Output Return Loss dB 9 12 |S12|2 Isolation dB 40 45 P-1dB Output Power at 1dB Gain Compression @ 20 GHz dBm 17.5 19.5 Psat Saturated Output Power (3dB Gain Compression) @ 20 GHz dBm 20.5 OIP3 Output 3rd Order Intercept Point @ 20 GHz dBm 26 DS21 / DT Temperature Coefficient of Gain [4] dB/°C -0.023 NF Noise Figure @ 20 GHz dB 4.4 6.5 Notes: 3. 100% on-wafer RF test is done at frequency = 6, 13 and 20 GHz, except as noted. 4. Temperature Coefficient of Gain based on sample test 5. All tested parameters guaranteed with measurement accuracy ±1.5dB for S12, ±1dB for S11, S21, S22, P1dB and ±0.5dB for NF.
AMMC-5618 Typical Scattering Parameters [1] (Tb=25°C, VDD= 5 V, IDD = 107 mA) Freq GHz S11 S21 S12 S22 dB Mag Phase dB Mag Phase dB Mag Phase dB Mag Phase Note: 1. Data obtained from on-wafer measurements
The AMMC-5618 is normally biased with a single positive drain supply connected to both V D1 and V D2 bond pads as shown in Figure 19(a). The recommended supply volt- age is 3 to 5 V. No ground wires are required because all ground con - nections are made with plated through-holes to the backside of the device. Gate bias pads (V G1 & VG2) are also provided to allow ad- justments in gain, RF output power, and DC power dis - sipation, if necessary. No connection to the gate pad is needed for single drain-bias operation. However, for custom applications, the DC current flowing through the input and/or output gain stage may be adjusted by applying a voltage to the gate bias pad(s) as shown in Figure 19(b). A negative gate-pad voltage will decrease the drain current. The gate-pad voltage is approximately zero volt during operation with no DC gate supply. Refer to the Absolute Maximum Ratings table for allowed DC and thermal conditions. Assembly Techniques The backside of the AMMC-5618 chip is RF ground. For microstripline applications, the chip should be attached directly to the ground plane (e.g., circuit carrier or heat - sink) using electrically conductive epoxy [1, 2]. For best performance, the topside of the MMIC should be brought up to the same height as the circuit surrounding it. This can be accomplished by mounting a gold plated metal shim (same length and width as the MMIC) under the chip, which is of the correct thickness to make the chip and adjacent circuit coplanar. The amount of epoxy used for chip and or shim at - tachment should be just enough to provide a thin fillet around the bottom perimeter of the chip or shim. The ground plane should be free of any residue that may jeopardize electrical or mechanical attachment. The location of the RF bond pads is shown in Figure 20. Note that all the RF input and output ports are in a Ground-Signal-Ground configuration. RF connections should be kept as short as reasonable to minimize performance degradation due to undesirable series inductance. A single bond wire is sufficient for sig- nal connections, however double-bonding with 0.7 mil gold wire or the use of gold mesh is recommended for best performance, especially near the high end of the frequency range. Thermosonic wedge bonding is the preferred method for wire attachment to the bond pads. Gold mesh can be attached using a 2 mil round tracking tool and a tool force of approximately 22 grams with an ultrasonic pow- er of roughly 55dB for a duration of 76 ± 8 mS. A guided wedge at an ultrasonic power level of 64 dB can be used for the 0.7 mil wire. The recommended wire bond stage temperature is 150 ± 2° C. Caution should be taken to not exceed the Absolute Maximum Rating for assembly temperature and time. The chip is 100 µm thick and should be handled with care. This MMIC has exposed air bridges on the top surface and should be handled by the edges or with a custom collet (do not pick up die with vacuum on die center.) This MMIC is also static sensitive and ESD handling pre - cautions should be taken. Notes: 1. Ablebond 84-1 LM1 silver epoxy is recommended. 2. Eutectic attach is not recommended and may jeopardize reliability of the device.
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Figure 20. AMMC - 5618 Bond pad locations