AM6520C ANALOGPOWER | Alldatasheet

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Technical content

November, 2005 - Rev. A PRELIMINARY Publication Order Number: DS-AM6520_A These miniature surface mount MOSFETs utilize High Cell Density process. Low rDS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are PWMDC-DC converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. P & N-Channel 20-V (D-S) MOSFET

  • L o w r DS(on) Provides Higher Efficiency and Extends Battery Life
  • Miniature TSSOP-8 Surface Mount Package Saves Board Space
  • High power and current handling capability
  • Low side high current DC-DC Converter

applications

a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature Symbol N-Channel P-Channel Units VDS 20 -20 VGS 8- 8 TA=25 o C 4.7 -4.7 TA=70 o C3 . 8 - 3 . 8 IDM ±50 ±50 IS 2.3 -2.3 A TA=25 o C 2.1 2.1 TA=70 o C1 . 3 1 . 3 TJ, Tstg -55 to 150 -55 to 150 o C Continuous Source Current (Diode Conduction) a ABSOLUTE MAXIMUM RATINGS (T A = 25 oC UNLESS OTHERWISE NOTED) Parameter Pulsed Drain Current b VGate-Source Voltage Drain-Source Voltage Continuous Drain Current a ID A Power Dissipation a PD Operating Junction and Storage Temperature Range W TSSOP-8 Top View N-Channel MOSFET4G1 5 G2 P-Channel MOSFET VDS (V) r DS(on) m(Ω)I D (A) 47 @ VGS = 4.5V 4.7 66 @ VGS = 2.5V 3.9 95 @ VGS = 1.8V 3.3 PRODUCT SUMMARY -20 Symbol Typ Max t <= 10 sec 72 83 Steady State 100 120 THERMAL RESISTANCE RATINGS Maximum Junction-to-Ambient a o C/WRthJA Parameter

November, 2005 - Rev. A PRELIMINARY Publication Order Number: DS-AM6520_A Notes a. Pulse test: PW <= 3 00us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. Ch Min Typ Max VGS = VDS, ID = 250 uA N0 . 4 VGS = VDS, ID = -250 uA P- 0 . 4 VGS = -8 V, VDS = 0 V P± 1 0 0 VGS = 8 V, VDS = 0 V N± 1 0 0 VDS = -16 V, VGS = 0 V P- 1 VDS = 16 V, VGS = 0 V N1 VDS = 5 V, VGS = 4.5 V N2 0 VDS = -5 V, VGS = -4.5 V P- 2 0 VGS = 4.5 V, ID = 4.7 A 47 VGS = 2.5 V, ID = 3.9 A 66 VGS = 1.8 V, ID = 3.3 A 95 VGS = -4.5 V, ID = -4.7 A 47 VGS = -2.5 V, ID = -3.8 A 72 VGS = -1.8 V, ID = -3.3 A 95 VDS = 15 V, ID = 10 A N 40 VDS = -15 V, ID = -9.5 A P3 1 N7 . 0 P1 2 . 0 N1 . 1 P2 . 0 N2 . 0 P2 . 0 N 8 P 10 N 24 P 20 N3 5 P3 1 N1 0 P2 1 Turn-On Delay Time Rise Time nS N-Chaneel VDD=15V, VGS=4.5V, ID=1A , RGEN=25Ω, P-Channel VDD=-15V, VGS=-4.5V, ID=-1A RGEN=15Ω Fall-Time tf Turn-Off Delay Time td(on) tr td(off) mΩ Total Gate Charge Qg Gate-Source Charge Qgs N-Channel VDS=15V, VGS=4.5V, ID=4.7A P-Channel VDS=-15V, VGS=-4.5V, ID=-4.7A Drain-Source On-ResistanceA rDS(on) N P On-State Drain CurrentA ID(on) VGS(th) A Gate-Body Leakage IGSS uAIDSSZero Gate Voltage Drain Current Limits Unit nA Static Test Conditions V SymbolParameter Gate-Threshold Voltage Forward TranconductanceA gfs S nC Gate-Drain Charge Qgd Dynamic

November, 2005 - Rev. A PRELIMINARY Publication Order Number: DS-AM6520_A

Package Information

TSSOP-8: 8LEAD