AM40N10-30D ANALOGPOWER | Alldatasheet
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Technical content
N-Channel 100-V (D-S) MOSFET VDS (V) ID(A) Symbol Limit Units VDS 100 VGS ±20 Continuous Drain Current TC=25°C ID 26 IDM 50 IS 50 A Power Dissipation TC=25°C PD 50 W TJ, Tstg -55 to 175 °C Symbol Maximum Units RθJA 50 RθJC 3 Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature Pulsed Drain Current b Continuous Source Current (Diode Conduction) THERMAL RESISTANCE RATINGS °C/W Parameter Maximum Junction-to-Ambient a Maximum Junction-to-Case Operating Junction and Storage Temperature Range ABSOLUTE MAXIMUM RATINGS (TA = 25°C UNLESS OTHERWISE NOTED) V Parameter Gate-Source Voltage PRODUCT SUMMARY 100 rDS(on) (mΩ) 36 @ VGS = 10V 42 @ VGS = 4.5V Drain-Source Voltage A Key Features:
- Low rDS(on) trench technology
- Low thermal impedance
- Fast switching speed Typical Applications:
- PoE Power Sourcing Equipment
- PoE Powered Devices
- Telecom DC/DC converters
- White LED boost converters © Preliminary 1 Publication Order Number: DS-AM40N10-30D
Parameter Symbol Test Conditions Min Typ Max Unit Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 uA 1 3.5 V Gate-Body Leakage IGSS VDS = 0 V, VGS = 20 V ±100 nA VDS = 80 V, VGS = 0 V 1 VDS = 80 V, VGS = 0 V, TJ = 55°C 25 On-State Drain Current ID(on) VDS = 5 V, VGS = 10 V 34 A VGS = 10 V, ID = 10 A 36 VGS = 4.5 V, ID = 9.2 A 42 Forward Transconductance gfs VDS = 15 V, ID = 10 A 10 S Diode Forward Voltage VSD IS = 25 A, VGS = 0 V 0.89 V Total Gate Charge Qg 14.8 Gate-Source Charge Qgs 4.3 Gate-Drain Charge Qgd 8.6 Turn-On Delay Time td(on) 4.8 Rise Time tr 14.2 Turn-Off Delay Time td(off) 39.2 Fall Time tf 25.6 Input Capacitance Ciss 1216 Output Capacitance Coss 154 Reverse Transfer Capacitance Crss 131 Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Dynamic VDS = 15 V, VGS = 0 V, f =1 MHz Zero Gate Voltage Drain Current Static uA Typical Electrical Characteristics Drain-Source On-Resistance Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. pF nS VDS = 50 V, VGS = 4.5 V, ID = 10 A mΩrDS(on) IDSS nC VDD = 50 V, RL = 5 Ω , ID = 10 A, VGEN = 10 V, RGEN = 6 Ω © Preliminary 2 Publication Order Number: DS-AM40N10-30D
- On-Resistance vs. Drain Current 2. Transfer Characteristics 3. On-Resistance vs. Gate-to-Source Voltage 4. Drain-to-Source Forward Voltage 5. Output Characteristics 6. Capacitance Typical Electrical Characteristics 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0 5 10 15 20 RDS(on) - On-Resistance (Ω) ID-Drain Current (A) 4.0V 4.5V 10V6.0V 8.0V 3.5V 0 0.5 1 1.5 ID - Drain Current (A) VDS - Drain-to-Source Voltage (V) 10V 4.5V 4.0V 6.0V 8.0V 3.5V 3.0V 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0 2 4 6 8 10 RDS(on) - On-Resistance (Ω) VGS - Gate-to-Source Voltage (V) TJ = 25°C ID = 10A 0 1 2 3 4 ID - Drain Current (A) VGS - Gate-to-Source Voltage (V) TJ = 25°C 0.01 0.1 100 IS - Source Current (A) VSD - Source-to-Drain Voltage (V) TJ = 25°C 500 1000 1500 2000 2500 0 5 10 15 20 Capacitance (pf) VDS-Drain-to-Source Voltage (V) Ciss Coss Crss F = 1Mhz © Preliminary 3 Publication Order Number: DS-AM40N10-30D
- Gate Charge 9. Safe Operating Area 10. Single Pulse Maximum Power Dissipation 8. Normalized On-Resistance Vs Junction Temperature 11. Normalized Thermal Transient Junction to Ambient Typical Electrical Characteristics 0 10 20 30 VGS-Gate-to-Source Voltage (V) Qg - Total Gate Charge (nC) ID = 10A VDS = 50V 0.01 0.1 100 0.1 1 10 100 1000 ID Current (A) VDS Drain to Source Voltage (V) 10 uS 100 uS 1 mS 10 mS 100 mS
1 SEC
10 SEC
0.001 0.01 0.1 1 10 100 1000 PEAKTRANSIENT POWER (W) t1 TIME (SEC) 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 t1 TIME (sec) D = 0.5 0.2 0.1 0.05 0.02 Single Pulse RθJA(t) = r(t) x RθJA RθJA = 50 °C /W TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 P(pk) 0.5 1.5 2.5 -50 -25 0 25 50 75 100 125 150 175 RDS(on) - On-Resistance (Normalized) TJ - Junction Temperature (°C) © Preliminary 4 Publication Order Number: DS-AM40N10-30D
Package Information
Note: 1. All Dimension Are In mm. 2. Package Body Sizes Exclude Mold Flash, Protrusion Or Gate Burrs. Mold Flash, Protrusion Or Gate Burrs Shall Not Exceed 0.10 mm Per Side. 3. Package Body Sizes Determined At The Outermost Extremes Of The Plastic Body Exclusive Of Mold Flash, Gate Burrs And Interlead Flash, But Including Any Mismatch Between The Top And Bottom Of The Plastic Body. © Preliminary 5 Publication Order Number: DS-AM40N10-30D