AM3902N ANALOGPOWER | Alldatasheet

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Technical content

Publication Order Number: DS-AM3902_B These miniature surface mount MOSFETs utilize a high cell density trench process to provide low rDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. Dual N-Channel Logic Level MOSFET

  • L o w r DS(on) provides higher efficiency and extends battery life
  • Low thermal impedance copper leadframe TSOP-6 saves board space
  • Fast switching speed
  • High performance trench technology Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature VDS (V) r DS(on) (OHM) I D (A) 4.0 @ VGS = 4.5 V 0.4 5.1 @ VGS = 2.5V 0.2 PRODUCT SUMMARY Symbol Maximum Units VDS 25 VGS -8.5 TA=25 o C0 . 2 2 TA=70 o C0 . 1 7 IDM 0.5 IS ±0.3 A TA=25 o C0 . 9 TA=70 o C0 . 7 TJ, Tstg -55 to 150 o C Power Dissipation a PD Operating Junction and Storage Temperature Range W Continuous Source Current (Diode Conduction) a A BSOLUTE MA XIMUM RA TINGS (TA = 25 oC UNLESS OTHERWISE NOTED) Parameter Pulsed Drain Current b VGate-Source Voltage Drain-Source Voltage Continuous Drain Current a ID A Symbol Maximum Units t <= 5 sec 140 Steady-State 180 THERMAL RESISTANCE RATINGS Parameter oC/WMaximum Junction-to-Ambienta RΤΗJA 3 4

Publication Order Number: DS-AM3902_B Notes a. Pulse test: PW <= 3 00us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing . Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. Min Typ Max Drain-Source Breakdown Voltage V (BR)DSS VGS = 0 V, ID = 250 uA 25 Gate-Threshold Voltage V GS(th) VDS = VGS, ID = -250 uA 0.67 0.85 1.5 Gate-Body Leakage I GSS VDS = 0 V, VGS = 8 V 100 nA VDS = 20 V, VGS = 0 V 1 VDS = 20 V, VGS = 0 V, TJ = 55oC 10 On-State Drain Current A ID(on) VDS = 5 V, VGS = 2.5 V 0.2 A VGS = 2.5 V, ID = 0.2 A 3.8 5.0 VGS = 2.5 V, ID = 0.2 A TJ = 55oC4 . 0 5 . 5 VGS = 4.5 V, ID = 0.4 A 3.1 4.0 Forward TranconductanceA gfs VDS = 5 V, ID = 0.4 A 0.25 S Diode Forward Voltage V SD IS = 0.5 A, VGS = 0 V 0.85 1.20 V Total Gate Charge Q g 0.5 0.71 Gate-Source Charge Q gs 0.22 Gate-Drain Charge Q gd 0.07 Input Capacitance C iss 10 Output Capacitance C oss 6 Reverse Transfer Capacitance C rss 2 Turn-On Delay Time t d(on) 51 0 Rise Time t r 4.5 10 Turn-Off Delay Time t d(off) 48 Fall-Time t f 3.2 7 VDD = 6 V, I D = 0.5 A, VGEN = 4.5 V, RG = 50 Ω ns Dynamicb VDS = 5 V, VGS = 4.5 V, ID = 0.2 A nC Switching VDS = 15 V, VGS = 0 V, f = 1MHz pF SPECIFICATIONS (TA = 25oC UNLESS OTHERWISE NOTED) uAIDSSZero Gate Voltage Drain Current Switch Off Characteristics V Test ConditionsSymbolParameter Drain-Source On-ResistanceA rDS(on) Ω UnitLimits Switch On Characteristics

Publication Order Number: DS-AM3902_B

Package Information

TSOP-6: 6LEAD