ALT6725Q7

ALT6725 ANADIGICS | Alldatasheet

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Technical content

HELP3ETM Dual-band Cellular & PCS LTE

3.4 V Linear Power Amplifier Module

PRELIMINARY DATA SHEET - Rev 1.0

FEATURES

• InGaP HBT Technology
• High Efficiency:
• 35 % @ POUT = +27.5 dBm
• 16 % @ POUT = +15 dBm
• 8 % @ POUT = +9 dBm
• Low Quiescent Current: 4 mA
• Internal Voltage Regulation
• Built-in Directional Coupler
• Common VMODE Control Line
• Suitable for SMPS and average power tracking systems with variable supply voltages
• APT can reduce TS.09 average power consumption more than 25%
• Reduced External Component Count
• Thin Package: 0.9 mm
• RoHS Compliant Package, 260 oC MSL-3

APPLICATIONS

• Dual-band Wireless Handsets and Data Devices for LTE/CDMA/EVDO networks:
• UMTS Band 5, 6, 18, 19, & 26
• UMTS Band 2 & 25
• Cellular BC 0 and 10
• PCS BC 1 and 14 PRODUCT DESCRIPTION ALT6725 addresses the demand for increased integration in dual-band handsets for LTE networks. The small footprint 3 mm x 5 mm x 0.9 mm surface mount RoHS compliant package contains independent RF PA paths to ensure optimal performance in both frequency bands in less board area than two single band PAs. The package pinout was chosen to enable handset manufacturers to independently provide bias to both power amplifiers and simplify control with common mode pins. The ALT6725 is part of ANADIGICS’ 3rd generation of High-Efficiency-at- Low-Power (HELP3E™) family of power amplifiers, which deliver low quiescent currents and significantly greater efficiency through selectable bias modes for high, medium and low power operation. The ALT6725 is designed for use both with and without average power tracking (APT). APT can be used to optimize the Vcc level for the desired output power level and linearity, which greatly reduces the total current drawn from the battery. This feature, in conjunction with selectable operating modes, enables significant improvements in overall power added efficiency of the ALT6725 across the entire dynamic range of operating powers. APT requires use of an external variable voltage supply (DC-DC converter), which is used to provide the variable voltage to Vcc pad of the amplifier. A low-leakage shutdown mode increases standby time. This PA has built-in directional couplers for each band, with a common coupler output port CPL_OUT. The 3 mm x 5 mm x 0.9 mm surface mount package incorporates matching networks optimized for output power, efficiency and linearity in a 50 Ω system. The device is manufactured on an advanced InGaP HBT MMIC technology offering state-of-the-art reliability, temperature stability, and ruggedness. Figure 1: Block Diagram VEN_CELL VBATT RFIN_CELL RFOUT_CELL VCCA VMODE1 123 GND VCC Bias Control Voltage Regulation CPLOUT RFOUT_PCSVEN_PCS RFIN_PCS GND at Slug (pad) VMODE2 GND Bias Control Voltage Regulation CPL CPL

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725 Table 1: Pin Description Figure 2: Pinout PIN NAME DESCRIPTION

1 VEN_CELL Enable Voltage for Cell Band

2 RFIN_CELL RF Input for Cell Band

3 VMODE1 Mode Control Voltage 1

4 VBATT Battery Voltage

5 VMODE2 Mode Control Voltage 2

6 RFIN_PCS RF Input for PCS Band

7 VEN_PCS Enable Voltage for PCS Band

8 RFOUT_PCS RF Output for PCS Band

9 GND Ground

10 CPLOUT Coupler Output Port

11 VCCA Supply Voltage A

12 VCC Supply Voltage

13 RFOUT_CELL RF Output for Cell Band

14 GND Ground

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725

ELECTRICAL CHARACTERISTICS

Table 2: Absolute Minimum and Maximum Ratings Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Table 3: Operating Ranges The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. Notes: (1) For operation at V CC = +3.2 V, POUT is derated by 0.5 dB. PARAMETER MIN TYP MAX UNITS COMMENTS Operating Frequency (f) 814 1850 849

1915 MHz

UMTS Band 5, 6, 18, 19, & 26 UMTS Band 2 & 25 Supply Voltage (VCC, VCCA) +0.8 +3.4 +4.35 V Battery Voltage (VBATT) +3.2 +3.4 +4.35 V Enable Voltage (VEN_CELL, VEN_PCS) +1.35 +1.8 +3.1 +0.5 V PA “on” PA “shut down” Mode Control Voltage (VMODE1,2) +1.35 +1.8 +3.1 +0.5 V Logic High Logic Low Cellular RF Output Power UMTS LTE, HPM LTE, MPM LTE, LPM 26.7 (1) 27.5 dBm TS 36.101 Rel 8 for LTE Cellular RF Output Power CDMA CDMA, HPM CDMA, MPM CDMA, LPM 27.5 (1) 28.0 16.0 10.0 dBm CDMA 2000, RC-1 PCS RF Output Power UMTS LTE, HPM LTE, MPM LTE, LPM 26.5 (1) 27.3 dBm TS 36.101 Rel 8 for LTE PCS RF Output Power CDMA CDMA, HPM CDMA, MPM CDMA, LPM 27.5 (1) 28.0 16.0 10.0 dBm CDMA 2000, RC-1 Case Temperature (T C) -30 - +90 °C PARAMETER MIN MAX UNIT Supply Voltage (VBATT, VCC, VCCA) 0 +5 V Mode Control Voltage (VMODE1,2, VEN) 0 +3.5 V RF Input Power (PIN) - +10 dBm Storage Temperature (TSTG) -40 +150 °C

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725 Table 4: Electrical Specifications – LTE Operation (Band 5, 6, 18, 19 & 26) (10 MHz QPSK, 12 RB, START = 0) (TC = +25 °C, VBATT = VCC = +3.4 V, VEN = +1.8 V, 50 Ω system) PARAMETER MIN TYP MAX UNIT COMMENTS POUT VMODE1 VMODE2 Gain dB +27.5 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V ACLR E-UTRA at ± 10 MHz offset -39.5 -42 -42 dBc +27.5 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V ACLR UTRA at ± 7.5 MHz offset -40 -42 -42 dBc +27.5 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V ACLR UTRA at ± 12.5 MHz offset -62 -62 -58 dBc +27.5 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Power-Added Efficiency (1) +27.5 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Quiescent Current (Icq) Low Bias Mode - 4 - mA through V CC pin 1.8 V 1.8 V Mode Control Current - 0.5 - mA through VMODE pins, VMODE1,2 = +1.8 V BATT Current - 1.5 - mA through VBATT, VMODE1,2 = +1.8V Enable Current - 0.3 - mA through VEN_CELL pin, VMODE1,2 = +1.8 V Total Decoder Current on V BATT (in Shutdown mode) - 7 - µA VBATT = +4.35 V, VCC = +4.35 V, VEN_CELL = 0 V, VMODE1,2 = 0 V HBT Leakage Current (VCC) (Shutdown mode) - <1 - mA VBATT = +4.35 V, VCC = +4.35 V, VEN_CELL = 0 V, VMODE1,2 = 0 V Noise In Receive Band - -133 - dBm/Hz 869 MHz to 894 MHz Harmonics O 3fO, 4fO -35 -35 dBc POUT < +27.5 dBm Input Impedence - - 2:1 VSWR Coupling Factor - 22 - dB Spurious Output Level (all spurious outputs) - - -65 dBc POUT < +27.5 dBm In-band load VSWR < 5:1 Out-of-band load VSWR < 10:1 Applies over all operating conditions Load mismatch stress with no permanent degradation or failure 8:1 - - VSWR Applies over full operating range Notes: (1) ACLR and Efficiency measured at 836.5 MHz.

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725 Table 5: Electrical Specifications - Cellular Band (BC 0, 10) (TC = +25 °C, VBATT = VCC = +3.4 V, VEN_CELL = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform) Notes: (1) PAE and ACP measured at 836.5 MHz. PARAMETERM IN TYPM AX UNIT COMMENTS POUT VMODE1 VMODE2 Gain dB +28 dBm +16 dBm +10 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Adjacent Channel Power at ± 1.25 MHz offset (1) Primary Channel BW = 1.23 MHz Adjacent Channel BW = 30 kHz -48.5 -52 -53.5 dBc +28 dBm +16 dBm +10 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Adjacent Channel Power at ± 1.98 MHz offset (1) Primary Channel BW = 1.23 MHz Adjacent Channel BW = 30 kHz -58 -59 -68 dBc +28 dBm +16 dBm +10 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V (1) 37.5 19.5 +28 dBm +16 dBm +10 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Quiescent Current (Icq) -4 -m A through V CC pins, VMODE1,2 = +1.8 V Mode Control Current - 0.5 -m A through VMODE pin, VMODE1,2 = +1.8 V BATT Current - 1.5 -m A through VBATT pin, VMODE1,2 = +1.8V Enable Current - 0.3 -m A through VEN_CELL pin, VMODE1,2 = +1.8 V Total Decoder Current on VBATT (in Shutdown mode) -7 -µ A VBATT = +4.35 V, VCC = +4.35 V, VEN_CELL = 0 V, VMODE1,2 = 0 V HBT Leakage Current (VCC) (Shutdown mode) -< 1- µA VBATT = +4.35 V, VCC = +4.35 V, VEN_CELL = 0 V, VMODE1,2 = 0 V Noise In Receive Band - -133 - dBm/Hz 869 MHz to 894 MHz Harmonics 2fO 3fO, 4fO -35 -35 dBc POUT < +28 dBm Input Impedence - VSWR Coupling Factor -2 2- dB Spurious Output Level (all spurious outputs) -- -65 dBc POUT < +28 dBm In-band load VSWR < 5:1 Out-of-band load VSWR < 10:1 Applies over all operating conditions Load mismatch stress with no permanent degradation or failure 8:1 -- VSWR Applies over full operating range 2:5:1 -

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725 Table 6: Electrical Specifications – LTE Operation (Band 2 & 25) (10 MHz QPSK, 12 RB, START = 0) (TC = +25 °C, VBATT = VCC = +3.4 V, VEN = +1.8 V, 50 Ω system) PARAMETER MIN TYP MAX UNIT COMMENTS POUT VMODE1 VMODE2 Gain dB +27.3 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V ACLR E-UTRA at ± 10 MHz offset -37.5 -41 -40 dBc +27.3 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V ACLR UTRA at ± 7.5 MHz offset -38 -41 -41 dBc +27.3 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V ACLR UTRA at ± 12.5 MHz offset -63 -64 -64 dBc +27.3 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Power-Added Efficiency (1) +27.3 dBm +15 dBm +9 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Quiescent Current (Icq) Low Bias Mode - 4 - mA through V CC pin 1.8 V 1.8 V Mode Control Current - 0.5 - mA through VMODE pins, VMODE1,2 = +1.8 V BATT Current - 1.5 - mA through VBATT, VMODE1,2 = +1.8 V Enable Current - 0.3 - mA through VEN_PCS, VMODE1,2 = +1.8 V Total Decoder Current on V BATT (in Shutdown mode) - 7 - µA VBATT = +4.35 V, VCC = +4.35 V, VEN_CELL = 0 V, VMODE1,2 = 0 V HBT Leakage Current (VCC) (Shutdown mode) - <1 - mA VBATT = +4.35 V, VCC = +4.35 V, VEN_CELL = 0 V, VMODE1,2 = 0 V Noise in Receive Band - -133 - dBm/Hz 1930 MHz to 1990 MHz Harmonics O 3fO, 4fO -30 -30 dBc POUT < +27.3 dBm Input Impedence - - 2:1 VSWR Coupling Factor - 22 - dB Spurious Output Level (all spurious outputs) - - -65 dBc POUT < +27.3 dBm In-band load VSWR < 5:1 Out-of-band load VSWR < 10:1 Applies over all operating conditions Load mismatch stress with no permanent degradation or failure 8:1 - - VSWR Applies over full operating range Notes: (1) ACLR and Efficiency measured at 1880 MHz.

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725 Table 7: Electrical Specifications - PCS Band (BC 1, 14) (TC = +25 °C, VBATT = VCC = +3.4 V, VEN_PCS = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform) Notes: (1) ACPRs and Efficiency measured at 1880 MHz. PARAMETER MIN TYP MAX UNIT COMMENTS POUT VMODE1 VMODE2 Gain dB +28 dBm +16 dBm +10 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Adjacent Channel Power at ± 1.25 MHz offset (1) Primary Channel BW = 1.23 MHz Adjacent Channel BW = 30 kHz -48 -52.5 -53 dBc +28 dBm +16 dBm +10 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Adjacent Channel Power at ± 1.98 MHz offset (1) Primary Channel BW = 1.23 MHz Adjacent Channel BW = 30 kHz -55 -60 -63 dBc +28 dBm +16 dBm +10 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Power-Added Efficiency (1) +28 dBm +16 dBm +10 dBm 0 V 1.8 V 1.8 V 0 V 0 V 1.8 V Quiescent Current (Icq) - 4 - mA through V CC pins, VMODE1,2 = +1.8 V Mode Control Current - 0.5 - mA through VMODE pin, VMODE1,2 = +1.8 V BATT Current - 1.5 - mA through VBATT pin, VMODE1,2 = +1.8V Enable Current - 0.3 - mA through VEN_PCS pin, VMODE1,2 = +1.8 V Total Decoder Current on VBATT (in Shutdown mode) - 7 - µA VBATT = +4.35 V, VCC = +4.35 V, VEN_CELL = 0 V, VMODE1,2 = 0 V HBT Leakage Current on VCC (in Shutdown mode) - <1 - µA VBATT = +4.35 V, VCC = +4.35 V, VEN_CELL = 0 V, VMODE1,2 = 0 V Noise In Receive Band - -133 - dBm/Hz 1930 MHz to 1990 MHz Harmonics O 3fO, 4fO -30 -30 dBc POUT < +28 dBm Input Impedence - - 2:1 VSWR Coupling Factor - 22 - dB Spurious Output Level (all spurious outputs) - - -65 dBc POUT < +28 dBm In-band load VSWR < 5:1 Out-of-band load VSWR < 10:1 Applies over all operating conditions Load mismatch stress with no permanent degradation or failure 8:1 - - VSWR Applies over full operating range

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725

APPLICATION INFORMATION

To ensure proper performance, refer to all related Application Notes on the ANADIGICS web site: http:// www.anadigics.com along with Figure 3, which shows the recommended ON/OFF timing sequence for RF IN, control voltages, and supply voltages. Shutdown Mode The power amplifier may be placed in a shutdown Table 8: Bias Control mode by applying logic low levels (see Operating Ranges table) to the V ENABLE and VMODE pads. Bias Modes The power amplifier may be placed in Low, Medium, or High Bias modes by applying the appropriate logic level (see Operating Ranges table) to the V MODE pin. The Bias Control table lists the recommended modes of operation for various applications. APPLICATION POUT LEVELS BIAS MODE VEN_CELL VMODE1 VMODE2 VCC VBATT Medium Bias Mode > +9 dBm High Bias Mode > +15 dBmH igh+ 1.8 V0 V0 V 1.3 - 4.35 V> 3.2 V Shutdown- Shutdown0 V0 V0 V3 .2 - 4.35 V> 3.2 V VEN_PCS VEN_CELL, PCS VCC/VCCA note 1 RFIN_CELL, PCS notes 1,2 OFF Sequence Referenced After 90% of Rise Time Referenced Before 10% of Fall Time ON Sequence On Sequence Start T_0N = 0µ T_0N+1µS T_0N+3µS Off Sequence Start T_0FF = 0µ T_0FF+2µST_0FF+3µS Vcontrols Venable/Vmode(s) Rise/Fall Max 1µS Defined at 10% to 90% of Min/Max Voltage Figure 3: Recommended ON/OFF Timing Sequence Notes: (1) Level might be changed after RF is ON. (2) RF OFF defined as P IN ≤ -30 dBm. (3) Switching simultaneously between VMODE and VEN is not recommended.

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725 Figure 4: Application Circuit 123 Bias Control Voltage Regulation CPLOUT GND at Slug (pad) Bias Control Voltage Regulation CPL CPL RFIN_CELL RFIN_PCS VMODE1 VBATT VEN_CELL VEN_PCS 2.2 µF VMODE2 68pF VCC 1000 pF 2.2 µF RFOUT_CELL RFOUT_PCS 68 pF VCCA

PRELIMINARY DATA SHEET - Rev 1.0 ALT6725 Figure 7: PCB Board Design Guidelines PCB BOARD DESIGN GUIDELINES Refer to Figure 7 for the recommended PCB metal design, soldermask design, and stencil print patterns when assembling with ANADIGICS modules [5]. It is important to note that the PCB metal design is dependent upon several factors: the electrical and thermal performance requirements of the product, and the PCB-to-device interconnect pattern. The PCB metal design recommendations primarily deal with te PCB-to-device interconnection. Specific board-level electrical and thermal performance re- quirements will be dictated by the physical geometry of the specific application and are the responsibility of the end product manufacturer.

ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. iMPOrTanT nOTiCE anaDigiCS, inc.

141 Mount Bethel Road

Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. PRELIMINARY DATA SHEET - Rev 1.0 ALT6725

ORDERING INFORMATION

DESCRIPTION COMPONENT PACKAGING ALT6725Q7- 30 °C to +90 °C RoHS Compliant 14 Pin 3 mm x 5 mm x 0.9 mm Surface Mount Module Tape and Reel, 2500 pieces per Reel ALT6725P9- 30 °C to +90 °C RoHS Compliant 14 Pin 3 mm x 5 mm x 0.9 mm Surface Mount Module Partial Tape and Reel