ALD1105DB

ALD1105 ALD | Alldatasheet

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DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED PAIR MOSFET GENERAL DESCRIPTION The ALD1105 is a monolithic dual N-channel and dual P-channel complementary matched transistor pair intended for a broad range of analog applications. These enhancement-mode transistors are manufactured with Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process. It consists of an ALD1116 N-channel MOSFET pair and an ALD1117 P-channel MOSFET pair in one package. The ALD1105 is a low drain current, low leakage current version of the ALD1103. The ALD1105 offers high input impedance and negative current temperature coefficient. The transistor pair is matched for minimum offset voltage and differential thermal response, and it is designed for precision signal switching and amplifying applications in +1V to +12V systems where low input bias current, low input capacitance and fast switching speed are desired. Since these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment. When used in complementary pairs, a dual CMOS analog switch can be constructed. In addition, the ALD1105 is intended as a building block for differential amplifier input stages, transmission gates, and multiplexer applications. The ALD1105 is suitable for use in precision applications which require very high current gain, beta, such as current mirrors and current sources. The high input impedance and the high DC current gain of the field effect transistors result in extremely low current loss through the control gate. The DC current gain is limited by the gate input leakage current, which is specified at 30pA at room temperature. For example, DC beta of the device at a drain current of 3mA at 25°C is = 3mA/30pA = 100,000,000.

FEATURES

• Thermal tracking between N-channel and P-channel pairs
• Low threshold voltage of 0.7V for both N-channel & P-channel MOSFETs
• Low input capacitance
• Low Vos -- 10mV
• High input impedance -- 1013Ω typical
• Low input and output leakage currents
• Negative current (IDS) temperature coefficient
• Enhancement mode (normally off)
• DC current gain 109
• Matched N-channel pair and matched P-channel pair in one package ALD1105 ADVANCED LINEAR DEVICES, INC. PIN CONFIGURATION

APPLICATIONS

• Precision current mirrors
• Complementary push-pull linear drives
• Discrete Analog switches
• Analog signal Choppers
• Differential amplifier input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Analog current inverter
• Precision matched current sources DN2 GN2 SN2 GP2 SP2 GN1 SN1 DP1 GP1 DB, PB, SB PACKAGE DN1 DP2 SP1 BLOCK DIAGRAM N SOURCE 1 (3) SUBSTRATE (4) N SOURCE 2 (12) N GATE 2 (13) N DRAIN 1 (1) N GATE 1 (2) N DRAIN 2 (14) P SOURCE 1 (7) SUBSTRATE (11) P SOURCE 2 (8) P GATE 2 (9) P DRAIN 1 (5) P GATE 1 (6) P DRAIN 2 (10) Operating Temperature Range* -55°C to +125°C 0°C to +70°C 0°C to +70°C 14-Pin 14-Pin 14-Pin CERDIP Plastic Dip SOIC Package Package Package ALD1105 DB ALD1105 PB ALD1105 SB * Contact factory for industrial temperature range.

ORDERING INFORMATION

© 2005 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com

Drain-source voltage, VDS 13.2V Gate-source voltage, VGS 13.2V Power dissipation 500 mW Operating temperature range PB, SB package 0°C to +70°C DB package -55°C to +125°C Storage temperature range -65°C to +150°C Lead temperature, 10 seconds +260°C Gate Threshold VT 0.4 0.7 1.0 V IDS = 1µA VGS = VDS -0.4 -0.7 -1.0 V IDS = -1µA VGS = VDS Voltage Offset Voltage VOS mV IDS = 10µA VGS = VDS mV IDS = -10µA VGS = VDS VGS1 - VGS2 Gate Threshold Temperature TCVT -1.2 mV/°C -1.3 mV/°C Drift On Drain IDS (ON) 4.8 mA VGS = VDS = 5V -1.3 mA VGS = VDS = -5V Current Trans-. Gfs 1.8 mmho VDS = 5V IDS= 10mA 0.25 0.67 mmho VDS = -5V IDS= -10mA conductance Mismatch ∆Gfs 0.5 0.5 Output GOS 200 µmho VDS = 5V IDS = 10mA µmho VDS = -5V IDS = -10mA Conductance Drain Source RDS(ON) 350 500 Ω VDS = 0.1V VGS = 5V 1200 1800 Ω VDS = -0.1V VGS = -5V ON Resistance Drain Source ON Resistance ∆RDS(ON) 0.5 VDS = 0.1V VGS = 5V 0.5 VDS = -0.1V VGS = -5V Mismatch Drain Source Breakdown BVDSS V IDS = 1µA VGS =0V -12 V IDS = -1µA VGS =0V Voltage Off Drain IDS(OFF) 400 pA VDS =12V IGS = 0V 400 pA VDS = -12V VGS = 0V Current nA TA = 125°C nA TA = 125°C Gate Leakage IGSS 0.1 pA VDS = 0V VGS =12V pA VDS = 0V VGS =-12V Current nA TA = 125°C nA TA = 125°C Input CISS pF pF Capacitance OPERATING ELECTRICAL CHARACTERISTICS TA = 25°C unless otherwise specified N - Channel Test P - Channel Test Parameter Symbol Min Typ Max Unit Conditions Min Typ Max Unit Conditions

P- CHANNEL TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT CHARACTERISTICS DRAIN SOURCE VOLTAGE (V) DRAIN SOURCE CURRENT (mA) -10 -7.5 -5.0 -2.5 VBS = 0V TA = 25°C -10V -8V -6V -4V -2V -10 -12 VGS = -12V LOW VOLTAGE OUTPUT CHARACTERISTICS DRAIN SOURCE VOLTAGE (mV) DRAIN SOURCE CURRENT (µA) -320 -160 160 320 -500 500 250 -250 -4V VGS = -12V -6V VBS = 0V TA = 25°C -2V -12 FORWARD TRANSCONDUCTANCE vs. DRAIN SOURCE VOLTAGE DRAIN SOURCE VOLTAGE (V) -10 FORWARD TRANSCONDUCTANCE (mmho) 1.0 0.5 0.2 0.1 0.05 0.02 0.01 VBS = 0V f = 1KHz IDS = -5mA TA = +125°C TA = +25°C IDS = -1mA TRANSFER CHARACTERISTIC WITH SUBSTRATE BIAS GATE SOURCE VOLTAGE (V) -0.8 -1.6 -2.4 -3.2 -4.0 -20 -15 -10 DRAIN SOURCE CURRENT (µA) VBS = 0V 10V 12V VGS = VDS TA = 25°C GATE SOURCE VOLTAGE (V) DRAIN SOURCE ON RESISTANCE RDS (ON) vs. GATE SOURCE VOLTAGE DRAIN SOURCE ON RESISTANCE (KΩ) 100 0.1 -10 -12 VDS = 0.4V VBS = 0V TA = +125°C TA = +25°C OFF DRAIN CURRENT vs. AMBIENT TEMPERATURE AMBIENT TEMPERATURE (°C) OFF DRAIN SOURCE CURRENT (pA) -50 -25 +25 +50 +75 +125 +100 VDS = -12V VGS = VBS = 0V 100 1000

N- CHANNEL TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT CHARACTERISTICS DRAIN SOURCE CURRENT (mA) VBS = 0V TA = 25°C VGS = 12V 10V DRAIN SOURCE VOLTAGE (V) LOW VOLTAGE OUTPUT CHARACTERISTICS DRAIN SOURCE VOLTAGE (mV) DRAIN SOURCE CURRENT (µA) -160 -80 160 -1000 1000 500 -500 VGS = 12V VBS = 0V TA = 25°C FORWARD TRANSCONDUCTANCE (mmho) FORWARD TRANSCONDUCTANCE vs. DRAIN SOURCE VOLTAGE DRAIN SOURCE VOLTAGE (V) 0.5 0.2 IDS = 1mA TA = +25°C IDS = 10mA TA = +125°C VBS = 0V f = 1KHz GATE SOURCE VOLTAGE (V) TRANSFER CHARACTERISTIC WITH SUBSTRATE BIAS DRAIN SOURCE CURRENT (µA) 0.8 1.6 2.4 3.2 4.0 VBS = 0V -2V -4V -6V -8V -10V -12V VGS = VDS TA = 25°C GATE SOURCE VOLTAGE (V) DRAIN SOURCE ON RESISTANCE RDS (ON) vs. GATE SOURCE VOLTAGE DRAIN SOURCE ON RESISTANCE (KΩ) 100 0.1 VDS = 0.2V VBS = 0V TA = +25°C TA = +125°C OFF DRAIN CURRENT vs. AMBIENT TEMPERATURE AMBIENT TEMPERATURE (°C) OFF DRAIN SOURCE CURRENT (pA) -50 -25 +25 +50 +75 +125 +100 VDS = +12V VGS = VBS = 0V 100 1000

CURRENT SOURCE MULTIPLICATION CURRENT SOURCE MIRROR CURRENT SOURCE WITH GATE CONTROL TYPICAL APPLICATIONS ISET RSET V+ = +5V I SOURCE Q1, Q2: N - Channel MOSFET Q3, Q4: P - Channel MOSFET I SOURCE = ISET = V+ -Vt RSET = 4 RSET V+ = +5V V+ = +5V ISOURCE RSET ISET ON OFF Digital Logic Control of Current Source : N - Channel MOSFET Q3,Q4 : P - Channel MOSFET PMOS PAIR VOUT VIN- NMOS PAIR VIN+ Current Source Q1, Q2: N - Channel MOSFET Q3, Q4: P - Channel MOSFET ALD1105 QSET, Q1..QN: ALD 1106 or ALD 1105 N - Channel MOSFET ISET V+ = +5V ISOURCE = ISET x N RSET QSET QN

V+ = +5V ISOURCE RSET Q1, Q2, Q3, Q4: N - Channel MOSFET (1/2 ALD1105 + ALD1116) ISET V+ = +5V ISOURCE Q1, Q2, Q3, Q4: P - Channel MOSFET (1/2 ALD1105 + ALD1117) ISOURCE = ISET = V+ - 2Vt RSET = 3 RSET RSET ISOURCE V+ = +5V RSET ISET ISOURCE = ISET = V+ - Vt RSET = V+ - 1.0 RSET V+ = +5V I SOURCE RSET ISET 1/2 ALD1105 Q1, Q2 : N - Channel MOSFET Q3, Q4: P - Channel MOSFET 1/2 ALD1105 = 4 RSET